JPH11285258A - Rectifying circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress efficiency lowering in a light-load region by using each parallel connection of an FET and a diode as a rectifying diode, and directly connecting the gate electrode of the FET to its source electrode in a light-load region. SOLUTION: In a rectifying circuit which is provided with an AC power transformer 1, rectifying devices 2, 3, a smoothing inductor 6, and a smoothing capacitor 9, and supplies a DC current to a load 10, the parallel-connected elements of an FET S1 and a diode D1, and an FET S2 and a diode D2 are used respectively as the rectifying devices 2, 3. Then a load current is detected by a current detector circuit 8, having a winding 7 coupled with the smoothing inductor 6, and the individual gate and source electrodes of the FETs S1, S2 are short-circuited by switching circuits 1 (4), 2 (5) in a light-load region. As a result, the efficiency of the rectifier circuit can be made higher, by performing rectification only with diodes D1, D2 in the light-load region cutting off the FETs S1, S2 whose efficiencies are lowered in the light-load region.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a rectifier circuit,
The present invention relates to a rectifier circuit using an FET as a synchronous rectifier.

[0002]

2. Description of the Related Art Higher efficiency of a rectified power supply device used as a power supply device for an LSI has been required as the voltage of an LSI has been reduced. The loss in the rectified power supply is mainly due to the voltage drop in the rectifier. In order to minimize this voltage drop, a design is used in which an FET is used as a rectifying element, its gate voltage is controlled, and the voltage drop during conduction is sufficiently reduced to increase the efficiency.

[0003]

However, a rectifier circuit using an FET as a synchronous rectifier has a problem that the efficiency under a light load is significantly reduced. FIG. 2 is a characteristic diagram showing the relationship between load current and efficiency, showing FET rectification and diode rectification. As shown in the figure, in the light load region, the efficiency of FET rectification is significantly reduced.

The present invention has been made to solve such a problem, and an object of the present invention is to provide a rectifier circuit capable of suppressing a decrease in efficiency even in a light load region.

[0005]

The rectifier circuit according to the present invention has a function of
The parallel connection of the ET and the diode is used as the rectifying element, and the gate of the FET is directly connected to its source in the light load region. When the gate is directly connected to the source, the FET is cut off and the power consumption of the gate circuit of the FET is eliminated, so that the rectifying circuit operates as a diode rectifier, and there is no significant reduction in efficiency in a light load region.

That is, the rectifier circuit of the present invention uses a parallel connection of an FET and a Schottky barrier diode as a rectifier element, detects a current output from the rectifier circuit, and all rectifier elements in the rectifier circuit. Is provided for each rectifier element, and the gate electrode of the FET of the rectifier element is directly connected to the source electrode, or a normal voltage point for operating the FET of the rectifier element as a synchronous rectifier element in the rectifier circuit. And switching circuit control means for controlling each switching circuit based on the output of the current detection circuit.

Further, the current detection circuit is provided with a winding which is electromagnetically coupled to a smoothing inductor provided in the rectifier circuit.

[0008] Further, the current detection circuit includes a resistor connected in series to a load of the rectifier circuit.

Furthermore, when the load current of the rectifier circuit is substantially constant, the connection of each switching circuit is used as a fixed connection in advance.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing one embodiment of the present invention. In FIG. 1, reference numeral 1 denotes an AC power transformer, reference numerals 2 and 3 denote rectifiers of the present invention,
Reference numerals 4 and 5 denote switching circuits 1 and 2 and 6, respectively, a smoothing inductor, 7 a winding connected to the inductor 6, 8 a current detection circuit, 9 a smoothing capacitor, and 10 a load.
S1 and S2 are FETs, and D1 and D2 are Schottky barrier diodes.

The general configuration of the rectifier circuit is well known and will not be described. In the rectifier circuit shown in FIG. 1, as the rectifier element, an element configured by connecting an FET shown by S1 and S2 and a diode shown by D1 and D2 in parallel is used. In the switching circuits 1 (4) and 2 (5), if a switch is connected to the contact a, a sufficient voltage is applied to the gate of each FET during the AC phase when the FET is turned on, so that the inside of the FET is Is sufficiently small. However, this requires drive power to drive the gate of the FET. Since the load power is large while the load current is large, the gate drive power is small compared to this, and the gate drive power does not greatly affect the efficiency of the rectifier circuit. , The ratio of the gate drive power to the gate drive power increases, and the efficiency of rectification decreases due to the gate drive power.

In the present invention, in the region where the load current is small,
A switch is connected to the contact b by the switching circuits 1 (4) and 2 (5), and the gate of the FET is directly connected to its source. With this connection, there is no gate drive power and the FET is cut off. When the FET is cut off, the only rectifying element is a diode, and this rectifying circuit exhibits the characteristics of diode rectification.

In FIG. 2, it is sufficient to operate as FET rectification in a region where FET rectification is more efficient than diode rectification, and to operate as diode rectification in a region where diode rectification is more efficient than FET rectification. The switching point is the point P in FIG. The load current is detected by the current detection circuit 8, and in the area of the load current exceeding the point P, the switches of the switching circuits 1 (4) and 2 (5) are connected to the contact a,
In the region of the load current below the point, the switching circuits 1 (4), 2
What is necessary is just to control to connect the switch of (5) to the contact point b.

As the current detection circuit, any conventionally known one may be used. In FIG. 1, the current detection circuit 8 combined with the winding 7 coupled to the smoothing inductor is used. However, the current can be detected from the voltage drop in the resistor inserted in series with the load, and the switching circuits 1 and 2 can be used. The relay coil is connected in series to the load, and when the current of the relay coil falls below the current at point P, the gate of the FET is directly connected to the source at the contact point of the relay. It may be configured to be connected.

For a load that does not enter a light load state, the switches of the switching circuits 4 and 5 may be fixedly connected to the contact a.

[0016]

As is apparent from the above description, the present invention has the effect of providing a rectifier circuit that is efficient at a normal load and can suppress a decrease in efficiency even in a light load region.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a characteristic diagram showing a relationship between load current and efficiency of a rectifier circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Power supply transformer 2, 3 Rectifier 4 Switching circuit 1 5 Switching circuit 2 6 Smoothing inductor 7 Winding 8 Voltage detection circuit 9 Smoothing capacitor 10 Load S1, S2 FET D1, D2 Diode

Claims (4)

[Claims] 1. An F used as a rectifying element of a rectifying circuit.
A parallel connection of the ET and the Schottky barrier diode, a current detection circuit for detecting an output current of the rectifier circuit, a current detection circuit provided for each rectifier element of all rectifier elements in the rectifier circuit, A switching circuit for switching whether to connect the gate electrode directly to the source electrode or to connect the FET of the rectifying element to a normal voltage point operating the synchronous rectifying element in the rectifying circuit; A rectifier circuit comprising: switching circuit control means for controlling each of the switching circuits by an output. 2. The rectifier circuit according to claim 1, wherein the current detection circuit includes a winding that is electromagnetically coupled to a smoothing inductor provided in the rectifier circuit. 3. The rectifier circuit according to claim 1, wherein the current detection circuit includes a resistor connected in series to a load of the rectifier circuit. 4. The rectifier circuit according to claim 1, wherein when the load current of the rectifier circuit is substantially constant, the connection of each of the switching circuits is used as a fixed connection in advance.