JPH11274649A - Semiconductor optical element and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To uniformize the surface of a GaN buffer layer to lessen the crystal defects, by laminating a low-temp. buffer layer and high-temp. GaN layer. SOLUTION: In step 1 a first and second semiconductor layers are formed at their substrate temp. set to less than and over 700 deg.C, respectively, and in step 2 a second semiconductor region is formed at a substrate temp. set to over 700 deg.C. The growth temp. is e.g. set to 520 deg.C, 760 deg.C and 1050 deg.C for a low- temp. buffer layer 102, InGaN-GaN strain quantum well active layer 107 and other layers, respectively. By laminating the GaN low-temp. grown layer and high-temp. grown layer, a crystal with little defects can be easily obtd. and high-reliability blue-ultraviolet light emitting devices can be manufactured.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device, and more particularly to a semiconductor light emitting device containing at least N (nitrogen) as a constituent element.
The present invention relates to an element structure suitable for a light-emitting device such as a light-emitting diode or a laser diode using a group V compound semiconductor (hereinafter, referred to as a gallium nitride-based compound semiconductor in this specification) and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, blue-violet semiconductor lasers using gallium nitride-based compound semiconductors have been remarkably developed. Was reported. The key technology for extending the life is to increase the Al composition of AlGaN used for the cladding layer, achieve low resistance, and use selective growth with silicon oxide as a mask to reduce crystal defects. It has been reduced.

[0003]

It is considered that the origin of crystal defects in the crystal growth of gallium nitride-based compound semiconductors is three-dimensional growth in the initial stage of growth. for that reason,
In the selective growth described above, two-dimensional growth is promoted on a silicon oxide mask to reduce crystal defects. However, in this selective growth method, it is necessary to take out a sample from a growth furnace at an early stage of crystal growth and pattern a silicon oxide mask. In addition, it is difficult to suppress crystal defects formed in the middle of the mask pattern.

On the other hand, while having the same hexagonal crystal structure as a gallium nitride-based compound semiconductor, such as a sapphire substrate (Al ₂ O ₃ ) or a silicon carbide substrate (SiC), the substrate has a different lattice constant and thus has a different lattice constant. When utilizing a substrate material that causes crystal defects in the gallium nitride-based compound semiconductor layer formed thereon, a buffer layer is provided on the substrate, thereby mitigating lattice mismatch between the substrate and the gallium nitride-based compound semiconductor crystal. Technology has been considered. This technology is disclosed in
No. 97023, and an improved technique thereof is described in the specification of Japanese Patent Application No. 9-58798. However, even with these techniques, defects in the gallium nitride-based compound semiconductor crystal formed on the substrate have not been sufficiently resolved for use in optical devices.

[0005]

According to the present invention, a gallium nitride-based semiconductor layer (low-temperature buffer layer), which is usually formed only on a growth substrate and grown at a temperature of 700 ° C. or less, is laminated with a high-temperature growth layer. Reduced defects. With this method, it is possible to easily form a structure for reducing crystal defects without taking out the sample during crystal growth from the growth furnace, since external processes such as the formation of a mask such as silicon oxide are unnecessary. It became.

Normally, in crystal growth of a gallium nitride-based compound semiconductor, a GaN buffer layer having a thickness of several tens of nm is grown on a sapphire substrate at a low temperature of about 500 ° C.
The temperature is raised to about 0 ° C. to grow the device structure. Here, it is considered that a uniform and flat nucleus is formed by raising the temperature of the buffer layer formed at a low temperature.

However, since the lattice constant mismatch between GaN and sapphire of the substrate is very large, it is impossible to form a completely uniform GaN surface by this method.
Therefore, in the present invention, the low-temperature buffer layer and the high-temperature GaN
By stacking the layers, the surface of the GaN buffer layer was made uniform to reduce crystal defects.

Based on the above discussion and discussion, the present inventor has conceived a method and structure for manufacturing a semiconductor optical device (light-emitting device, light-receiving device, optical waveguide, etc.) comprising a gallium nitride-based compound semiconductor described below.

First, the basic feature of the method for manufacturing a semiconductor optical device in which a semiconductor layer made of a gallium nitride-based compound semiconductor (a group III-V compound semiconductor containing at least nitrogen as a constituent element) is stacked on a substrate according to the present invention is as follows. A first semiconductor layer and a second semiconductor layer made of the III-V group compound semiconductor (which is a gallium nitride-based compound semiconductor) are laminated on the main surface of the substrate in this order, including at least one layer each; A first step of forming one semiconductor region, and forming an optically active region (light-emitting region, light-receiving region, optical waveguide layer, etc.) made of the III-V compound semiconductor on the first semiconductor region. And forming a second semiconductor region including a second semiconductor region including a first semiconductor layer at a substrate temperature of less than 700 degrees Celsius and a second semiconductor layer at a substrate temperature of less than 700 degrees Celsius. Set to 700 degrees or more To respectively form, in the second step is to form by setting the second semiconductor region of the substrate temperature above 700 degrees. That is, Japanese Unexamined Patent Application Publication No.
The buffer layer discussed in Japanese Patent No. 97023 replaces the first semiconductor region in the present invention.

[0010] The first semiconductor layer constituting the first semiconductor region is formed at a low temperature of less than 700 ° C. For this reason, the first semiconductor layer is an aggregate of crystal grains (polycrystal in a broad sense). The lower the forming temperature is, the smaller the crystal grains are, and the individual crystal orientations are also random.
The first semiconductor layer formed in this manner blocks the crystal lattice of the gallium nitride-based compound semiconductor formed thereon from extending to the substrate. Therefore, particularly when a single crystal substrate selected from the group consisting of sapphire, silicon and silicon carbide is used as the substrate, a lattice caused by the crystal structure of the single crystal substrate in the crystal lattice of the gallium nitride compound semiconductor formed thereon. Eliminate defects. Needless to say, even if the substrate is not a single crystal, the present invention is not hampered by the practice of the present invention. For).

The smaller the crystal grains immediately after the formation of the first semiconductor layer and the more the crystal orientation thereof varies, the more the defects of the gallium nitride-based compound semiconductor crystal constituting the second semiconductor region become. Desirable to reduce.
This is because, when the second semiconductor region is formed, the substrate on which the first semiconductor layer is formed is also placed in a high-temperature environment of 700 ° C. or more. This is because they coalesce into large crystal grains. The ultimate appearance is that the first semiconductor layer becomes one single crystal layer. In this case, the crystal lattice of the second semiconductor region reaches the substrate via the first semiconductor layer, and particularly when the substrate is a single crystal, introduces stacking faults due to lattice mismatch into itself. On the other hand, it is desirable to reduce the crystal grains during the formation of the first semiconductor layer and to vary the crystal orientation to keep the first semiconductor layer from reaching the ultimate shape.

However, there is a weak point in the desired shape of the first semiconductor layer when it is formed. One is that the first semiconductor layer does not have the robustness of a single crystal, so that it is possible to form irregularities on the upper surface thereof. 700 ° C. on the main surface of the first semiconductor layer having such a surface (growth surface).
When the second semiconductor region is formed at the above high temperature, the growth surface inherits the irregularities of the main surface of the first semiconductor layer while being slightly relaxed. Since the active region of the light emitting element and the optical waveguide region of the waveguide type optical element (slab-shaped wave guide) are formed in the second semiconductor layer, the shape of the interface between the semiconductor layers constituting these areas is flat. However, unevenness inherited from the main surface of the first semiconductor layer impairs the flatness, resulting in significant optical loss in the optical device. Further, another weak point is that the adhesiveness between the first semiconductor layer and the underlying layer (substrate or the like) on which the first semiconductor layer is formed is weakened.

Therefore, a second semiconductor layer is formed on the first semiconductor layer at a high temperature of 700 ° C. or higher. By setting the formation temperature of the second semiconductor layer such that this layer grows as a single crystal layer, unevenness inherited from the main surface of the first semiconductor layer is reduced.

One desirable mode for alleviating the irregularities inherited from the main surface of the first semiconductor layer is in the distribution of the thicknesses of the first semiconductor layer and the second semiconductor layer. That is, the thickness of the first semiconductor layer is suppressed to 50 nm or less, and the second semiconductor layer is formed to be thicker than the first semiconductor layer. The larger the difference between the thicknesses of the first semiconductor layer and the second semiconductor layer is, the more effective it is to eliminate irregularities inherited from the main surface of the first semiconductor layer. If it is too long, the original object of the present invention (reduction of crystal defects in the second semiconductor region) cannot be achieved. Therefore, it is required that the thickness of the first semiconductor layer be 5 nm or more in AlN and 10 nm or more in GaN, depending on the composition of the constituent elements.

As another desirable mode for alleviating the irregularities inherited from the main surface of the first semiconductor layer, the first semiconductor region is constituted by a plurality of first semiconductor layers and second semiconductor layers. The first semiconductor layer and the second semiconductor layer are alternately stacked in this order from the substrate side, so as to alleviate the irregularities. It should be noted here that the second semiconductor region is the second semiconductor region.
Is to form a laminated structure so as to be formed on the main surface of the semiconductor layer. When the first semiconductor layer is disposed on the uppermost portion of the first semiconductor region, the effect of the above-described stacked structure is reduced.

Obviously, these desirable forms, when combined with each other, further enhance the effects of the present invention. In an example described later, an embodiment of the best mode of the present invention will be described.

The first semiconductor layer may be formed of a III-V compound semiconductor having a composition of Al _x Ga ₁ -xN (1 ≧ x ≧ 0), which has been used for low-temperature growth. Al _y Ga _{1- (y + z)} In _z N (1 ≧ y ≧ 0,
It is preferable to form a III-V compound semiconductor having a composition of 1 ≧ z ≧ 0). The second semiconductor region is composed of phosphorus (P) other than nitrogen (N), arsenic (As), and antimony (Sb) other than nitrogen (N).
Although it does not prevent the practice of the present invention even if an element selected from the group is appropriately included, it is preferable to set the composition ratio of group V elements so that N is 0.5 or more. Further, even if the respective compound compositions of the first semiconductor layer and the second semiconductor layer are the same as in the examples described later, or they are different from each other, the present invention is not impeded.

In the step of forming the first semiconductor region, the crystal growth apparatus is provided with an electron beam diffraction apparatus or an X-ray diffraction apparatus, and the growth films of the first semiconductor layer and the second semiconductor layer, respectively. It is recommended to monitor the diffraction pattern of It is essential that the former diffraction pattern shows a pattern of at least a Debye-Scherrer ring, and it is desirable that the ring-like diffraction pattern is blurred, that is, closer to a halo pattern found in an amorphous material. In the latter, it is essential that the hexagonal Laue spot can be clearly measured.

The structure of the semiconductor optical device of the present invention, which is characterized by the method of manufacturing a semiconductor optical device according to the present invention, is as follows.

That is, a substrate having a single crystal structure and a plurality of semiconductor layers made of a group III-V compound semiconductor material (gallium nitride compound semiconductor) containing at least nitrogen as a constituent element are formed on the substrate. A first semiconductor region, and a plurality of semiconductor layers made of the above-described III-V compound semiconductor material (gallium nitride-based compound semiconductor) are formed on the first semiconductor region and optically active. And a second semiconductor region including a region.
The semiconductor region includes a crystal grain region in which crystal grains are aggregated, the second semiconductor region has a single crystal structure oriented in a predetermined direction, and extends from the second semiconductor region to the substrate. The crystal lattice to be formed and the crystal lattice of the substrate have a basic feature in the structure of the semiconductor optical device separated by the crystal grain region. Here, the crystal grain region is a region that shows a Debye-Scherrer ring or a halo pattern by the electron beam or X-ray diffraction. On the other hand, it goes without saying that the region having the single crystal structure is a region showing a Laue spot.

As described above, blocking the crystal lattice extending from the second semiconductor region toward the substrate by the crystal grain region formed in the first semiconductor region is not only required in the process but also in the process.
In the case where the completed optical element, particularly the light emitting element, is operated continuously, it is important for eliminating the change with time of the element performance due to the deterioration of the crystal of the second semiconductor region.

The reason why it is recommended that the first semiconductor region be laminated with the first semiconductor layer having the crystal grain region and the second semiconductor layer having the single crystal structure in this order on the substrate Is as described in the process of the above-described manufacturing method. Further, the first semiconductor region is
And the second semiconductor layer is alternately laminated in a plurality of layers, or the first semiconductor layer has a thickness of 5 to 50 nm and the second semiconductor layer has a thickness larger than that of the first semiconductor layer. It is also recommended to form each.

[0023]

BEST MODE FOR CARRYING OUT THE INVENTION
This will be described with reference to Examples 1 and 2 below. In each case,
Semiconductor light emitting device (laser diode, light emitting diode)
The application of the present invention to the present invention is described below. The device configuration of Example 1 is used as a slab-shaped optical waveguide, and the device configuration of Example 2 is applied by applying an electric field in the opposite direction to its pin junction. Since it can be used as a light receiving element, it is clear that the present invention can be applied to optical elements other than the light emitting element.

Example 1 In this example, a gallium nitride-based compound semiconductor laser having a laminated structure of a low-temperature buffer layer and a high-temperature growth layer of GaN was manufactured.

FIG. 1 is a sectional view of a part of the device. In FIG. 1, 101 is a c-plane sapphire substrate, 102 is a low-temperature GaN buffer layer (d = 20 nm), 103 is a high-temperature GaN layer (d = 50 nm), and 104 is an n-type.
Si-doped GaN layer (n = 1 × 10 ¹⁸ cm ⁻³ , d = 3 μm), 105 is n-type Si
Doped Al _0.1 Ga _0.9 N layer (n = 5 × 10 ¹⁷ cm ⁻³ , d = 0.5 μm), 10
6 is an n-type Si-doped GaN layer (n = 5 × 10 ¹⁷ cm ⁻³ , d = 0.1 μm), 10
7 is a non-doped In _0.15 Ga _0.85 N-GaN strained quantum well light emitting layer (each thickness 5 nm, 3 periods), 108 is a p-type Mg doped GaN layer (p = 2 × 10 ¹⁷ cm
^-3 , d = 0.1 μm), 109 is a p-type Mg-doped Al _0.1 Ga _0.9 N layer (p = 2
× 10 ¹⁷ cm ⁻³ , d = 1.5 μm), 110 is a p-type Mg-doped GaN layer (p = 2
× 10 ¹⁸ cm ⁻³ , d = 0.2 μm), 111 is a SiO ₂ insulating film, 112 is n
Reference numeral 113 denotes a p-type electrode.

The layers 102 to 111 were grown on the substrate crystal 101 using a metal organic chemical vapor deposition apparatus. TMGa (trimethylgallium), TMAl (trimethylaluminum), NH ₃ , SiH ₄ and Cp ₂ Mg (cyclopentadienyl magnesium) were used as raw materials. The growth temperature is the low temperature buffer layer 1
02 is 520 ° C, In _0.15 Ga _0.85 N-GaN strained quantum well active layer 107 is 7
The temperature was set to 60 ° C and the other layers were set to 1050 ° C.

The sapphire substrate 101 is placed in a hydrogen stream 1100.
After heating at 520 ° C., the temperature is lowered to 520 ° C.
0 nm, followed by raising the temperature to 1050 ° C.
0 nm was formed. After repeating the combination of the low-temperature growth and the high-temperature growth four times, growth from n-type GaN 104 to p-type GaN 110 was performed by an ordinary method. After the crystal growth was completed, a mesa structure and an insulating film 111 were formed by dry etching, and then an n-type electrode 112 and a p-type electrode 113 were formed by vacuum evaporation. Using these samples, cavity end faces were formed by a cleavage method, and a dielectric high reflection film mirror was formed on those end faces. Then, each element was separated to produce a light emitting diode element.

When a current of 5 mA and a current of 20 mA were passed through the device, an ultraviolet laser beam of 410 nm was obtained at an optical output of 5 mW. When the defect density of this device was measured, 2 × 10
^{It was 3} cm ^-2 and exhibited a life of 5,000 hours or more in a deterioration test at 60 ° C.

Example 2 In this example, a high-power light emitting diode of a gallium nitride-based compound semiconductor having a laminated structure of a low-temperature buffer layer and a high-temperature growth layer of GaN was manufactured.

FIG. 1 is a sectional view of a part of the device. In FIG. 1, 101 is a c-plane sapphire substrate, 102 is a low-temperature GaN buffer layer (d = 20 nm), 103 is a high-temperature GaN layer (d = 50 nm), and 104 is an n-type.
Si-doped GaN layer (n = 1 × 10 ¹⁸ cm ⁻³ , d = 3 μm), 105 is n-type Si
Doped Al _0.1 Ga _0.9 N layer (n = 5 × 10 ¹⁷ cm ⁻³ , d = 0.5 μm), 10
6 is an n-type Si-doped GaN layer (n = 5 × 10 ¹⁷ cm ⁻³ , d = 0.1 μm), 20
1 is a Si-doped In _0.3 Ga _0.7 N-GaN strained quantum well light emitting layer (each film thickness 5 nm, 3 periods), 108 is a p-type Mg-doped GaN layer (p = 2 × 10 ¹⁷ c
m ^-3 , d = 0.1 μm), 109 is a p-type Mg-doped Al _0.1 Ga _0.9 N layer (p = 2
× 10 ¹⁷ cm ⁻³ , d = 1.5 μm), 110 is a p-type Mg-doped GaN layer (p = 2
× 10 ¹⁸ cm ⁻³ , d = 0.2 μm), 111 is a SiO ₂ insulating film, 112 is n
Reference numeral 113 denotes a p-type electrode.

The layers 102 to 111 were grown on the substrate crystal 101 using a metal organic chemical vapor deposition apparatus. TMGa (trimethylgallium), TMAl (trimethylaluminum), NH ₃ , SiH ₄ and Cp ₂ Mg (cyclopentadienyl magnesium) were used as raw materials. The growth temperature is the low temperature buffer layer 1
02 is 520 ° C, In _0.3 Ga _0.7 N-GaN strained quantum well active layer 107 is 760
° C, and other layers were 1050 ° C.

The sapphire substrate 101 is placed in a hydrogen stream at 1100.
After heating at 520 ° C., the temperature is lowered to 520 ° C.
0 nm, followed by raising the temperature to 1050 ° C.
0 nm was formed. After repeating the combination of the low-temperature growth and the high-temperature growth four times, growth from n-type GaN 104 to p-type GaN 110 was performed by an ordinary method. After the crystal growth was completed, a mesa structure and an insulating film 111 were formed by dry etching, and then an n-type electrode 112 and a p-type electrode 113 were formed by vacuum evaporation. Using these samples, light-emitting end faces were formed by dry etching, a dielectric high-reflection film mirror and a low-reflection mirror were formed on those end faces, and then each element was separated to produce a light-emitting diode element.

When a current of 100 mA was passed through the device at 10 V, blue light of 450 nm was obtained at an optical output of 100 mW, and a lifetime of 10,000 hours or more was exhibited in a 60 ° C. deterioration test.

[0034]

As described above, as described in the present invention, G
By laminating a low-temperature growth layer and a high-temperature growth of aN, low-defect crystals can be easily obtained, and a highly reliable blue-to-ultraviolet light-emitting device can be manufactured. Its industrial utility value is extremely large. .

[Brief description of the drawings]

FIG. 1 is a sectional view of an ultraviolet LD (laser diode) according to a first embodiment.

FIG. 2 is a cross-sectional view of a blue LED (light emitting diode) described in Example 2.

[Explanation of symbols]

101: c-plane sapphire substrate, 102: low-temperature GaN buffer layer, 103: non-top GaN layer, 104: n-type Si-doped Ga
N, 105: n-type Si-doped AlGaN, 106: n-type Si-doped Ga
N, 107: non _- doped In _1-x Ga _x N-GaN strain quantum well light emitting layer, 108: p-type Mg doped GaN layer, 109: p-type Mg doped
AlGaN, 110: p-type Mg-doped GaN, 111: SiO ₂ insulating film, 112: p-type electrode, 113: n-type electrode, 201: Si-doped In _1-x Ga _x N-GaN strained quantum well light emitting layer.

Claims (8)

[Claims] 1. A method of manufacturing a semiconductor optical device, comprising stacking a semiconductor layer made of a group III-V compound semiconductor containing at least nitrogen as a constituent element on an upper part of a substrate, wherein the group III-V compound semiconductor is formed on a main surface of the substrate. A first step of forming a first semiconductor region by laminating a first semiconductor layer and a second semiconductor layer each including at least one layer in this order, and forming the first semiconductor region on the first semiconductor region. A second step of forming a second semiconductor region comprising a group V compound semiconductor and including an optically active region. The first step comprises: Degrees and the substrate temperature is set to 700
And forming the second semiconductor region by setting the substrate temperature to 700 ° C. or higher in the second step. 2. The method according to claim 1, wherein the substrate is a single crystal substrate selected from the group consisting of sapphire, silicon and silicon carbide. 3. The method according to claim 1, wherein the first semiconductor layer is formed of Al _x Ga ₁ -xN (1 ≧ x ≧ 0).
And the second semiconductor layer and the second semiconductor region are formed of Al _y Ga
3. A semiconductor device comprising a III-V compound semiconductor having a composition of _{1- (y + z)} In _z N (1.gtoreq.y.gtoreq.0, 1.gtoreq.z.gtoreq.0).
3. The method for manufacturing a semiconductor optical device according to item 1. 4. The semiconductor optical device according to claim 1, wherein said first semiconductor layer is formed to a thickness of 50 nm or less. 5. A first semiconductor region formed by laminating a substrate having a single crystal structure and a plurality of semiconductor layers made of a group III-V compound semiconductor material containing at least nitrogen as a constituent element on the substrate. And III on the first semiconductor region.
A second semiconductor layer formed by stacking a plurality of semiconductor layers made of a group V compound semiconductor material and including an optically active region;
Wherein the first semiconductor region includes a crystal grain region in which crystal grains are aggregated, and the second semiconductor region has a single crystal structure oriented in a predetermined direction; And a crystal lattice extending from the second semiconductor region to the substrate and a crystal lattice of the substrate are separated by the crystal grain region. 6. The semiconductor device according to claim 1, wherein the first semiconductor region is formed by laminating a first semiconductor layer having the crystal grain region and a second semiconductor layer having a single crystal structure on the substrate in this order. 6. The semiconductor optical device according to claim 5, wherein: 7. The semiconductor optical device according to claim 6, wherein said first semiconductor region is formed by alternately laminating a plurality of said first semiconductor layers and said second semiconductor layers. 8. The semiconductor device according to claim 6, wherein said first semiconductor layer has a thickness of 5 to 50 nm, and said second semiconductor layer is formed thicker than said first semiconductor layer. 7
3. The semiconductor optical device according to item 1.