JPH11265978A - Manufacture of semiconductor device and semiconductor device using the method - Google Patents

Manufacture of semiconductor device and semiconductor device using the method

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Publication number
JPH11265978A
JPH11265978A JP6737298A JP6737298A JPH11265978A JP H11265978 A JPH11265978 A JP H11265978A JP 6737298 A JP6737298 A JP 6737298A JP 6737298 A JP6737298 A JP 6737298A JP H11265978 A JPH11265978 A JP H11265978A
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formed
capacitor
film
electrode
lower electrode
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Japanese (ja)
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Mitsuru Fujisaki
Yasutaka Ishibashi
保孝 石橋
満 藤崎
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Asahi Kasei Micro Syst Co Ltd
旭化成マイクロシステム株式会社
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Abstract

PROBLEM TO BE SOLVED: To increase the capacitance of a capacitor without changing the occupying area of the capacitor on a semiconductor substrate.
SOLUTION: A polycrystal silicon film 2 formed on a semiconductor substrate 1 is etched into a head-mounting shaped conical form with a circular resist pattern 3 as a mask, and a lower electrode 2a is formed. A silicon oxide film 4 and a polycrystal silicon film 5 are formed so as to cover the lower electrode 2a, and a capacitor 10 is formed. At this time, e.g. the polycrystal silicon film 2 of the capacitor 10 is formed thicker. Etching is performed by using the above described resist pattern 3, and so on. When the tilt angle is made large with the bottom area of the lower electrode 22 being intact by this way, the area of the slant surface of the lower electrode 2a is increased accompanied by the change in slant angle. That is to say, the surface area of the silicon oxide film 4 becomes also large. Since the bottom area is same, the capacitance of the capacitor 10 is increased with the occupying area of the lower electrode 2a on the semiconductor substrate 1 being same.
COPYRIGHT: (C)1999,JPO

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【発明の属する技術分野】本発明は、半導体装置の製造方法及びこれを用いた半導体装置に関し、特に、基板上における占有面積を変えずに、より大きな容量が得られるようにしたキャパシタに関する。 BACKGROUND OF THE INVENTION The present invention relates to a semiconductor device using the method and the same manufacturing a semiconductor device, in particular, without changing the occupied area on the substrate, to a capacitor as a larger capacity.

【0002】 [0002]

【従来の技術】従来、半導体基板上にキャパシタを形成する場合等には、例えば図4に示すように、半導体基板1上に多結晶シリコン膜11を形成し、この上にシリコン酸化膜12を形成し、再度多結晶シリコン膜13を形成し、これを、エッチングすること等によって形成するようにしている。 Conventionally, in a case such as to form a capacitor on a semiconductor substrate, for example, as shown in FIG. 4, the polycrystalline silicon film 11 is formed on the semiconductor substrate 1, a silicon oxide film 12 on the formed, so that to form a polycrystalline silicon film 13 again, which is formed such as by etching.

【0003】 [0003]

【発明が解決しようとする課題】しかしながら、上記従来の半導体装置においては、図4に示すようにキャパシタが直方体状であって、シリコン酸化膜12の膜厚は変えずにキャパシタの容量の増大を図る場合、キャパシタの容量はシリコン酸化膜12の平面積で決まることから、半導体基板1上におけるキャパシタの占有面積が増加することになり、半導体装置の微細化,高集積化の妨げとなってしまう。 [SUMMARY OF THE INVENTION However, in the conventional semiconductor device, a capacitor is a rectangular parallelepiped shape as shown in FIG. 4, an increase in the capacitance of the capacitor without changing the thickness of the silicon oxide film 12 If achieved, the capacitance of the capacitor because it depends on the plane area of ​​the silicon oxide film 12, will be the area occupied by the capacitor in the semiconductor substrate 1 is increased, miniaturization of the semiconductor device, becomes an obstacle to high integration . そのため、占有面積を増加させることなく、キャパシタの容量の増大を図ることの可能な半導体装置及びその製造方法が望まれていた。 Therefore, without increasing the occupied area, which can be a semiconductor device and a manufacturing method thereof possible to increase the capacitance of the capacitor it has been desired.

【0004】そこで、この発明は、上記従来の未解決の問題に着目してなされたものであり、半導体基板上におけるキャパシタの占有面積を変えることなく、キャパシタの容量の増大を図ることの可能な半導体装置及びその製造方法を提供することを目的としている。 [0004] Therefore, the present invention has been made in view of the problems of the prior unresolved, without changing the area occupied by the capacitor on a semiconductor substrate, capable of achieving an increase in the capacitance of the capacitor and its object is to provide a semiconductor device and a manufacturing method thereof.

【0005】 [0005]

【課題を解決するための手段】上記目的を達成するために、本発明の請求項1に係る半導体装置の製造方法は、 Means for Solving the Problems] To achieve the above object, a method of manufacturing a semiconductor device according to claim 1 of the present invention,
基板上にキャパシタが形成された半導体装置の製造方法であって、前記基板上に電極形成用の膜を形成した後、 A method of manufacturing a semiconductor device in which the capacitor is formed on the substrate, after forming a film for electrodes formed on the substrate,
これをエッチングして裁頭状の錐体形の電極用核を形成し、当該電極用核の表面全体を覆うように絶縁膜を形成し、さらに、当該絶縁膜の表面全体を覆うように電極用膜を形成することを特徴としている。 This forms the electrode for nuclear etching to a truncated form of the cone form, an insulating film is formed to cover the entire surface of the electrode core further electrode so as to cover the entire surface of the insulating film It is characterized by forming a film.

【0006】この請求項1の発明では、基板上に電極形成用の膜が形成された後、これが裁頭状の錐体形にエッチングされ、つまり、錐体形の上部が底面と平行な面で裁断され、その上部を取り除いた形状であり上面が平坦な形状にエッチングされ、この裁頭状の錐体形からなる電極用核が形成される。 [0006] In the invention of the claim 1, after the film for electrode formation is formed on the substrate, which is etched into the head-shaped cone body shape Court, that is, the upper portion of the cone body shape is cut in the bottom surface and a plane parallel It is, the upper surface has a shape obtained by removing the upper is etched into a flat shape, the electrode core consisting of the frustum-shaped cone form is formed. そして、この電極用核の表面全体を覆うように絶縁膜が形成され、さらに、電極用核及び絶縁膜の積層構造からなる裁頭状の錐体形の表面全体、つまり絶縁膜の上面及び傾斜面を覆うように電極用膜が形成されて、裁頭状の錐体形のキャパシタが構成される。 Then, an insulating film to cover the entire surface of the electrode core is formed, further, the entire surface of the electrode core and the cone forms a laminated structure consisting frusto-like insulating film, that is the upper surface and the inclined surface of the insulating film the by electrode film is formed so as to cover, truncated shaped cone form of the capacitor is formed.

【0007】このキャパシタの容量を変化させるには、 [0007] In order to change the capacitance of the capacitor,
絶縁膜の平面積を変化させればよく、つまり、後の電極用核となる電極形成用の膜を形成する際に、膜厚を調整するか、或いは電極形成用の膜を裁頭状の錐体形にエッチングする際にレジストの形状を調整すること等により、裁頭状の錐体形である電極用核の傾斜面の傾きを変化させ、傾斜面の平面積を変化させればよい。 May be changed to the planar area of ​​the insulating film, that is, after the in forming a film for a nucleus consisting electrode forming the electrodes, either adjust the film thickness, or the electrode formation film a truncated form of such as by adjusting the resist shape when etching the cone body shape, truncated shaped to change the inclination of the inclined surface of the electrode core is conical form, it may be changed to the planar area of ​​the inclined surface. このとき、その底面積つまり、基板上におけるキャパシタの占有面積は同一であるから、占有面積は同一のままキャパシタの容量の変更が行われることになる。 At this time, the bottom area that is, since the area occupied by the capacitor on the substrate are the same, the area occupied will be change in the capacitance of the same while the capacitor is carried out.

【0008】また、本発明の請求項2に係る半導体装置は、基板上にキャパシタが形成された半導体装置であって、前記キャパシタは、裁頭状の錐体形に形成され、前記錐体形の中心部に前記基板と接触して形成される電極用核と、前記錐体形の外周部に形成された電極用膜と、 Further, the semiconductor device according to claim 2 of the present invention is a semiconductor device in which the capacitor is formed on the substrate, wherein the capacitor is formed in a truncated form of the cone form, the center of the cone forms and electrodes for nuclei formed in contact with the substrate in part, the electrode film formed on an outer peripheral portion of the cone body shape,
前記電極用核及び電極用膜間に形成されこれら電極用核及び電極用膜間を分離する絶縁膜と、の積層構造であることを特徴としている。 Is characterized in that the formed between the electrodes for nuclear and electrode film and the insulating film which isolates the electrodes for nuclear and electrode film, a laminated structure of.

【0009】この請求項2の発明では、基板上に裁頭状の錐体形のキャパシタが形成され、このキャパシタは、 [0009] In the invention of claim 2, the capacitor of the cone forms a truncated form of the substrate is formed, the capacitor,
裁頭上の錐体形の中央部に基板と接触して電極用核が形成され、前記錐体形の外周部に電極用膜が形成され、これら電極用核及び電極用膜間に、これらを分離するように絶縁膜が形成される。 Court overhead cone form nuclei electrode in contact with the substrate at the center portion of is formed, the electrode film on the outer periphery of the cone forms is formed, between these electrodes for nuclear and electrode film, to separate them insulating film is formed so as.

【0010】ここで、キャパシタの容量を変化させるには、絶縁膜の平面積を変化させればよく、この場合、裁頭状の錐体形に成膜された絶縁膜の傾斜面の面積を変化させればよい。 [0010] Here, in order to change the capacitance of the capacitor may be changed a flat area of ​​the insulating film, in this case, change the area of ​​the inclined surface of the frusto-like cone form is formed on an insulating film it is sufficient to. このためには、傾斜面の傾きを変化させればよいから、その底面積、つまり、基板上におけるキャパシタの占有面積は同一のまま、容量を変化させることが可能となる。 For this purpose, since it is only necessary to change the inclination of the inclined surface, the bottom area, that is, the area occupied by the capacitor on the substrate it becomes possible to change the same remains, capacity.

【0011】 [0011]

【実施例】以下、本発明の実施の形態を実施例を伴って説明する。 BRIEF DESCRIPTION Embodiments of the present invention with examples. まず、図1(a)に示すように、シリコン基板1上に、膜厚Lの多結晶シリコン膜2を形成し、この多結晶シリコン膜2の上にレジストを塗布し下部電極形成用の直径Rの円形のレジストパターン3を形成する。 First, as shown in FIG. 1 (a), on a silicon substrate 1, to form a polycrystalline silicon film 2 having a thickness of L, the diameter of the lower electrode forming a resist is coated on the polycrystalline silicon film 2 forming a circular resist pattern 3 of R.

【0012】次に、図1(b)に示すように、レジストパターン3をマスクにして、多結晶シリコン膜2をテーパーエッチングし、レジストパターン3の端部に相当する位置から離れるにしたがって、その膜厚が薄くなるようにエッチングを行い、上面の直径がR,底面の直径がL,高さがH,傾斜面の傾斜角がθである、円錐の上部を切断した裁頭状の円錐形の下部電極(電極用核)2a [0012] Next, as shown in FIG. 1 (b), according to the resist pattern 3 as a mask, the polysilicon film 2 is tapered etched away from a position corresponding to the end portion of the resist pattern 3, the etched so that the film thickness decreases, the diameter of the upper surface R, the diameter of the bottom L, height H, the inclination angle of the inclined surface is theta, discretion and cut the upper nosecone-shaped conical lower electrode (electrode for nuclear) 2a
を形成する。 To form. このテーパエッチングは、例えば、SF 6 The taper etching, for example, SF 6
/C 2 HCl 23の混合ガスを、10〜19/51〜 A mixed gas of / C 2 HCl 2 F 3, 10~19 / 51~
60〔SCCM〕流し、10〔mTorr〕,RF電力180〔W〕の条件で行う。 60 flowed [SCCM], under the conditions of 10 [mTorr], RF power 180 (W).

【0013】次に、レジストパターン3を除去し、図1 [0013] Next, a resist pattern 3 is removed, FIG. 1
(c)に示すように、下部電極2aの表面全体、つまり、上部平面と傾斜面全体とに、シリコン酸化膜(絶縁膜)4を形成する。 (C), the entire surface of the lower electrode 2a, that is, the entire upper flat inclined surface, a silicon oxide film (insulating film) 4 to form a. このシリコン酸化膜4は、例えば、 The silicon oxide film 4, for example,
1050〔℃〕で15秒間、ドライO 2雰囲気中で酸化を行うことにより、250〔Å〕成膜する。 1050 [℃] for 15 seconds, by performing oxidation in a dry O 2 atmosphere to 250 [Å] deposition.

【0014】さらに、このシリコン酸化膜4の表面全体、つまり、上部平面と傾斜面全面とに、上部電極としての多結晶シリコン膜(電極用膜)5を形成する。 Furthermore, the entire surface of the silicon oxide film 4, that is, an upper plane and the inclined surface entirely, polycrystalline silicon film (electrode film) as an upper electrode to form a 5. この多結晶シリコン膜5は、例えば、モノシランの減圧CV The polycrystalline silicon film 5 is, for example, vacuum CV of monosilane
D法により、640〔℃〕,15〔Pa〕の条件下で3 By Method D, 640 [℃], 3 under the conditions of 15 [Pa]
500〔Å〕成膜する。 500 [Å] is deposited.

【0015】これにより、図1(c)に示すように、多結晶シリコンからなる下部電極2a,シリコン酸化膜4,上部電極としての多結晶シリコン膜5の積層構造が形成され、これはすなわち、裁頭状の円錐形のキャパシタ10を構成している。 [0015] Thus, as shown in FIG. 1 (c), the lower electrode 2a made of polycrystalline silicon, silicon oxide film 4, polycrystalline laminated structure of the silicon film 5 as an upper electrode is formed, which is namely, Court constitute a capacitor 10 of the head-shaped conical.

【0016】ここで、図1(c)に示すキャパシタ10 [0016] Here, the capacitor 10 shown in FIG. 1 (c)
において、その容量を大きくする場合には、後の下部電極2aとなる多結晶シリコン膜2を形成するときに(図1(a))、その膜厚H′をより厚くし(H′>H)、 In the case of increasing the capacity, when forming a polycrystalline silicon film 2 serving as the lower electrode 2a after (FIG. 1 (a)), 'and thicker (H' has a thickness H> H ),
円形のレジストパターン3の直径Rは同一にし、後の下部電極2aとなる裁頭状の円錐形の底面積は一定となるように、つまり、底面の直径がLとなるように、テーパエッチングを行う。 The diameter R of the circular resist pattern 3 is the same, after the so become Court of bottom area of ​​the head-shaped conical lower electrode 2a is constant, that is, as the diameter of the bottom surface is L, and taper etching do.

【0017】そして、上記と同様にして、シリコン酸化膜4及び多結晶シリコン膜5を形成する。 [0017] Then, in the same manner as described above, to form a silicon oxide film 4 and the polycrystalline silicon film 5. これにより、 As a result,
図2に示すように、上記と同様に、裁頭状の錐体形のキャパシタ10′が形成されるが、このとき、下部電極2 As shown in FIG. 2, similarly to the above, court although the head-shaped capacitor 10 of the cone body shape 'is formed, this time, the lower electrode 2
a′は、図1(b)に示す下部電極2aに比較して、上面の直径R及び底面の直径Lは同一であるが、高さH′ a ', compared to the lower electrode 2a shown in FIG. 1 (b), the diameter R and the diameter L of the bottom surface of the top surface is the same, the height H'
はより高く(H′>H)、傾斜面の傾斜角θ′がより大きい(θ′>θ)裁頭状の錐体形となる。 The higher (H '> H), the inclination angle of the inclined surface theta' is the cone form larger (θ '> θ) truncated form. よって、この下部電極2a′の表面に成膜したシリコン酸化膜4′の表面積は、図1(c)のシリコン酸化膜4に比較して、 Therefore, the surface area of ​​the lower electrode 2a 'silicon oxide film 4 was deposited on the surface of', compared to the silicon oxide film 4 of FIG. 1 (c),
より大きくなり、つまり、容量がより大きくなるが、このとき、下部電極2a′の底面の直径Rは同一に形成しているから、この下部電極2a′上に積層したシリコン酸化膜4′及び多結晶シリコン膜5′を形成した後の半導体基板1上における占有面積は同一のまま、より容量の大きなキャパシタ10′が形成されたことになる。 Becomes larger, i.e., the capacity it becomes larger, this time, 'because the diameter R of the bottom surface of which was formed in the same, the lower electrode 2a' lower electrode 2a silicon oxide film 4 'and a multi-laminated on crystalline silicon film 5 'occupied area on the semiconductor substrate 1 after forming the remains same, the larger the capacitor 10 of capacitance' would be formed.

【0018】したがって、下部電極2aを形成する際に、その形状を調整することによって、半導体基板1上における占有面積は一定であるが、異なる容量のキャパシタ10を形成することができ、半導体装置の微細化, [0018] Therefore, when forming the lower electrode 2a, by adjusting its shape, the area occupied by the semiconductor substrate 1 is constant, it is possible to form the capacitor 10 of different capacities, the semiconductor device miniaturization,
高集積化を阻害することなく、容量の増加を図ることができる。 Without inhibiting high integration, it is possible to increase the capacity.

【0019】なお、上記実施の形態においては、後の下部電極2aとなる多結晶シリコン膜2を形成する際に、 [0019] In the above embodiment, when forming the polycrystalline silicon film 2 serving as the lower electrode 2a after,
その膜厚を調整することにより、容量の増大を図るようにした場合について説明したが、例えば、円形のレジストパターン3の直径を調整し下部電極2aの傾斜面の傾斜角θを変化させるようにしてもよく、この場合には、 By adjusting the film thickness, it has been described which is adapted achieve an increase in capacity, for example, so as to vary the inclination angle θ of the inclined surface of the lower electrode 2a to adjust the diameter of the circular resist pattern 3 at best, in this case,
キャパシタ10の高さを変化させることなく、容量の増大を図ることができる。 Without changing the height of the capacitor 10, it is possible to increase the capacity.

【0020】また、上記実施の形態においては、円形のレジストパターン3を形成してテーパエッチングを行うことにより、裁頭状の円錐形の下部電極2aを形成するようにした場合について説明したが、例えば、図3に示すように、四角形のレジストパターン3を形成してテーパエッチングを行うことによって、裁頭状の四角錐形の下部電極2aを形成するようにしてもよく、この場合にも、裁頭状の四角錐形の傾斜面の傾斜角を変化させることによって、シリコン酸化膜4の表面積を変更させることができるから、上記と同等の作用効果を得ることができる。 Further, in the above embodiment, by performing tapered etching by forming a circular resist pattern 3, with the case of forming the lower electrode 2a of the truncated form of the conical has been described, for example, as shown in FIG. 3, by performing tapered etching by forming a resist pattern 3 square, truncated shaped may be formed a lower electrode 2a of pyramidal, also in this case, by varying the inclination angle of the truncated form of square pyramid-shaped inclined surfaces, because it is possible to change the surface area of ​​the silicon oxide film 4, it is possible to obtain the same effects as described above. また、裁頭状の四角錐形に限らず、多角形のレジストパターン3を形成し、裁頭状の多角錐形を形成するようにしてもよく、この場合にも、上記と同等の作用効果を得ることができる。 Further, Court not limited to head-like pyramidal, the resist pattern 3 of polygonal form, a truncated form may be formed a pyramidal, also in this case, the effects and advantages similar to it is possible to obtain.

【0021】また、上記実施の形態においては、多結晶シリコン膜とシリコン酸化膜と多結晶シリコン膜の三層構造からなるキャパシタを形成した場合について説明したが、これに限らず、例えば金属と絶縁膜と金属との三層構造からなるキャパシタを形成する場合でも適用することができる。 Further, in the above embodiment has described the case of forming a capacitor comprising a three-layer structure of polycrystalline silicon film and the silicon oxide film and the polycrystalline silicon film is not limited thereto, for example a metal insulator it can be applied even in the case of forming a capacitor comprising a three-layer structure of the film and metal.

【0022】 [0022]

【発明の効果】以上説明したように、本発明の請求項1 As described in the foregoing, the first aspect of the present invention
に係る半導体装置の製造方法によれば、電極形成用の膜を形成した後、これを裁頭状の錐体形にエッチングして電極用核を形成し、この電極用核の表面全体を覆うように絶縁膜を形成し、さらに、絶縁膜の表面全体を覆うように電極用膜を形成するようにしたから、電極用核を形成する際に、底面積はそのままで裁頭状の錐体形の傾斜面の傾斜角度を調整することにより、この電極用核の上に成膜される絶縁膜の表面積を変化させることができ、 According to the method of manufacturing a semiconductor device according to, after forming a film for electrodes formed which was an electrode for nucleation formed etched into the frusto-like cone form, so as to cover the entire surface of the electrode core an insulating film is formed, further, it is so arranged to form an electrode for film to cover the entire surface of the insulating film, when forming the electrode for nuclear, bottom area head-shaped cone body shape as it exits Court by adjusting the inclination angle of the inclined surface, it is possible to change the surface area of ​​the insulating film formed on the electrode core,
基板上におけるキャパシタの占有面積は一定のままキャパシタの容量を変更することができる。 The area occupied by the capacitor on the substrate can change the volume of the constant while the capacitor.

【0023】また、本発明の請求項2に係る半導体装置によれば、裁頭状の錐体形にキャパシタを形成し、このキャパシタを、前記錐体形の中央部に電極用核,前記錐体形の外周に電極用膜を形成し、これら電極用核及び電極用膜間に、これら電極用核及び電極用膜を分離する絶縁膜との積層構造で形成したから、このキャパシタの裁頭状の錐体形の底面積は一定のまま傾斜面の傾斜角を変化させることにより絶縁膜の面積を変化させることができ、よって、半導体基板上における占有面積を一定のまま容量を変化させることができる。 Further, according to the semiconductor device according to claim 2 of the present invention, court forming a capacitor on the head shape of the cone form, the capacitor, the conical body shape central portion to the electrode for nuclei, of the cone forms outer peripheral electrode membrane is formed in, between these electrodes for nuclear and electrode film, since the formation of a laminated structure of an insulating film for separating these electrodes for nuclear and electrode films, truncated shaped cone of the capacitor bottom area of ​​the body shape can vary the area of ​​the insulating film by varying the inclination angle of the inclined surface remains constant, thus, it is possible to the area occupied on the semiconductor substrate is changed remains constant capacity.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】本発明による半導体装置の製造工程の一部を示す断面図である。 Is a sectional view showing a part of manufacturing process of a semiconductor device according to the invention; FIG.

【図2】本発明の動作説明に供する説明図である。 FIG. 2 is an explanatory diagram for describing the operation of the present invention.

【図3】本発明のその他の一例を示す説明図である。 3 is an other explanatory diagram showing an example of the present invention.

【図4】従来の半導体装置の製造工程の一部を示す断面図である。 4 is a sectional view showing a part of the manufacturing process of the conventional semiconductor device.

【符号の説明】 DESCRIPTION OF SYMBOLS

1 半導体基板 2 多結晶シリコン膜 2a 下部電極 3 レジストパターン 4 シリコン酸化膜 5 多結晶シリコン膜 1 semiconductor substrate 2 polycrystalline silicon film 2a lower electrode 3 resist pattern 4 silicon oxide film 5 polycrystalline silicon film

Claims (2)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】 基板上にキャパシタが形成された半導体装置の製造方法であって、前記基板上に電極形成用の膜を形成した後、これをエッチングして裁頭状の錐体形の電極用核を形成し、当該電極用核の表面全体を覆うように絶縁膜を形成し、さらに、当該絶縁膜の表面全体を覆うように電極用膜を形成することを特徴とする半導体装置の製造方法。 1. A method of manufacturing a semiconductor device in which the capacitor is formed on the substrate, after forming a film for electrodes formed on the substrate, which electrodes of the etched and truncated shaped cone form nucleation is formed, an insulating film is formed to cover the entire surface of the electrode core, furthermore, a method of manufacturing a semiconductor device, which comprises forming an electrode film so as to cover the entire surface of the insulating film .
  2. 【請求項2】 基板上にキャパシタが形成された半導体装置であって、前記キャパシタは、裁頭状の錐体形に形成され、前記錐体形の中心部に前記基板と接触して形成される電極用核と、前記錐体形の外周部に形成された電極用膜と、前記電極用核及び電極用膜間に形成されこれら電極用核及び電極用膜間を分離する絶縁膜と、の積層構造であることを特徴とする半導体装置。 2. A semiconductor device in which the capacitor is formed on the substrate, the capacitor is court formed in a head-shaped cone body shape, the electrode formed in contact with the substrate in the center of the cone forms and use nuclear, wherein the cone forms the outer circumference electrode is formed on part film, the insulating film is formed between the electrode core and electrode film to separate between the electrode core and electrode film, a stacked structure wherein a is.
JP6737298A 1998-03-17 1998-03-17 Manufacture of semiconductor device and semiconductor device using the method Withdrawn JPH11265978A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100849791B1 (en) 2007-03-12 2008-07-31 삼성전기주식회사 Printed circuit board with embedded capacitor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100849791B1 (en) 2007-03-12 2008-07-31 삼성전기주식회사 Printed circuit board with embedded capacitor

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