JPH11265959A - Package type semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten the pitch of inner connection terminals, by a method wherein a wiring forming surface where wirings are formed so as to stop up different openings is made to face inward, the one end of the wiring forming surface is connected to the corresponding inner connection terminals of a semiconductor chip, and the outer connection terminals are inserted into the openings of a sheet member. SOLUTION: The one ends 23a of a wiring 23 are made to protrude outward from the edge of a sheet member 22, and when the centers of the sheet member 22 and a semiconductor chip 11 are aligned with each other, the ends 23a of the wiring 23 have the same pitch with the inner connection terminals 13 of the semiconductor chip 11, terminate so as to be nearly coincident with the outer edges of the inner connection terminals 13, and connected to the corresponding inner connection terminals 13. Outer connection terminals 31 of solder balls are provided nearly throughout all the wide plane surface of the sheet member 22 and connected to the other ends 23b of the wiring 23, whose one ends are made to protrude outward from the edge of the sheet member 22 and connected to the inner connection terminals 13 of the semiconductor chip 11. By this setup, a pitch between the inner connection terminals 13 can be reduced to 60 μm or so, and inner connection terminals of this constitution are capable of coping with a semiconductor of large capacity.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a package type semiconductor device suitable for mounting on an external member such as a printed circuit board in a structure close to a semiconductor chip.

[0002]

2. Description of the Related Art For example, a semiconductor device used for an integrated circuit card, a mask ROM card for a game, a small portable telephone, etc. has a particularly strong demand for a smaller and thinner package. In order to meet such a demand, a packaging technology of a package type semiconductor device having a structure close to a chip (Chip Scale Package) has been developed. For example, flip chip mounting is known.

In the flip chip mounting, a metal bump electrode on a device forming surface of a bare chip is pressed against an electrode pad formed on one surface of a wiring board to connect (flip chip bonding). A specific structure of the flip chip mounting is disclosed in, for example, Japanese Patent Application Laid-Open No. H8-153739.

FIG. 10 is a longitudinal sectional view showing a schematic configuration of the package type semiconductor device disclosed in the above publication. In FIG. 1, a wiring board 1 and a semiconductor chip 2 are separately prepared. Among these, the wiring board 1 has a wiring 1a including a connected portion 1b on one surface, and is led out from the connected portion 1b to the other surface via, for example, a through-hole wiring 3, is exposed, and is arranged in a grid. And an external connection terminal 4. The semiconductor chip 2 is formed by a normal manufacturing process, and a bump electrode 2a as an internal connection terminal made of a conductive material, for example, metal is formed on a terminal formation region of the element formation surface by, for example, silver paste. It is formed by screen printing.

When connecting the semiconductor chip 2 to the wiring board 1, a bonding apparatus having a mechanism capable of vacuum-sucking the semiconductor chip 2 and a substrate driving apparatus for holding and horizontally driving the wiring board 1 are connected to the wiring board 1. On the other hand, flip-chip bonding is performed to mount the semiconductor chip 2 face-down. In this case, the semiconductor chip 2 is opposed to the wiring board 1, and the connected portion 1 of the wiring board 1 is
b, the corresponding bump electrodes 2a of the semiconductor chip 2 are positioned so as to face each other, and the bonding head is pressed down so that at least the tip of the bump electrode 2a is buried in the connected portion 1b so that both are pressed. In this state, the two are joined by, for example, thermally curing a silver paste for the connection pad 1b.

Thereafter, a sealing resin is filled between the semiconductor chip 2 and the wiring board 1, and then the resin is cured by, for example, heat to form a resin layer 5. When the resin filled between the semiconductor chip 2 and the wiring board 1 is cured, a load is applied between the semiconductor chip 2 and the wiring board 1 to displace the bump electrodes of the semiconductor chip and the connection pads of the board. The resin is cured while preventing.

[0007]

In the above-mentioned conventional package type semiconductor device, the connected portion 1b is formed corresponding to the bump electrode 2a, and the external portion is formed on the other surface through the through-hole wiring 3. Since the connection terminals 4 are led out and exposed, the pitch of the bump electrodes 2a is about 2
There is a problem that the pitch can be reduced to only about 50 μm, and it is not possible to sufficiently cope with a demand for a reduction in pitch accompanying an increase in the capacity of a semiconductor device.

Further, in the conventional package type semiconductor device, since the resin is filled by utilizing the capillary phenomenon, there is a problem that usable resins are limited to those having low viscosity.

Further, in the conventional package type semiconductor device, there is a problem that a difference in the amount of heat shrinkage between the semiconductor chip 2 and the wiring board 1 causes deterioration of the junction state of the contacts.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a package-type semiconductor device capable of reducing the pitch of internal connection terminals formed on a semiconductor chip. .

Another object of the present invention is to provide a package type semiconductor device which allows a wider selection of resin materials without being limited to a resin having a low viscosity.

Another object of the present invention is to provide a package type semiconductor device capable of maintaining a good connection state of internal connection terminals.

[0013]

The invention according to claim 1 is
A semiconductor chip in which a plurality of internal connection terminals are formed in a row in a predetermined terminal formation region; an insulating sheet member in which a plurality of openings are formed corresponding to predetermined external connection positions; and one surface of the sheet member And a plurality of wirings, one end of which extends from the edge of the sheet member at an interval corresponding to the internal connection terminal, and the other end of which is formed so as to cover different openings. One end of the wiring is connected to the internal connection terminal of the corresponding semiconductor chip, and the other end of the wiring is connected to the opening of the sheet member while being connected to the other end of the wiring. A package-type semiconductor device, comprising: an external connection terminal having a surface portion protruding from the other surface of the sheet member; and an insulating coating portion that covers and protects a portion where one end of the wiring is connected to the internal connection terminal. is there.

According to a second aspect of the present invention, in the package type semiconductor device according to the first aspect, the semiconductor chip has a rectangular planar shape, has a terminal forming region at each of four edges, and has an internal connection terminal. Are formed in the terminal formation regions, respectively, and are formed higher by a predetermined value than the surface of the semiconductor chip, and the covering portion is formed in a frame shape at the edge of the semiconductor chip.

According to a third aspect of the present invention, in the package type semiconductor device according to the first or second aspect, the covering portion is made of a thermosetting resin.

According to a fourth aspect of the present invention, in the package type semiconductor device according to the second or third aspect, the semiconductor device has substantially the same height as the internal connection terminal, and is located inside the internal connection terminal when viewed in a plane direction. And an insulating frame-shaped member for defining the formation area of the covering portion.

According to a fifth aspect of the present invention, in the package type semiconductor device according to any one of the first to fourth aspects, the wiring board has an air flow port inside a region where the covering portion is formed. is there.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail based on preferred embodiments. FIG. 1 shows a schematic configuration of a first embodiment of the present invention.
FIG. 2B is a plan view showing a stacked structure in which a part thereof is sequentially removed. In each of these figures, a semiconductor chip 1
Numeral 1 has a substantially square planar shape, and each of the four edges of the surface is a terminal forming region 12, and a large number of internal connection terminals 1 are formed in these terminal forming regions 12 in parallel with the edge of the chip.
3 are arranged in a line. Here, for simplification of the drawing, it is shown that six internal connection terminals 13 are arranged in four terminal formation regions, respectively. Internal connection terminal 13
Is a rectangular planar shape of 70 × 70-100 μm and height 2
It is formed by gold plating to have a thickness of 0 μm.

The wiring board 21 includes a sheet member 22 having a thickness of about 75 μm, for example, made of polyimide, and wiring 23 provided on one surface of the sheet member 22. Of these, the sheet member 22 has a substantially square planar shape slightly smaller than the semiconductor chip, as if reduced by the terminal formation region 12 of the semiconductor chip 11. This sheet member 22 has internal connection terminals 1
The openings 24 corresponding to the number 3 are formed in a grid pattern over the entire surface. The diameter of the opening 24 is about 0.5 mm.
The wiring 23 is formed on one surface of the sheet member 22, that is, on the upper side as viewed in FIG. 1A and on the back side as viewed in FIG. 1B.

One end 23a of these wirings 23 protrudes outward from the edge of the sheet member 22, and the other end 23b is formed in a circular shape so as to cover openings 24 different from each other. The wiring 23 is made of copper (C) having a width of about 20 μm and a thickness of about 10 μm.
u) It is made of foil and its surface has tin (Sn) of about 0.2 μm.
The portions that are plated and that project from the sheet member 22 have the same pitch as the internal connection terminals 13, and substantially coincide with the outer edges of the internal connection terminals 13 when the centers are aligned with each other. Is terminated. Note that the other end 23b of the wiring covering the opening 24 of the sheet member 22 is approximately 0.1 mm.
It has a diameter of about 7 mm. The one end 23a of the wiring is joined to the corresponding internal connection terminal 13.

External connection terminals 31 made of solder balls are fitted into the openings 24 of the sheet member 22, respectively. The external connection terminals 31 are joined to the other end 23b of the wiring.
Further, the sheet member 22 protrudes in a hemispherical shape on the other surface, that is, on the lower side in FIG. 1A and on the front side in FIG. 1B. The hemispherical projection has a diameter of about 0.65 mm on a plane. On the other hand, on the outer peripheral edge of the wiring board 21,
An insulating covering portion 32 for protecting a connection portion between one end 23a of the wiring and the internal connection terminal 13 is formed in a frame shape. The covering portion 32 penetrates inward from the outer edge of the sheet member 22, and the inside thereof covers the semiconductor chip 11 and the sheet member 22.
, And a space 33 surrounded by the covering portion 32.

Incidentally, a large circle in FIG. 1B is a protruding portion of the external connection terminal 31, a hatched circular portion indicates a cross section of the external connection terminal 31, and a small circle indicates the external connection terminal 31. Removed to show an opening 24 formed in the sheet member 22,
The state where the other end of the wiring is exposed at the back of the opening 24 is shown.

Next, a method of manufacturing the package type semiconductor device according to the first embodiment shown in FIG. 1 will be described below with reference to FIGS. First, as shown in FIG. 2, a semiconductor chip 11 having a substantially square planar shape and having an internal connection terminal 13 formed in a terminal forming region at a peripheral edge portion, and a semiconductor chip 11 as shown in FIG. 3. It has a substantially square planar shape smaller in size by the terminal forming region 12 than the chip 11, and one end 23 a is connected to the internal connection terminal 13.
And a plurality of wirings 23 extending outward from the edge of the sheet member 22 at intervals corresponding to the above, and a plurality of wirings 23 formed so that the other ends 23b cover different openings 24. I do.

Next, as shown in FIG.
80 μm slightly deeper than the sheet member 22
The bonding apparatus 40 includes a stage 42 having a depth of, a flat bottom surface, and a depression 41 capable of positioning the sheet member 22, and a bonding head 43 that can move up and down in opposition to the stage 42. The sheet member 22 is fitted into the depression 41 of the stage 42, and the wiring board 21 is mounted so that the wiring 23 is located on the upper surface.

On the other hand, the internal connection terminals 1 of the semiconductor chip 11
The bonding head 43 evacuates the surface opposite to the surface on which the internal connection terminals 13 are formed so that 1 faces downward, and the one end 23a of the wiring to be connected to each other and the internal connection terminals 11 face each other. Then, the stage 42 or the bonding head 43 is moved. Subsequently, the bonding head 43 is lowered and pressed to apply a load of 20 gf to one internal connection terminal, for example, at a joining temperature of 500 ° C., so that all the components formed on the wiring board 21 are formed as shown in FIG. Is connected to the internal connection terminal 13 of the corresponding semiconductor chip 11.

Next, as shown in FIG.
1 is positioned below and the wiring board 21 is positioned above, the assembly is fixed, and the epoxy resin 52 is connected using the syringe 51 to the internal connection terminal 13 and one end 2 of the wiring.
3a, and is continuously applied to the connection portion with, for example, 150
As shown in FIG. 7, by curing under the condition of 1 ° C. for one hour, a frame-shaped coating for covering and protecting the connection between the internal connection terminal 13 and one end 23a of the wiring at the peripheral edge of the semiconductor chip 11. A part 32 is formed.

Finally, as shown by the solid circle in FIG. 7, each opening 2 of the sheet member 22 forming the wiring board 21 is formed.
In FIG. 4 (see FIG. 1), for example, a solder ball having a diameter of 0.65 mm obtained by transferring a rosin-based flux to a part of a spherical surface is arranged and reflowed at a maximum temperature of 240 ° C. for a time of 20 seconds. A package type semiconductor device having the external connection terminals 31 having the shape shown in FIG. 1 is obtained.

Thus, according to the first embodiment, the external connection terminal 31 is provided in a wide plane area over substantially the entire surface of the sheet member 22, and the external connection terminal 31 is provided at the other end 23b.
Is connected to the internal connection terminal 13 of the semiconductor chip 11 while extending the one end 23a of the wiring connected to the internal connection terminal 13 of the semiconductor chip 11.
The pitch between them can be reduced to about 60 μm.
There is an effect that it is possible to cope with a large-capacity semiconductor device as compared with a conventional package-type semiconductor device employing a flip-chip bonding method, which can only be reduced to 50 μm.

To protect the connection between the one end 23a of the wiring extending from the sheet member 22 to the outside and the internal connection terminal 13, an epoxy resin 52 is applied to cover the frame-shaped cover 32. Since it is only formed, a wider range of resin materials can be selected without being limited to low-viscosity resins.

Further, one end 23a of the wiring extending from the edge of the sheet member 22 to the outside is connected to the internal connection terminal 13, and is surrounded by the covering portion 32, the semiconductor chip 11, and the sheet member 22. Since the recessed space 33 is formed, even if there is a difference in heat shrinkage between the semiconductor chip 11 and the wiring board 21, the difference can be absorbed by the undulation of the central portion of the wiring board 21. 13 and the one end 23a of the wiring can be maintained in a good connection state.

FIGS. 8A and 8B are plan views showing the configuration of a second embodiment of the package type semiconductor device according to the present invention. In this case, as shown in FIG.
A plurality of air circulation ports 25 are formed in a plane area other than the portion where the wiring 23 is formed, and finally a plurality of air circulation ports 25 are formed between the external connection terminals 31 formed of solder balls as shown in FIG. A packaged semiconductor device having the opening 25 is obtained.

According to the second embodiment, when the external connection terminals 31 are formed or connected to the parts to be connected, the solder balls are reflowed. Burst can be prevented beforehand.

FIGS. 9A and 9B are a sectional view and a plan view showing the structure of a third embodiment of the package type semiconductor device according to the present invention. In the figure, the same elements as those in FIG. 1 showing the conventional apparatus are denoted by the same reference numerals, and description thereof will be omitted. This embodiment prevents the epoxy resin when forming the covering portion 32 from penetrating further into the sheet member 22 without stopping slightly inside the outer edge of the sheet member 22. On the inside, for example, a frame member 34 made of, for example, silicon rubber, having a width of 0.5 to 1.0 mm and a thickness of about 25 μm is attached to the semiconductor chip 11, and then the internal connection terminal 13 and one end 23a of the wiring are attached. And the steps of forming the covering portion 32 with the epoxy-based resin 52 are performed.

According to the third embodiment, the covering portion 32
Is prevented from penetrating deeply into the gap between the semiconductor chip 11 and the sheet member 22 to form a space in which the region is defined.

It should be noted that by forming an air flow opening 25 similar to that shown in FIG. 8 in the sheet member 22 in the third embodiment, the rupture of the sheet member 22 can be prevented.

In the above embodiments, the internal connection terminals 13 are formed in the terminal formation region 12 of the semiconductor chip 11 by the gold plating method. Instead, a method of forming stud bumps by a ball bonding apparatus is adopted. Is also good. In the above embodiments, the wiring 23 formed on the insulating substrate is plated with tin (Sn).
n) Gold (Au) plating may be applied instead of plating. Furthermore, in each of the embodiments described above, the semiconductor chip is described as having a single layer, but the present invention can also be applied to a multilayer structure having a GND plane.

In each of the above embodiments, an epoxy resin is used as the covering portion. However, a silicone resin may be used instead. Further, in each of the above embodiments, a semiconductor chip having a substantially square planar shape is targeted, but the present invention is not limited to this, and can be applied to most semiconductor chips having a rectangular planar shape.

[0038]

As apparent from the above description, according to the first aspect of the present invention, one end extends from the edge of the insulating sheet member at an interval corresponding to the internal connection terminal of the semiconductor chip. Using a wiring board including a plurality of wirings formed so that the other ends of the openings formed corresponding to the connection positions are different from each other, with the wiring forming surface inside and one end thereof It is connected to the internal connection terminal of the corresponding semiconductor chip, and further, the external connection terminal is fitted into the opening of the sheet member, so that the pitch of the internal connection terminal formed on the chip is compared with the conventional device. It can be greatly reduced.

According to the second aspect of the present invention, the internal connection terminal is connected to one end of the wiring at each edge of the semiconductor chip having a rectangular planar shape, and the connection portion is formed by a frame-shaped covering portion. Because of the configuration of covering, a space surrounded by the covering portion, the semiconductor chip, and the sheet member is formed, and even if there is a difference in the heat shrinkage between the semiconductor chip and the wiring board, the center of the wiring board is Since the stress can be absorbed by the undulation of the portion, there is also an effect that the connection state between the internal connection terminal and one end of the wiring can be favorably maintained.

According to the third aspect of the present invention, since the covering portion has a frame-like covering portion made of a thermosetting resin, it is not limited to a low-viscosity resin, and a wider range of resin materials can be selected and used. There is also an effect that can be done.

According to the fourth aspect of the present invention, since the insulating frame-shaped member for defining the formation region of the covering portion inside the internal connection terminal is provided, the coating is applied to form the covering portion. There is also an effect that it is possible to prevent the thermosetting resin from penetrating deep into the gap between the semiconductor chip and the sheet member, and to form a space in which the region is defined.

According to the fifth aspect of the present invention, since the wiring board having the air circulation port inside the area where the covering portion is formed is used, the rupture of the sheet member due to the expansion of the air in the space is prevented. There is also an effect that can be prevented.

[Brief description of the drawings]

FIG. 1 is a longitudinal sectional view showing a schematic configuration of a first embodiment of the present invention, and a plan view showing a laminated structure in which a part thereof is sequentially removed.

FIG. 2 is a longitudinal sectional view and a plan view of a semiconductor chip constituting the first embodiment shown in FIG. 1;

FIGS. 3A and 3B are a vertical sectional view and a plan view of a wiring board constituting the first embodiment shown in FIG. 1;

FIG. 4 is a view showing a schematic configuration of a bonding apparatus for explaining the manufacturing method of the first embodiment shown in FIG. 1;

FIG. 5 is a plan view showing a connection state between a semiconductor chip and a wiring board for explaining the manufacturing method of the first embodiment shown in FIG. 1;

FIG. 6 is an explanatory view showing an applied state of an epoxy resin for forming a covering portion for explaining the manufacturing method of the first embodiment shown in FIG. 1;

FIG. 7 is a plan view showing an attached state of the external connection terminal for explaining the manufacturing method of the first embodiment shown in FIG. 1;

FIG. 8 is a plan view of a wiring board constituting a second embodiment of the present invention and a plan view showing an assembled state thereof.

FIG. 9 is a longitudinal sectional view showing a schematic configuration of a third embodiment of the present invention, and a plan view showing a laminated structure in which a part thereof is sequentially removed.

FIG. 10 is a longitudinal sectional view showing a schematic configuration of a conventional package type semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Semiconductor chip 12 Terminal formation area 13 Internal connection terminal 21 Wiring board 22 Sheet member 23 Wiring 23a One end of wiring 23b The other end of wiring 24 Opening 25 Air circulation port 31 External connection terminal 32 Covering part 33 Space 34 Frame type member 40 Bonding device 41 Depression 42 Stage 43 Bonding head 51 Syringe 52 Resin

Claims (5)

[Claims] 1. A semiconductor chip having a plurality of internal connection terminals formed in a row in a predetermined terminal formation region, and an insulating sheet member having a plurality of openings formed corresponding to predetermined external connection positions. And one end is formed to extend from an edge of the sheet member at an interval corresponding to the internal connection terminal, and the other end is formed so as to close the different openings. A plurality of wirings, a wiring board having one end of each of the wirings connected to an internal connection terminal of the corresponding semiconductor chip, with the formation surface of the wiring being the semiconductor chip side, and the other end of the wirings And an external connection terminal having a surface portion protruding from the other surface of the sheet member and covering a portion where one end of the wiring is connected to the internal connection terminal. , Protect Packaged semiconductor device and an insulating covering part. 2. The semiconductor chip according to claim 1, wherein said semiconductor chip has a rectangular planar shape, has said terminal forming region at each edge of four sides, and said internal connection terminals are respectively formed in said terminal forming region. 2. The package-type semiconductor device according to claim 1, wherein the cover is formed to be higher than a surface of the semiconductor chip by a predetermined value, and the covering portion is formed in a frame shape at an edge of the semiconductor chip. 3. The method according to claim 1, wherein the coating is made of a thermosetting resin.
Or the package type semiconductor device according to 2. 4. It has substantially the same height as said internal connection terminal,
The package-type semiconductor device according to claim 2, further comprising an insulating frame-shaped member that determines a formation region of the covering portion inside the internal connection terminal when viewed in a plane direction. 5. The package type semiconductor device according to claim 1, wherein said wiring board has an air flow port inside a region where said covering portion is formed.