JPH11261414A - Frequency synthesizer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a frequency synthesizer provided with a simple and effective lock speedup arrangement. SOLUTION: A basic PLL loop is composed of a phase detector 12 of basic frequency 200 KHz, a filter circuit 13, a VCO 10 and a frequency divider 11. A control circuit 14 controls switching of high and low two frequencies. The control circuit 14 controls simultaneously output to the frequency divider 11 and a speed up circuit 15 through 14a, a high voltage or a low voltage is supplied in to the filter circuit 13 from 13a and operation of the VCO is made stable at high speed by selecting either an analog switch 18 or 19.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency synthesizer used for a receiving device or a transmitting device for communication such as a digital telephone.

[0002]

2. Description of the Related Art For example, GSM (Global System for Mobi)
le Communications) Phones can use frequency synthesizers to switch between receive and transmit frequencies, or for frequency hopping either during transmission or reception. Such a frequency synthesizer has 1
Hopping of a 70 MHz bandwidth within one GSM time interval (570 μS) is required. This is difficult to achieve because it is necessary to keep the loop bandwidth of the synthesizer to a minimum and to maintain low power run-time phase noise levels.

[0003]

SUMMARY OF THE INVENTION Previous studies have shown a method of temporarily increasing the bandwidth of a synthesizer loop,
Alternatively, an attempt is made to speed up the lock of the synthesizer loop by applying an external voltage to the voltage input terminal of the oscillator used in the synthesizer so that the oscillator frequency quickly approaches the required frequency. I have been. However, the methods presented in these prior arts can completely speed up the lock of the synthesizer loop because other active components such as an operational amplifier and a voltage-controlled amplifier are introduced into the synthesizer loop. Was not.

An object of the present invention is to provide a frequency synthesizer having a simple and effective lock-up arrangement.

[0005]

According to the present invention, there is provided a frequency synthesizer comprising: a voltage controlled oscillator; a phase detector for receiving a feedback signal corresponding to an output of the voltage controlled oscillator and a fundamental frequency signal; A reference voltage connection unit, which is provided between the voltage control oscillator and receives an output of the phase detector and outputs the input to a frequency control voltage input unit of the voltage control oscillator, and a time constant of which changes according to an applied voltage; And a speed-up circuit for applying a voltage signal to a reference voltage connection of the filter circuit when a change in the frequency of the output of the voltage-controlled oscillator is required.

In this case, the speed-up circuit has an output capacitively coupled to a reference voltage connection of the filter circuit, and has a resistor for connecting the reference voltage connection of the filter circuit to a reference voltage. It may be that.

Further, the speed-up circuit may have a plurality of analog switches, and each of the plurality of analog switches controls connection of a different voltage power supply to an output section of the speed-up circuit.

Further, the speed-up circuit may have a digital-analog converter for applying a voltage determined by a value of an input digital signal to an output section of the speed-up circuit.

In any of the above, a frequency divider which divides the output of the voltage controlled oscillator and supplies it as the feedback signal to the phase comparator, controls the frequency division ratio of the frequency divider, and increases the speed. The circuit may further include a control circuit that controls so as to output a voltage corresponding to a frequency division ratio in the frequency divider.

[0010]

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention. This embodiment is a simple synthesizer that operates at only two frequencies, and includes a voltage-controlled oscillator (VC
FIG. 1 shows a basic synthesizer loop having a variable frequency divider 11 for performing feedback from a voltage controlled oscillator (O) 10 to a phase detector 12.

An output voltage from the phase detector 12 is applied to a frequency control voltage input section of the voltage controlled oscillator 10 via a filter circuit 13. The control circuit 14 determines the frequency division ratio of the frequency divider 11.

The frequency synthesizer in this embodiment is
It differs from conventional frequency synthesizers in that the filter circuit 13 operating as a low-pass filter with a narrow bandwidth has a voltage reference connection 13a connected to a speed-up circuit 15 instead of a fixed voltage reference power supply.

The speed-up circuit 15 shown in FIG. 1 is simple for use in situations where switching of the voltage controlled oscillator 10 between only two different frequencies is required. Therefore, the speed-up circuit 15 includes resistors R1 and R2 connected in series between the + V power line and the -V power line.
And R3 and nodes 16 and 17 between resistors R1 and R2 and R2 and R3 provide positive and negative voltage signals. Each connection point 16 and 17 is connected to an output line 20 via analog switches 18 and 19, respectively.

The output line 20 is connected to a reference voltage connection 13a of the filter circuit 13 via a capacitor 21. Resistor 22 connects the reference voltage connection 13a to the reference voltage V _{Re f.} Analog switches 18 and 1
An operation 9 is controlled by an output 14a from the control circuit 14, and an analog switch 18 which is one of them is controlled by an output via an inverter 23.

In the operation of this embodiment, the output 14a is
It is high if one frequency is required and low if the other is required. The output 14a switches between a high state and a low state at the same time as the control output to the frequency divider 11 changes. When a change occurs in the output 14a, one of the analog switches 18 or 19 is shut off,
The other conducts. As a result, the positive voltage signal or the negative voltage signal on the side of the analog switch that has become conductive among the connection points 16 and 17 is added to the reference voltage V _Ref , and is substantially equal to the amount required for the required output frequency change. The voltage applied to the input of the voltage controlled oscillator 10 changes immediately and the loop stabilizes rapidly at the new frequency. At this time, the voltage applied to the reference voltage V _Ref is reduced with time by the resistor 22, so that the time constant of the capacitor 21 and the resistor 22 must be longer than the time constant of the filter circuit 13. Instead, it is set in this way.

Next, a second embodiment of the present invention will be described.

FIG. 2 is a circuit block diagram showing a main part of the second embodiment of the present invention. In this embodiment, a digital-to-analog converter (D / A) 23 is provided in place of the speed-up circuit 15 in the embodiment shown in FIG. The other parts are the same as those of the first embodiment shown in FIG.

In this embodiment, a control device 14 is arranged to control the frequency divider 11 so that many different frequencies are provided. In that case, the control device 14 is configured to generate a digital output corresponding to the difference between the old frequency and the new frequency, and the speed-up circuit is simply configured by the capacitor 21 and the resistor 22 with the reference voltage connection 13a. And a digital-analog converter 23 having an output section connected to the digital-to-analog converter.

[0020]

Since the present invention is configured as described above, it has the following effects.

Since no additional active components are incorporated in the feedback loop, the above speed-up circuit operates without degrading the phase noise performance of the synthesizer.

Since there is no current leakage from the loop filter, it is considered that the rise of the sideband level does not occur. These circuits are very simple and easy to implement in a real system. In a mobile telephone system, switching from the standby operation to the normal operation can be performed very quickly, so that the start of the synthesizer operation can be delayed and the battery current can be saved.

[Brief description of the drawings]

FIG. 1 is a diagram of a simple synthesizer for operation at only two frequencies.

FIG. 2 is a diagram showing a modification of the example shown in FIG. 1 so that it can operate at many different frequencies.

[Explanation of symbols]

 11 Minute period 12 Phase detector 13 Filter circuit 13a Reference voltage connection part 14 Control device 14a Output 15 Speed-up circuit 23 Digital-analog converter

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Justin Clark UK, Berkshire RGS 20 TD, Reading, Imperial Way, Imperium, Level 3, NEC Technology UK Limited

Claims (5)

[Claims] A voltage-controlled oscillator; a phase detector that receives a feedback signal and a fundamental frequency signal corresponding to an output of the voltage-controlled oscillator; and a phase detector that is provided between the phase detector and the voltage-controlled oscillator; A filter circuit having a reference voltage connection unit that receives an output of the phase detector, outputs the input to a frequency control voltage input unit of the voltage controlled oscillator, and changes a time constant according to an applied voltage; A high-speed circuit for applying a voltage signal to a reference voltage connection of the filter circuit when a frequency change is required. 2. The frequency synthesizer according to claim 1, wherein the speed-up circuit has an output capacitively coupled to a reference voltage connection of the filter circuit, and the output of the high-speed circuit is referenced to the reference voltage connection of the filter circuit. A frequency synthesizer comprising a resistor connected to a voltage. 3. The frequency synthesizer according to claim 1, wherein the speed-up circuit has a plurality of analog switches, and each of the plurality of analog switches is connected to an output section of the speed-up circuit of a different voltage power supply. Frequency synthesizer characterized by controlling the connection of the frequency synthesizer. 4. The frequency synthesizer according to claim 1, wherein the speed-up circuit includes a digital-to-analog converter for applying a voltage determined by a value of an input digital signal to an output section of the speed-up circuit. A frequency synthesizer comprising: 5. The frequency synthesizer according to claim 1, wherein the frequency divider divides an output of the voltage controlled oscillator and supplies the output as the feedback signal to the phase comparator. A frequency synthesizer further comprising: a control circuit that controls a frequency division ratio of the frequency divider and controls the speed-up circuit to output a voltage corresponding to the frequency division ratio of the frequency divider.