JPH11261044A - Semiconductor device with solid-state image sensing element and manufacture of this semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device with a CCD, which has the area made narrower than that of a conventional semiconductor device with a CCD, and a method of manufacturing the semiconductor device. SOLUTION: A semiconductor device is provided with a multilayer board 110, a semiconductor chip 111 for peripheral circuit and a CCD solid-state image sensing element 112. The board 110 has second and first pad electrodes 124 and 125, on which the chip 111 is flip-chip mounted, on the side surface on one side of the side surfaces opposing to each other of the board 110 and has third pad electrodes 126 on the other side surface. As the element 112 is arranged on the chip 111 flip-chip mounted on the board 110, the extension, which is extended in the direction intersecting orthogonally the thickness direction of the board 110, of the semiconductor device can be reduced and the area of the whole semiconductor device can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device with a solid-state image pickup device in which a CCD (charge-coupled device) type solid-state image pickup device and peripheral circuits such as a video signal processing circuit are integrally formed. The present invention relates to a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art Recently, with the spread of communication including images, the demand for small cameras that can be incorporated in notebook personal computers and portable information terminals has been increasing. . Such a small camera is an LSI in which a solid-state imaging device and peripheral circuits such as a signal processing circuit of the camera are integrated in one chip.
One-chip cameras have been proposed. As the solid-state imaging device, a CCD solid-state imaging device has been well known, but recently, a MOS solid-state imaging device has begun to be used. This is because the MOS solid-state image sensor is a digital IC
Since it is composed of the same MOS transistor as
This is because integration of the MOS solid-state imaging device and peripheral circuits such as a video signal processing circuit can be performed relatively easily as compared with the case where a CCD solid-state imaging device is used. However, at present, the image quality obtained by the MOS type solid-state imaging device is as follows.
There is a disadvantage that the image quality is inferior to the image quality of the CCD solid-state imaging device. In order to solve such a drawback, as shown in FIGS. 10 to 12, a solid-state imaging device and its peripheral circuits are housed in a single package by using a CCD solid-state imaging device that excels in image quality. A CCD camera module 1 has been proposed. That is, the CCD camera module 1
A CCD solid-state imaging device 11, a driving circuit 12 for the imaging device 11, a noise reduction circuit 13 for an output signal of the imaging device 11, and a DSP 14 used for video signal processing and the like on a silicon substrate 15. It is mounted and sealed to form one chip. On the silicon substrate 15, a wiring pattern is drawn by aluminum, and each of the LSIs constituting the image sensor 11, the driving circuit 12, the noise reduction circuit 13, and the DSP 14 is electrically connected to the wiring pattern by a bonding wire 16. Connected. The silicon substrate 15
The ceramic package 17 is housed in a ceramic package 17 and is sealed by a face plate 18. A portion of the face plate 18 facing the CCD solid-state imaging device 11 is formed by an infrared filter 19 so as to transmit light from the outside of the ceramic package 17 to the CCD solid-state imaging device 11. It is configured. Further, a lens holder 20 is attached so as to cover the ceramic package 17, and a lens 21 is supported by the lens holder 20 at a position facing the infrared filter 19. Therefore, the light passing through the lens 21 passes through the infrared filter 19 and
The light reaches the CD-type solid-state imaging device 11. The CCD camera module 1 configured as described above is mounted on one side surface 23 of the printed circuit board 22. The printed circuit board 22
On the other side surface 24, components 2 such as a video signal output circuit are provided.
5 is attached.

However, in the CCD camera module 1, as described above, a single solid-state image pickup device 11, a drive circuit 12, a noise reduction circuit 13, and four LSI chips constituting the DSP 14 are formed on one silicon substrate 15 in a plane. The CCD camera module 1 has a large planar area. The present invention has been made to solve such a problem,
It is an object of the present invention to provide a semiconductor device with a solid-state imaging device which uses a CCD solid-state imaging device, is formed in one package, and has a reduced area, and a method for manufacturing the semiconductor device.

[0004]

According to a first aspect of the present invention, a semiconductor device with a solid-state imaging device has a first pad electrode and a second pad electrode on one of two opposing side surfaces, and a second pad electrode on the other. A substrate having three pad electrodes, wherein the first and second pad electrodes are electrically connected to the third pad electrode, and a first electrically connected to the first pad electrode via a metal wire; A CCD solid-state imaging device having electrodes on a light-receiving side surface and transferring electric charges by light reception; and a semiconductor chip for a peripheral circuit electrically connected to the CCD solid-state imaging device, wherein the semiconductor chip for a peripheral circuit is flipped to the second pad electrode. A second electrode to be mounted on a chip, on an electrode forming surface disposed opposite to the one side surface of the substrate, and the electrode forming surface of the peripheral circuit semiconductor chip with respect to the CCD solid-state imaging device; Telephone facing Unformed surface is characterized by including a semiconductor chip for peripheral circuits are arranged to face the non-light-receiving side surface opposite to the light-receiving side surface of the CCD solid-state imaging device.

According to a method of manufacturing a semiconductor device with a solid-state imaging device according to a second aspect of the present invention, one of two opposing side surfaces has a first pad electrode and a second pad electrode, and the other has a third pad electrode. A second pad electrode on a substrate having a pad electrode and electrically connecting the first and second pad electrodes to the third pad electrode;
A second electrode formed on the electrode forming surface of the peripheral circuit semiconductor chip electrically connected to the CD type solid-state imaging device is flip-chip mounted, and an electrode of the peripheral circuit semiconductor chip facing the electrode forming surface is flip-chip mounted. Non-formed surface and the above CC
After the semiconductor chip for the peripheral circuit and the CCD solid-state imaging device are mounted on the substrate, the non-light-receiving side surface of the D-type solid-state imaging device faces the non-light-receiving side surface. A first electrode formed on the opposing light-receiving surface side and the first pad electrode of the substrate are electrically connected by a metal wire.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device with a solid-state imaging device and a method for manufacturing the semiconductor device with a solid-state imaging device according to an embodiment of the present invention will be described below with reference to the drawings.
In the drawings, the same components are denoted by the same reference numerals. In the present embodiment, a CCD type solid-state imaging device is used as the solid-state imaging device, and as shown in FIG.
The semiconductor device 101 with a CD is roughly classified into a multilayer substrate 110
And a peripheral circuit semiconductor chip 111 and a CCD solid-state imaging device 112. As shown in FIG. 2 or FIG. 7, the multilayer substrate 110 as an interposer, which is called a carrier, has a square planar shape with one side of 6 mm. For example, a plate material 121 made of a ceramic or resin material is laminated in a plurality of layers. And a second pad electrode 124 on which the peripheral circuit semiconductor chip 111 is flip-chip mounted, and the CCD type solid-state imaging device. A first pad electrode 125 electrically connected to the second electrode 136 of the element 112 by a metal line 137 is formed.
In this embodiment, the first pad electrode 125 is formed along the periphery of the multilayer substrate 110, and the second pad electrode 124 is formed inside the first pad electrode 125. On the other side surface 123, a third pad electrode 126 for electrically connecting the semiconductor device 110 to, for example, a printed circuit board is formed.
As the third pad electrode 126, an LGA (land grid array) type or a BGA (ball grid array) type can be used. In order to electrically connect the second pad electrode 124 and the first pad electrode 125 to the third pad electrode 126, a via 1
27 are formed along the thickness direction of the plate material 121, the extending direction orthogonal to the thickness direction, and the like. In FIG. 2, FIG.
The illustration of the package member 173 and the like shown in FIG.
The “multi-layer” means that the vias 127 formed along the extending direction are formed in a plurality of layers in the plate thickness direction. Therefore, the multi-layer substrate 110 is not necessarily limited to the one on which the plate members 121 are laminated,
As long as the vias 127 are formed in a plurality of layers, the plate material 121 may be constituted by one sheet. As described above, in the present embodiment, since the first pad electrode 125 is connected to any of the third pad electrodes 126 by using the multilayer substrate 110, for example, as shown in FIG. It is not necessary to provide the internal leads 6 extending in the direction perpendicular to the thickness direction, and the area of the semiconductor device with CCD can be reduced. When the reduction of the area is not a problem, the structure of the semiconductor device having the internal leads 6 may be adopted. In FIG. 13, 1 is a first semiconductor chip, 2 is a second semiconductor chip, 3 is a bump, 4 is a metal wire, 5 is an island, 7 and 8 are pad electrodes, and 9 is a sealing material.

Semiconductor chip 111 for peripheral circuit and CCD
In the present embodiment, the solid-state image sensor 112 is a chip itself in which an integrated circuit is formed on a silicon wafer, that is, a so-called bare chip. However, the present invention is not limited to this. This is a concept including a structure such as a so-called CSP (chip size package) formed by sealing the bare chip formed with the above. The CCD solid-state imaging device 112 is one that has been used in the past, and a photosensitive portion 172 having a condensing lens 171 is provided on a light-receiving side surface 135 that is one side surface in the thickness direction of the CCD solid-state imaging device 112. The charge is transferred by the provided light reception. Also, as shown in FIG.
The CD-type solid-state imaging device 112 has a square planar shape with a side of 5 mm, and occupies almost the same area as the peripheral circuit semiconductor chip 111 in this embodiment. In addition, one or a plurality of first electrodes 136 that are electrically connected to the first pad electrodes 125 of the multilayer substrate 110 through metal wires 137 are formed on the light receiving side surface 135.

The semiconductor chip 111 for the peripheral circuit is connected to the CCD solid-state image pickup device 112 through the multilayer substrate 110.
11 and FIG.
2, a drive circuit 12, a noise reduction circuit 13, and a DS
The function of P14 is integrated on one chip.
It performs operations such as driving the D-type solid-state imaging device 112 and processing of an output video signal. As shown in FIG. 7, the peripheral circuit semiconductor chip 111 has a square planar shape with a side of 5 mm and is smaller than the multilayer substrate 110 so as to be arranged inside the first pad electrode 125. Area. One or more second electrodes 129 are formed on an electrode forming surface 128 which is one side surface in the thickness direction of the peripheral circuit semiconductor chip 111. The second electrode 12
9, as shown in FIGS. 7A to 7C, the conductive paste 131 containing silver after the bump 130 is formed.
Is transferred. Such a peripheral circuit semiconductor chip 11
Reference numeral 1 denotes a side surface of the multilayer substrate 110 corresponding to the second electrode 129 formed on the semiconductor chip 111 for the peripheral circuit.
The second pad electrode 124 formed on the substrate 22 is electrically connected to the bump 130 via the conductive paste 131, and is flip-chip mounted on the side surface 122 of the multilayer substrate 110. After the attachment, the sealing material 133 is injected from the sealing material injection nozzle 132 into the gap between the peripheral circuit semiconductor chip 111 and the side surface 122 of the multilayer substrate 110 as shown in FIG. The gap is sealed.

Such a semiconductor chip 111 for a peripheral circuit
As shown in FIG. 7D, the non-electrode forming surface 134 of the peripheral circuit semiconductor chip 111 facing the electrode forming surface 128 is used for the CCD solid-state imaging device 112.
And the light-receiving side surface 1 of the CCD solid-state imaging device 112.
The peripheral circuit semiconductor chip 111 mounted on the multilayer substrate 110 by flip-chip bonding has a C
The CD-type solid-state imaging device 112 is fixed. In addition, the first
The electrode 136 is electrically connected to the first pad electrode 125 by a metal wire 137 as described above and as shown in FIG. In this embodiment, the semiconductor chip 111 for the peripheral circuit and the CCD solid-state imaging device 112 are fixed with the adhesive 139 as described above. However, the present invention is not limited to this. For example, mechanical joining can be performed.

After the electrical connection between the first electrode 136 and the first pad electrode 125 is established by the metal wire 137,
A package member 173 is placed on the side surface 122 of the multilayer substrate 110 to seal the metal wires 137, the semiconductor chip 111 for peripheral circuits, and the CCD solid-state imaging device 112. In the package member 173, a wall portion 174 facing the light receiving side surface 135 of the CCD solid-state imaging device 112 is formed of a translucent material having an IR diffraction grating. Therefore, the light passes through the IR diffraction grating of the wall portion 174, enters the condensing lens 171 of the CCD solid-state imaging device 112, and reaches the photosensitive portion 172. When the package member 173 is covered, a gap 175 between the inner surface of the wall 174 and the light receiving side surface 135 of the CCD solid-state imaging device 112 is about 1 mm.

In the method for manufacturing the semiconductor device with CCD 101 described above with reference to FIG. 7, a conventional flip chip mounting technique and a wire bonding technique can be used. CCD type solid-state imaging device 11 on semiconductor chip 111 for peripheral circuit
2 can be incorporated. Therefore,
There is no need to develop a new manufacturing process, so that cost increase can be suppressed.

As described above, the CCD-equipped semiconductor device 10
According to No. 1, the CCD solid-state imaging device 112 and the peripheral circuit semiconductor chip 111 are superposed along the thickness direction of the multilayer substrate 110, so that the CCD solid-state imaging device 112 is more planar than the conventional CCD camera module 1 shown in FIG. Therefore, the area can be reduced. Further, by making the CCD type solid-state imaging device 112 substantially the same size as the peripheral circuit semiconductor chip 111 in plan view, the conventional multilayer substrate 1 which does not require the internal leads 6 is formed.
Due to the synergistic effect with 10, the circuit can be highly integrated and the area can be reduced as compared with the related art. That is, in the semiconductor chip 111 for the peripheral circuit, the second electrode 12 of the semiconductor chip 111 for the peripheral circuit is mounted by flip-chip mounting.
9 and the second pad electrode 124 of the multilayer substrate 110 are electrically connected. On the other hand, in order to achieve electrical connection in the CCD solid-state imaging device 112 in such a state, the first pad electrode 125 of the multilayer substrate 110 electrically connected to the first electrode 136 via the metal line 137 is required. It is arranged on the peripheral edge of the occupied area of the peripheral circuit semiconductor chip 111. In such a state, in order to reduce the area, a third side 123 facing the side 122 of the multilayer substrate 110 on which the first pad electrode 125 is formed is provided.
A pad electrode 126 was formed, and the first pad electrode 125 and a part of the third pad electrode 126 were electrically connected by a via 127 formed in the multilayer substrate 110. With this configuration, it is not necessary to provide the internal leads 6 as shown in FIG. 13, and the area of the entire semiconductor device can be reduced. As described above, the non-electrode forming surface 134 of the peripheral circuit semiconductor chip 111 and the non-light receiving side surface 138 of the CCD solid-state imaging device 112 are opposed to each other, and the first electrode 136 and the first pad electrode 125 are connected to the metal wire. 1
Since the electrical connection is made at 37, the CCD solid-state imaging device 112 having the same size as the peripheral circuit semiconductor chip 111 can be used, and high integration of the circuit can be achieved.

In the above description with reference to FIG. 7, the CCD solid-state imaging device 112 is fixed on the peripheral circuit semiconductor chip 111 after the peripheral circuit semiconductor chip 111 is flip-chip mounted on the multilayer substrate 110. The order of the steps is not limited. That is, first, the non-electrode forming surface 134 of the peripheral circuit semiconductor chip 111 and the non-light receiving side surface 138 of the CCD solid-state imaging device 112 are bonded to the adhesive 13.
After bonding in step 9, the peripheral circuit semiconductor chip 111 may be flip-chip mounted on the multilayer substrate 110.

The semiconductor device with CCD 101 described above is a case in which the semiconductor chip 111 for the peripheral circuit is composed of one chip, but the present invention is not limited to this. That is, like the semiconductor device 102 with CCD shown in FIG.
152. In this case, chip 1
By setting the thickness t1 of the chip 51 and the thickness t2 of the chip 152 to be the same, these chips 151 and 152 are formed.
The CCD solid-state imaging device 112 can be mounted thereon, and the CCD solid-state imaging device 112 can be larger than each of the chips 151 and 152.

In the case of the semiconductor device with CCD 102, for example, two chips 151 and 152 mounted flip-chip on the multilayer substrate 110 are sealed with the sealing material 133 as described above. But
As shown in FIG. 8, the CCD solid-state imaging device 112 to be stacked can be fixed by the sealing material 133 injected into the portion 153 sandwiched between the two chips 151 and 152. That is, the chips 151 and 152 and the CC
Instead of bonding the D-type solid-state imaging device 112 with the adhesive 139, the sealing material 133 also has the function of the adhesive 139. By doing so, the sealing material 13
3 and the steps of applying and curing the adhesive 139 can be completed at one time, and the manufacturing time can be reduced.

A semiconductor device 103 with a CCD as shown in FIG. 4 can also be constructed. Semiconductor device with CCD 1
Numeral 03 denotes a first layer formed on the side surface 122 of the multilayer substrate 110 in the above-described semiconductor device 101 with a CCD, for example.
Pad electrode 125 and second pad electrode 1 adjacent thereto
24, the outflow prevention portion 16 as shown in detail in FIG.
0 is provided. The outflow prevention unit 160 is formed of, for example, a ceramic material, is formed by printing a glass material, or is formed from a sheet material. After the peripheral circuit semiconductor chip 111 is flip-chip mounted on the multilayer substrate 110 as described above, the sealing material 133 is provided between the electrode forming surface 128 of the peripheral circuit semiconductor chip 111 and the side surface 122 of the multilayer substrate 110. The sealing material 133 is first injected.
The outflow prevention section 160 functions as a weir to prevent the outflow of the sealing material 133 so as not to flow out to the pad electrode 125. The height of the outflow prevention portion 160 along the thickness direction of the multilayer substrate 110 is determined by the peripheral circuit semiconductor chip 1 to be sealed.
11 or the amount of the sealing material 133 used.
The height is set so as not to overflow to the fifth side. By providing such an outflow prevention portion 160, a region where the sealing material 133 flows can be defined, so that it is not necessary to provide a margin in the installation position of the first pad electrode 125,
The planar area of the multilayer substrate 110 can be reduced, so that the area of the entire semiconductor device can be reduced.
In addition, it is possible to suppress the occurrence of the phenomenon that the sealing material 133 adheres to the first pad electrode 125 and hinders the connection of the metal line 137. In FIG. 9, since the first pad electrodes 125 are arranged along the longitudinal direction of the multilayer substrate 110, the outflow preventing portion 160 also has the first pad electrode 125 and the second pad electrode 124 along the longitudinal direction. , But is not limited to this. That is, if the multilayer substrate 110 is provided with the first
When the pad electrode 125 is formed, the outflow prevention portion 160 is formed correspondingly. Therefore, the outflow prevention portion 160 may be formed in a square shape on the multilayer substrate 110 in some cases.

Further, the outflow prevention portion 160 is not limited to the type that is protruded from the side surface 122 of the multilayer substrate 110 as described above. That is, as shown in FIG. 5, the sealing material 133 flowing out between the first pad electrode 125 and the second pad electrode 124 formed on the side surface 122 of the multilayer substrate 161.
The outflow prevention portion 162 may be formed as a concave portion for receiving the fluid. The depth of the outflow prevention portion 162 varies depending on the size of the peripheral circuit semiconductor chip 111 to be sealed or the amount of the sealing material 133 used.
3 is set to a depth such that it does not overflow to the first pad electrode 125 side.

Further, the outflow prevention unit 1 as shown in FIG.
63 can also be provided. The outflow prevention portion 163 is obtained by increasing the thickness of the first pad electrode 125 formed on the side surface 122 of the multilayer substrate 110 along the thickness direction of the multilayer substrate 110, and functions as the first pad electrode. Also doubles. The thickness of the outflow prevention portion 163 varies depending on the size of the semiconductor chip 111 for the peripheral circuit to be sealed or the amount of the sealing material 133 used, and the sealing material 133 naturally goes to the first pad electrode 125 side. The height is set so that it does not overflow.

5 and 6, the outflow prevention portion 163 is used.
Since the parts mainly related to FIG. 2 are shown, illustration of the package member 173 and the like is omitted. In addition, it is of course possible to apply any of the above-described outflow prevention units 160, 162, and 163 to the semiconductor device with CCD 102 shown in FIG.

In the above-described embodiment, the CCD solid-state imaging device 112 is used in order to improve the image quality.
In place of 2, a MOS solid-state imaging device can be used.

In the above-described embodiment, the second electrode 129 of the peripheral circuit semiconductor chip 111 and the second pad electrode 124 of the multilayer substrate 110 are formed by the bump 130 and the paste 1.
Although the electrical connection is made via 31, it is not limited to this. For example, after a conductive paste containing metal particles is applied to the second electrode 129, for example, the second electrode 129 and the second pad electrode 124 are pressed against each other to crush the metal particles, thereby forming the second electrode 129 and the second pad 129. Conduction with the electrode 124 may be achieved.

[0022]

As described above in detail, according to the semiconductor device with CCD of the first aspect and the method of manufacturing the semiconductor device with CCD of the second aspect of the present invention, the substrate, the semiconductor chip for the peripheral circuit, and the CCD A solid-state image sensor. The substrate is
A second pad electrode on which the peripheral circuit semiconductor chip is flip-chip mounted on one of opposing side surfaces and the CCD;
A first pad electrode electrically connected to the second electrode of the solid-state imaging device, and the second pad electrode and a third pad electrode electrically connected to the first pad electrode on the other side surface. Have. Therefore, for example, conventional internal leads extending in a plane direction perpendicular to the thickness direction of the substrate become unnecessary, and the area of the entire semiconductor device can be reduced. Furthermore, by arranging the solid-state imaging device with CCD on the peripheral circuit semiconductor chip, the area of the entire semiconductor device can be reduced. In addition, by arranging the solid-state imaging device with a CCD on the peripheral circuit semiconductor chip, the semiconductor device with the CCD can be configured in one package.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a semiconductor device with a CCD according to an embodiment of the present invention.

FIG. 2 is an enlarged view of the multilayer board shown in FIG. 1 and a mounting portion of the multilayer board and a peripheral circuit semiconductor chip.

FIG. 3 is a sectional view of another embodiment of the semiconductor device with a CCD shown in FIG. 1;

FIG. 4 is a sectional view of still another embodiment of the semiconductor device with a CCD shown in FIG. 1;

FIG. 5 is a view showing another embodiment of the outflow prevention unit shown in FIG. 5;

FIG. 6 is a view showing another embodiment of the outflow prevention unit shown in FIG.

FIG. 7 is a perspective view for explaining the method for manufacturing the semiconductor device with a CCD shown in FIG.

8 is a perspective view showing a state in which a semiconductor chip portion for a peripheral circuit in the semiconductor device with a CCD shown in FIG. 3 is sealed.

FIG. 9 is a perspective view showing the outflow prevention unit shown in FIG.

FIG. 10 is a sectional view showing the structure of a conventional semiconductor device with a CCD.

FIG. 11 is a plan view of the semiconductor device with a CCD shown in FIG. 10;

12 is a functional block diagram of the semiconductor device with a CCD shown in FIG. 10;

FIG. 13 is a sectional view showing a conventional semiconductor device.

[Description of Signs] 101, 102, 103: semiconductor device, 110: multilayer substrate, 111: semiconductor chip for peripheral circuit, 112: CCD
Type solid-state imaging device, 121: plate material, 122, 123: side surface, 124: second pad electrode, 125: first pad electrode, 126: third pad electrode, 128: electrode forming surface, 1
29: second electrode, 133: sealing material, 134: electrode non-formed surface, 135: light receiving side surface, 136: first electrode, 137 ...
Metal wire, 138: non-light-receiving side surface, 139: adhesive, 15
1, 152: chip, 160, 162, 163: outflow prevention unit.

Claims (8)

[Claims] 1. Two opposing side surfaces (122, 123)
Has a first pad electrode (124) and a second pad electrode (125), and the other has a third pad electrode (12).
6), a substrate (110) in which the first and second pad electrodes are electrically connected to the third pad electrode, and a substrate (110) electrically connected to the first pad electrode and the metal wire (137). The first electrode (136) to be connected is connected to the light-receiving side surface (13).
5) A CCD solid-state imaging device (112) for transferring electric charges by receiving light, and a semiconductor chip for a peripheral circuit electrically connected to the CCD solid-state imaging device. A second electrode (129) to be mounted on the chip is connected to an electrode forming surface (12) disposed opposite to the one side surface of the substrate.
8) and the non-electrode forming surface (134) facing the electrode forming surface of the peripheral circuit semiconductor chip with respect to the CCD solid-state imaging device is provided on the light-receiving side surface of the CCD solid-state imaging device. And a peripheral circuit semiconductor chip (111) disposed to face the non-light receiving side surface (138) facing the semiconductor device. 2. A condensing lens (171) is formed on the light-receiving side surface of the CCD solid-state imaging device.
2. The package according to claim 1, wherein a package member (173) that covers and seals the D-type solid-state imaging element and the semiconductor chip for the peripheral circuit and allows light to enter the condensing lens is provided on the one side surface of the substrate. Semiconductor device with solid-state image sensor. 3. The non-light-receiving side surface of the CCD solid-state imaging device and the non-electrode forming surface of the peripheral circuit semiconductor chip are fixed with an adhesive (139). Semiconductor device with solid-state image sensor. 4. The semiconductor device with a solid-state imaging device according to claim 1, wherein said semiconductor chip for a peripheral circuit comprises a plurality of semiconductor chips (151, 152). 5. The semiconductor device according to claim 1, wherein the first pad electrode is disposed on a peripheral portion of the one side surface of the substrate, and the second pad electrode is disposed on an inner side thereof. An outflow preventing portion (160) for preventing a sealing material (133) provided between the second pad electrode and sealing the semiconductor chip for a peripheral circuit mounted on the substrate from flowing out to the first pad electrode. 5. The semiconductor device with a solid-state imaging device according to claim 1, further comprising: 6. Two opposing side surfaces (122, 123).
Has a first pad electrode (124) and a second pad electrode (125), and the other has a third pad electrode (12).
6) a second pad electrode on a substrate (110) electrically connecting the first and second pad electrodes to the third pad electrode, and a CCD for transferring charges by receiving light;
The second electrode (129) formed on the electrode forming surface (128) of the semiconductor chip (111) for the peripheral circuit, which is electrically connected to the solid-state imaging device (112), is flip-chip mounted. In the semiconductor chip, an electrode non-forming surface (134) facing the electrode forming surface and a non-light receiving side surface (138) of the CCD solid-state imaging device are opposed to each other. After the device is mounted on the substrate, a first electrode (136) formed on a light receiving surface side surface (135) of the CCD type solid-state imaging device facing the non-light receiving side surface and the first pad of the substrate. A method for manufacturing a semiconductor device with a solid-state imaging device, comprising: electrically connecting an electrode with a metal wire (137). 7. After the peripheral circuit semiconductor chip is flip-chip mounted on the substrate, when a sealing material (133) is applied to a connecting portion between the peripheral circuit semiconductor chip and the substrate, the sealing material is applied. 7. The method for manufacturing a semiconductor device with a solid-state imaging device according to claim 6, wherein the coating is performed while preventing the flow to the first pad electrode. 8. When the CCD solid-state imaging device is fixed to the peripheral circuit semiconductor chip after the peripheral circuit semiconductor chip is mounted on the substrate by flip chip mounting, the peripheral circuit semiconductor chip is mounted after the flip chip mounting. 8. The semiconductor with a solid-state image sensor according to claim 6, wherein the semiconductor chip for the peripheral circuit and the CCD-type solid-state image sensor are also fixed by applying the sealing material to a connection portion between the solid-state image sensor and the substrate. Device manufacturing method.