JPH11252807A - Charging apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a highly effective charging apparatus by alleviating a load of a DC current source. SOLUTION: This charging apparatus comprises a DC current source 1, a switching means 2 for switching the current output from this DC current source 1, an output means 3 for supplying a charging current i0 output from the switching means 2 to a charging object 5, consisting of a capacitive load and a control means 4 for controlling the switching means 2. The control means 4 generates a pulse so that it is turned on for a period (a) and is turned off for a period b in order to control the switching means 2. The control means 4 controls, on the basis of the difference between a voltage V1 generated from the DC current source 1 and a voltage V0 of the charging object 5, the duty ratio (a/(a+b)) of the control pulse, so as to control the average current of the charging current i0 output from the output means 3 to the constant value.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charging device for charging a double-layer capacitor, a secondary battery or the like.

[0002]

2. Description of the Related Art FIG. 5 shows a chopper type constant voltage regulator as a conventional charging device for charging a double-layer capacitor or a secondary battery.

A conventional charging device 100 shown in FIG. 5 includes a DC generator 101, a pnp transistor 102 for switching a current output from the DC generator 101,
A coil 103 and a flywheel diode 104 for smoothing the output current of the pnp transistor 102;
Npn transistor 105 and FET for self-oscillation to control the switching of the pnp transistor 102
106, capacitor 107, and n
Zener diode 108 and diode 1 that determine the duty of switching of pn transistor 105
09, and supplies a charging current i _O from an output terminal 110 to a capacitive load 111 such as a double-layer capacitor or a secondary battery to be charged.

The pnp transistor 102 has an emitter connected to the positive output terminal of the DC generator 101. Further, the pnp transistor 102, resistor R ₁ is connected between the emitter and base.

The coil 103 has one end connected to the collector of the pnp transistor 102 and the other end connected to the output terminal 1.
10 is connected. The flywheel diode 104 has a cathode connected to the collector of the pnp transistor 102 and an anode connected to the ground.

[0006] npn transistor 105 has a collector connected to the base of the pnp transistor 102 is connected to the ground the emitter via a resistor R _2.

The FET 106 has a drain connected to the DC generator 1.
01 is connected to the positive output terminal. The FET 106 has a gate and a source connected to the base of the npn transistor 105.

The capacitor 107 has one end connected to the collector of the pnp transistor 102 and the other end connected to the base of the npn transistor.

The Zener diode 108 has a cathode connected to the base of the npn transistor 105 and an anode connected to the ground.

The diode 109 has an anode connected to the output terminal 110 and a cathode connected to the npn transistor 10.
5 emitters.

In the conventional charging device 100 having such a configuration, the npn transistor 105 is switched in accordance with the charging and discharging of the capacitor 107, and the pnp transistor 1 is switched with the switching of the npn transistor 105.
02 is switched. When the pnp transistor 102 is switched, the DC generator 101
Is switched. The switched current is smoothed by a smoothing circuit including the coil 103 and the flywheel diode 104, and is supplied to the capacitive load 111 as a charging current i _O.

In the conventional charging apparatus 100, self-excited oscillation is performed by performing the operation described below, and the pnp
The transistor 102 is switching. In describing the operation of the self-excited oscillation, a terminal on the base side of the npn transistor 105 is a terminal A, and a terminal on the collector side of the pnp transistor 102 is a terminal B.

First, when the pnp transistor 102 is off, the terminal A side of the capacitor 107 is charged positively by the current supplied from the FET 106.
Then, the base voltage of npn transistor 105 rises, and this npn transistor 105 is turned on.

When the npn transistor 105 is turned on, the pnp transistor 102 is also turned on.

Subsequently, when the pnp transistor 102 is turned on, the capacitor 107 is connected to the DC generator 11 by turning on the pnp transistor 102.
1 is applied to the terminal B, and a voltage obtained by adding a charge voltage obtained by positively charging the terminal A is applied to the base of the npn transistor 105.
The on state of the transistor 105 is maintained.

Subsequently, shortly after the pnp transistor 102 is turned on, the terminal B of the capacitor 107 is positively charged by the current from the DC generator 101 supplied from the collector of the pnp transistor 102. That is, the electric charge charged to the terminal A is discharged. Then, the npn transistor 105
Of the npn transistor 105
Is turned off.

When the npn transistor 105 is turned off, the pnp transistor 102 is also turned off.

As described above, in the conventional charging apparatus 100, the self-excited oscillation caused by the charging and discharging of the capacitor 107 causes
The pnp transistor 102 is switched.

In the conventional charging device 100, the output voltage, that is, the voltage of the capacitive load 111 is fed back to the emitter of the npn transistor 105 via the diode 109. Therefore, the duty ratio varies according to the voltage of the capacitive load 111.

That is, in the conventional charging device 100,
If the capacitive load 111 is not sufficiently charged and the voltage of the capacitive load 111 is low, the emitter voltage of the npn transistor 105 decreases. Therefore, this n
The threshold value of the base voltage for turning on the pn transistor 105 decreases, and the on-time of the npn transistor 105, that is, the on-time of the pnp transistor 102 increases.

In the conventional charging device 100, charging progresses to the capacitive load 111, and when the voltage of the capacitive load 111 is high, the emitter voltage of the npn transistor 105 increases. Therefore, this npn transistor 10
5, the threshold value of the base voltage for turning on the transistor 5 increases, and the on-time of the npn transistor 105, that is, the on-time of the pnp transistor 102, decreases.

As described above, this conventional charging device 100
Then, as the voltage of the capacitive load 111 increases, pn
The switching duty ratio is controlled so that the ON time of the p-transistor 102 is shortened.

In addition, this conventional charging device 100 includes n
A zener diode 108 is provided so that the base voltage of the pn transistor 105 does not increase more than a predetermined voltage. Therefore, when the voltage of the capacitive load 111 becomes higher than the voltage specified by the Zener diode 108, the switching operation of the npn transistor 105 stops, and the charging of the capacitive load 111 ends.
The Zener diode 108 is set based on the rating of the capacitive load 111 to be charged.

[0024]

Here, the charging current i _O flowing from the conventional charging device 100 to the capacitive load 111 to be charged will be considered.

FIG. 6 is a simplified view of the conventional charging device 100 shown in FIG.

The charging current i _O flowing from the DC generator 101 to the capacitive load 111 depends on the voltage V _I generated by the DC generator 101, the voltage V _O of the capacitive load 111,
From the relationship with the internal resistance r, it can be expressed by the following equation.

I _O = (V _I -V _O ) / r

Here, in the conventional charging device 100,
For example, when the charge is not sufficiently charged in the capacitive load 111 and the voltage V _O of the capacitive load 111 is low, pnp
The on-time of the transistor 102 is lengthened and the charging current i _O acts to increase.

However, in general, the internal resistance of a double-layer capacitor, a secondary battery or the like is extremely low. Therefore, if the conventional charging device 100 acts so as to increase the charging current i _O , the DC generator 101 must generate a large current, which imposes a heavy burden. Therefore, in the conventional charging device 100, it is necessary to use the DC generator 101 having a sufficiently large torque even if such a load is applied.

Further, in the conventional charging device 100, heat loss occurs due to the internal resistance r, the internal resistance of the capacitive load, and the like in proportion to the current value of the charging current i _O. Therefore, when the conventional charging device 100 acts so as to increase the charging current i _O , the heat loss increases proportionally. Therefore, in the conventional charging device 100,
The circuit loss was large and the efficiency was low.

The present invention has been made in view of such circumstances, and an object of the present invention is to provide a charging device that reduces the load on a DC current source and that is efficient.

[0032]

In order to solve the above-mentioned problems, a charging apparatus according to the present invention comprises a DC current source, a switching means for switching a current output from the DC current source, and a switching means. Output means for supplying a smoothed current to a charging target, and an output from the output means based on a voltage difference between a voltage generated from the DC current source and a voltage of the charging target. Control means for controlling the switching means so as to keep the average current constant. In this charging device, the average current output from the output means is constant regardless of the voltage to be charged.

The charging apparatus according to the present invention, as shown in FIG. 1, a DC current source 1 for outputting a direct current with a voltage V _I
A switching means 2 for switching a current output from the DC current source 1, an output means 3 for supplying a charging current i _O output from the switching means 2 to a charging target 5 composed of a capacitive load, Means 2
And control means 4 for controlling the

The control means 4 controls the switching means 2 by generating a pulse such that the ON time is a and the OFF time is b.

[0035] At this time, the charging current i _O flowing to the charging target 5 from the DC current source 1, a voltage V _I generated by the direct current source 1, the voltage V _O to be charged 5, the internal resistance r
From the relationship, it can be expressed by the following equation.

I _O = (V _I -V _O ) / r

Also, the charging current i supplied to the charging target 5
_Since the average current i _{AVE of O} is switched by a pulse such that the on-time is a and the off-time is b, it can be expressed as follows.

I _AVE = (a / (a + b)) × i _O

Here, the control means 4 determines the duty ratio of the control pulse based on the voltage difference (V _I -V _O ) between the voltage V _I generated from the DC current source 1 and the voltage V _{O of the} object 5 to be charged. (A / (a + b)) is controlled so that the average current i _AVE of the charging current i _O outputted from the output means 3 is constant.

As described above, in the charging apparatus according to the present invention, pulse charging is performed with the average value of the current output from the output means being constant regardless of the voltage to be charged.

[0041]

Embodiments of the present invention will be described below with reference to the drawings.

First, a charging device according to a first embodiment of the present invention will be described with reference to FIGS.

As shown in FIG. 2, the charging device 10 according to the first embodiment of the present invention includes a DC generator 11 and a pnp for switching a current output from the DC generator 11.
A transistor 12, a coil 13 for smoothing the output current of the pnp transistor 12, a flywheel diode 14, an npn transistor 15 for switching the pnp transistor 12, and a control circuit 16 for determining the duty of the switching of the npn transistor 15. And an output terminal 17 for a capacitive load 20 such as a double-layer capacitor or a secondary battery to be charged.
Supplies the charging current i _O.

The pnp transistor 12 has an emitter connected to the positive output terminal of the DC generator 11. Further, the pnp transistor 12, resistors R ₁ is connected between the emitter and base.

The coil 13 has one end connected to the collector of the pnp transistor 12 and the other end connected to the output terminal 17. The flywheel diode 14 is
The cathode is connected to the collector of the pnp transistor 12, and the anode is connected to the ground.

The collector of the npn transistor 15 is p
It is connected to the base of the np transistor 12 is connected to the ground the emitter via a resistor R _2.

The control circuit 16 receives the DC voltage V _I generated by the DC generator 11 and the voltage V _O of the capacitive load 20 to be charged, and outputs a control pulse, which is an output signal, to npn.
The voltage is supplied to the base of the transistor 15.

In the charging device 10 having such a configuration, the npn transistor 15 is switched according to the control pulse output from the control circuit 16, and the pnp transistor 1 is switched with the switching of the npn transistor 15.
2 is switched. When the pnp transistor 12 is switched, the current supplied from the DC generator 11 is switched. The switched current is smoothed by a smoothing circuit including the coil 13 and the flywheel diode 14 and supplied to the capacitive load 20 as a charging current i _O.

Next, the control circuit 16 will be described.

The control circuit 16 includes a first variable resistor 21 provided between the positive terminal of the DC generator 11 and the ground, and a second variable resistor 22 provided between the output terminal 17 and the ground. An operational amplifier 23 to which the divided voltage output of the first variable resistor 21 and the divided voltage output of the second variable resistor 22 are input to detect a difference voltage therebetween, and a sawtooth wave generating circuit 24 to generate a sawtooth wave. , Operational amplifier 23 and sawtooth wave generating circuit 2
4; an npn transistor 26 for driving a comparison output of the comparator 25; and a NAND circuit 27 for outputting a control pulse obtained by inverting the output of the npn transistor 26. From 27, a control pulse is supplied to the npn transistor 15.

The control circuit 16 controls the DC generator 1
Capacitor 28 for removing noise of the voltage generated by 1
The voltage generated by the DC generator 11 is converted into a constant voltage, and the operational amplifier 23, the sawtooth wave generating circuit 24, the comparator 25, n
It has a pn transistor 26, a Zener diode 29 for supplying a power supply voltage to the NAND circuit 27 and the like.

[0052] The first variable resistor 21 supplies a voltage V _I of direct current generator 11 is generated by dividing the voltage V _I 'in which the appropriate gain adjustment to the positive input terminal of the operational amplifier 23. The second variable resistor 22 divides the voltage V _O of the capacitive load 20 and supplies the voltage V _O ′ with an appropriate gain adjustment to the negative input terminal of the operational amplifier 23.

The operational amplifier 23 includes a voltage V _I 'in which the appropriate gain adjustment by applying a voltage V _I minute to direct current generator 11 generates a divide appropriate gain adjustment voltage V _O of the capacitive load 20 the voltage V _O 'difference between the voltage (V _I' -V _O ')
And the difference voltage is amplified by an appropriate magnification. Operational amplifier 23 supplies the difference voltage (V _I '-V _O') to the positive input terminal of the comparator 25.

The saw-tooth wave generating circuit 24 is constituted by a resistor 33 and a capacitor 34 for generating a pulse signal self-oscillated by an unstable multivibrator comprising a first NAND circuit 31 and a second NAND circuit 32. A differentiating circuit generates a sawtooth wave. The sawtooth wave output from the sawtooth generation circuit 24 is output to a comparator 25.
Is supplied to the input terminal on the minus side of. Since the sawtooth wave generating circuit 24 only needs to generate a sawtooth wave by self-excited oscillation, for example, a triangular wave or the like by an integrating circuit may be output, and the configuration is not limited.

The comparator 25 outputs the difference voltage (V _I ′)
−V _O ′) and the sawtooth wave, and a difference voltage (V _I ′ −
High when V _O ′) is greater than the sawtooth wave, the difference voltage (V _I ′)
-V _O ') is a digital output which becomes low when the signal is smaller than the sawtooth wave.

The digital output of the comparator 25 is
It is supplied to the base of an npn transistor 26, and this np
After being driven by the n-transistor 26, it is output from its collector and further inverted by the NAND circuit 27.

The NAND circuit 27 outputs a control pulse which is a signal having the same phase as that of the comparator 25. This control pulse is supplied to the base of the npn transistor 15.

[0058] By having such a configuration, the control circuit 16 compares the difference voltage between (V _I '-V _O') and sawtooth waves, the difference voltage (V _I '-V _O') is greater A control pulse that is turned on in this case is output.

Here, the difference voltage (V _I '-V _O ') is
This varies depending on the state of charge of the capacitive load 20.
That is, charge is not so much charge to the capacitive load 20, when the voltage V _O of the capacitive load 20 is low, the difference voltage (V _I '-V _O') is increased. On the other hand, the process proceeds to charge the capacitive load 20, when the voltage of the capacitive load 20 is high, the differential voltage (V _I '-V _O') is low. Therefore,
This control pulse is a PWM (Pulse Width Modulati) whose ON time varies according to the state of charge of the capacitive load 20.
on) pulse.

FIG. 3 shows a pulse waveform generated between the first and second NAND circuits 31 and 32 (point A) of the sawtooth wave generating circuit 24 and a negative input terminal (B
A serrated wave is input to a point), the difference between the voltage input to the positive input terminal of the comparator 25 (C point) (V _I '-
V _O ′), the signal waveform output from the output terminal (point D) of the comparator 25, and the output terminal (E
And a control pulse output from the point (1).

As shown in FIG. 3, in the control circuit 16, the difference voltage (V _I ′ −V _O ′) at the point C is more than the sawtooth wave at the point B.
Output a control pulse that is turned on when is large.

In the control circuit 16, the average value of the charging current i _O switched in response to the control pulse is constant irrespective of the change in the voltage V _O that varies depending on the state of charge of the capacitive load 20. The duty ratio of the control pulse is set as described above.

That is, the control circuit 16 controls the capacitive load 2
0 is not charged so much, and this capacitive load 2
0 when the voltage V _O is low, the difference voltage (V _I '-V _O')
However, in such a case, the ON time of the control pulse is shortened. Further, the control circuit 16 controls the capacitive load 2
0 charge advance of, when the voltage of the capacitive load 20 is high, the differential voltage (V _I '-V _O') is lowered, in such a case, a longer ON time of the control pulse I do.

As described above, as the voltage of the capacitive load 20 increases, that is, as the voltage difference between the DC current source 11 and the capacitive load 20 decreases, the control circuit 16
In order to increase the on-time of the pnp transistor 12,
It controls the duty ratio of the control pulse.

In the charging device 10 of the first embodiment, by setting the control pulse output from the control circuit 16 as described above, the average value of the current output from the DC generator 11 is always kept constant. can do.

Therefore, in the charging device 10, the burden on the DC generator 11 can be reduced. In addition, in the charging device 10, the pnp transistor 12 is PWM-controlled based on the voltage difference between the voltage generated from the DC generator 11 and the voltage of the capacitive load 20. The supplied current can be supplied to the capacitive load 20.

Further, in this charging device 10, heat loss can be reduced and power efficiency can be increased. In addition, the charging device 10 can charge the capacitive load 20 with a high voltage and a small current without using a power conversion unit such as a transformer.

The setting of the control circuit 16 can be easily performed by, for example, setting the voltage dividing ratio of the first variable resistor 21 and the second variable resistor 22 and the circuit setting of the sawtooth wave generating circuit 24 and the like. Can be. Further, by changing the operation setting of the operational amplifier 23, the difference voltage (V _I '-V _O') not only functions as duty if increases in inverse proportion low, it is possible to realize various functions . For example, constant power setting can be easily performed.

Further, in the charging apparatus 10, the sawtooth wave generated by the sawtooth wave generating circuit 24 is set according to the characteristic of the capacitive load 20 to be charged, thereby performing more efficient charging. be able to. The charging device 10
In order to turn off the pnp transistor 102 when the voltage V _O of the capacitive load 20 approaches the maximum rating, the voltage dividing ratio of the first variable resistor 21 and the second variable resistor 22,
By setting the amplification factor of the operational amplifier 23 or the sawtooth wave generated by the sawtooth wave generating circuit 24, the supply of the charging current i _O can be stopped without performing overcharging.

Next, a charging device according to a second embodiment of the present invention will be described with reference to FIG.

The charging apparatus according to the second embodiment is applied, for example, when the voltage generated by the DC generator generates a current at a voltage sufficiently higher than the maximum rated voltage of the capacitive load to be charged. You.

As shown in FIG. 4, the charging device 50 according to the second embodiment of the present invention includes a DC generator 51 and a pnp for switching the current output from the DC generator 51.
A transistor 52; a coil 53 and a flywheel diode 54 for smoothing the output current of the pnp transistor 52; and an npn transistor 5 for self-oscillation to control the switching of the pnp transistor 52.
5, a Zener diode 5 for determining the switching duty of the npn transistor 55 based on the voltage generated by the FET 56, the capacitor 57 and the DC generator 51.
8 and a diode 59, and supplies a charging current i _O from an output terminal 60 to a capacitive load 61 such as a double-layer capacitor or a secondary battery to be charged.

The pnp transistor 52 has an emitter connected to the positive output terminal of the DC generator 51. Further, the pnp transistor 52, resistors R ₁ is connected between the emitter and base.

The coil 53 has one end connected to the collector of the pnp transistor 52 and the other end connected to the output terminal 60. The flywheel diode 54
Has a cathode connected to the collector of the pnp transistor 52 and an anode connected to the ground.

The collector of the npn transistor 55 is p
It is connected to the base of the np transistor 52 is connected to the ground the emitter via a resistor R _2.

The FET 56 has a drain connected to the DC generator 51.
Is connected to the plus output terminal. Also, this FE
T56 is a transistor whose gate and source are npn transistors 55
Connected to the base.

The capacitor 57 has one end connected to the collector of the pnp transistor 52 and the other end connected to the base of the npn transistor 55.

The Zener diode 58 has a cathode of n
The pn transistor 55 is connected to the base and the anode is connected to the ground.

The diode 59 has an anode connected to the positive output terminal of the DC generator 51 and a cathode connected to npn.
It is connected to the emitter of transistor 55.

In the charging device 50 having such a configuration, the npn transistor 55 is switched in accordance with the charging and discharging of the capacitor 57, and the pnp transistor 52 is switched with the switching of the npn transistor 55. When the pnp transistor 52 is switched, the current supplied from the DC generator 51 is switched. This switched current is
The current is smoothed by a smoothing circuit including a coil 53 and a flywheel diode 54 and supplied to a capacitive load 61 as a charging current i _O.

In the charging device 50, self-excited oscillation is performed by performing the operation described below, and the pnp transistor 52 is switched. In describing the operation of the self-excited oscillation, the terminal on the base side of the npn transistor 55 is a terminal A, and the terminal on the collector side of the pnp transistor 52 is a terminal B.

First, when the pnp transistor 52 is off, the terminal A side of the capacitor 57 is charged positively by the current supplied from the FET 56. Then, the base voltage of npn transistor 55 increases, and this npn transistor 55 is turned on.

When the npn transistor 55 is turned on, the pnp transistor 52 is also turned on.

Subsequently, when the pnp transistor 52 is turned on, the capacitor 57 charges the voltage applied to the terminal B from the DC generator 51 to the terminal A side by turning on the pnp transistor 52, and charges the terminal A side positively. A voltage obtained by adding the added charge voltage is applied to the base of npn transistor 55, and this npn transistor 5
5 is kept on.

Subsequently, shortly after the pnp transistor 52 is turned on, the terminal B of the capacitor 57 is positively charged by the current from the DC generator 51 supplied from the collector of the pnp transistor 52. That is, the electric charge charged to the terminal A is discharged. Then, the base voltage of npn transistor 55 drops, and this npn transistor 55 is turned off.

When the npn transistor 55 is turned off, the pnp transistor 52 is also turned off.

As described above, in the charging device 50, the pnp transistor 52 is switched by the self-excited oscillation due to the charging and discharging of the capacitor 57.

In the charging device 50, the voltage of the DC generator 51 is fed forward to the emitter of the npn transistor 55 via the diode 59. Therefore, the duty ratio varies according to the variation of the voltage of the DC generator 51. That is, this charging device 5
At 0, when the voltage generated by the DC generator 51 becomes higher than the voltage of the Zener diode 58, the duty ratio of the switching pulse decreases. Further, depending on the voltage generated by the DC generator 51, as shown in FIG.
A variable resistor 62 is provided between the emitters of the pn transistor 55 to adjust the voltage generated by the DC generator 51 and the voltage of the Zener diode 58. By providing the variable resistor 62 in this manner, the duty ratio of the switching pulse can be easily adjusted.

In this charging device 50, when the voltage of DC generator 51 is low, the emitter voltage of npn transistor 55 is low. Therefore, the threshold value of the base voltage for turning on the npn transistor 55 decreases, and the on time of the npn transistor 55, that is, the pnp transistor 52
On time becomes longer.

In the charging device 50, when the voltage of the DC generator 51 is high, the emitter voltage of the npn transistor 55 increases. Therefore, the threshold value of the base voltage for turning on the npn transistor 55 increases, and the npn
The ON time of the transistor 55, that is, the ON time of the pnp transistor 52 is shortened.

As described above, in this charging device 50, the switching duty ratio is controlled so that the ON time of the pnp transistor 52 becomes shorter as the voltage of the DC generator 51 becomes higher.

Thus, in the charging device 50, for example, when the voltage generated by the DC generator 51 generates a current with a voltage sufficiently higher than the maximum rated voltage of the capacitive load 61 to be charged, The average value of the current output from the device 51 can be always constant.

Therefore, in the charging device 50, the burden on the DC generator 51 can be reduced. In addition, in the charging device 50, the pnp transistor 52 is PWM-controlled based on the voltage generated from the DC generator 51, so that a current corresponding to the torque of the DC generator 51 is supplied to the capacitive load 61. Can be.

Further, in this charging device 50, heat loss can be reduced and power efficiency can be increased. In addition, the charging device 50 can charge the capacitive load 61 with a high voltage and a small current without using a power conversion unit such as a transformer.

[0095]

In the charging apparatus according to the present invention, the load on the DC current source can be reduced by making the average current output from the output means constant irrespective of the voltage to be charged. Further, in this charging device, the switching means is PWM-controlled based on the voltage difference between the voltage generated from the DC current source and the voltage to be charged, so that the current corresponding to the torque of the DC current source is set as the charging target. Can be supplied.

Further, in the charging device according to the present invention, by making the average current output from the output means constant regardless of the voltage to be charged, heat loss can be reduced and power efficiency can be increased. Further, in this charging device, the charging target can be charged with a high voltage and a small current without using a power conversion unit such as a transformer.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining a charging circuit of the present invention.

FIG. 2 is a circuit diagram of the charging device according to the first embodiment of the present invention.

FIG. 3 is a waveform diagram of each point of the charging device.

FIG. 4 is a circuit diagram of a charging device according to a second embodiment of the present invention.

FIG. 5 is a circuit diagram of a conventional charging device.

FIG. 6 is a circuit diagram for explaining a charging current output from the conventional charging device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 DC current source, 2 switching means, 3 output means, 4 control means, 5 charge object, 10,50 charging device, 11,51 DC generator, 12,52 pnp transistor, 15,55 npn transistor, 16 control circuit, 13,53 coil, 14,54 flywheel diode, 17,60 output terminal, 20,61
Capacitive load, 59 diode

Claims (3)

[Claims] 1. A DC current source, switching means for switching a current output from the DC current source, and output means for smoothing the current switched by the switching means and supplying the smoothed current to a charging target And control means for controlling the switching means so that the average current output from the output means is constant based on a voltage difference between the voltage generated from the DC current source and the voltage to be charged. apparatus. 2. The control means detects a voltage difference between a voltage generated from the DC current source and a voltage to be charged. If the voltage difference is large, the on-time is shortened and the voltage difference is reduced. 2. The charging device according to claim 1, wherein the switching unit is controlled by a PWM pulse whose on-time becomes long when the switching time is small. 3. The DC current source generates a current with a voltage higher than a maximum rated voltage of a charging target. The control means detects a voltage generated from the DC current source, and when the voltage is large, 2. The charging device according to claim 1, wherein the switching means is controlled by a PWM pulse whose ON time is short and the ON time is long when the voltage is small.