JPH1125154A - Cad system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain the design of a printed board while displaying the dead space of a test point for an in-circuit tester and to execute processing for verifying the consistency of an arranged test point. SOLUTION: When parts external size information, parts fitting hole/land information, in-circuit tester testing point inhibition area (dead space) information, etc., are inputted from a keyboard 4, a CPU 1 prepares parts data from these inputted information and stores the parts data in a parts symbol information master file 2. When printed board external size information is inputted from the keyboard 4, the CPU 1 prepares printed board design data, stores the prepared data in a CAD data file 3 and displays the master file 2, the CAD data file 3 and a consistency verification result on a display 5 based on an output instruction inputted from the keyboard 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a CAD system for designing printed wiring boards.

[0002]

2. Description of the Related Art To ensure the quality of printed wiring boards,
It is important to verify the board processing and component incorporation with an in-circuit tester after component incorporation is completed.
For that purpose, a point at which the probe of the in-circuit tester jig comes into contact with the printed wiring board, that is, a test point is required.

Since the test points need to be provided in the process of designing the printed wiring board, there are cases where the test points cannot be set at an effective location due to problems such as the knowledge and experience of the designer and the delivery date of the design. They used to search for and use via holes that cut through the above wiring patterns, and made the probes more expensive and thinner than usual, to make direct contact with component leads. In this case, the number of man-hours and cost for producing the jig are increased.

[0004]

However, in the conventional case described above, in order to provide the test point at an effective location on the in-circuit tester, it must be provided in the process of designing a printed wiring board. Knowledge and experience of circuit testers are required, but if they are insufficient, they will be installed in places that can not be used, and it can not be verified that those test points are truly effective for in-circuit testers. On the other hand, when all the test points are provided in an effective place, there is a problem that the design delivery time is delayed due to a decrease in design efficiency.

The present invention has been made in view of the above problems, and an object of the present invention is to make it possible to design a printed wiring board while displaying a dead space at a test point. An object of the present invention is to provide a CAD system capable of verifying the consistency between a test point provided on data and a dead space.

[0006]

In order to achieve the above object, a CAD system according to the first aspect of the present invention comprises a component external dimension, a component mounting hole provided on a printed wiring board for incorporating the component. And information such as the position and land size of the land, etc., is input by a plurality of layer configurations,
Data input means for inputting a dead space, which is a test point position prohibition area for an in-circuit tester, existing around the component on a specific layer, and storage for storing component data input by the data input means Means, an operation means for inputting an output instruction for outputting the component data stored by the storage means, and reading the component data from the storage means in accordance with the instruction input by the operation means; Control means for verifying the consistency between the dead space and the test points in the CAD data, and output means for outputting the result of verifying the consistency by the component data, the CAD data and the control means. Things.

With this configuration, the printed wiring board designer can easily confirm the dead space of the components in the design process, so that the test points can be easily set, and the test points and the programs can be used. The printed wiring board can be designed while easily verifying the consistency of the automatically generated test points.

In order to achieve the above object, a CAD system according to a second aspect of the present invention is the CAD system according to the first aspect, wherein the specific layer of the data input means is tested by an in-circuit tester. A dead space data layer that prohibits the setting of points,
After input, it was memorized.

With this configuration, the same operation and effect as the above-described first embodiment can be obtained.

In order to achieve the above object, a CAD system according to a third aspect of the present invention displays a dead space in the component data in the CAD system according to the first or second aspect.

With this configuration, not only can the same operation and effect as the above-described invention of claim 1 be obtained, but also by displaying the dead space in the component data, the test point can be set at the time of setting the test point during the design work. The installation location can be easily determined, and the efficiency of design work can be improved.

According to a fourth aspect of the present invention, there is provided a CAD system according to the first, second, or third aspect.
Concerning the dead space in the component data and the test points provided on the CAD data, an integrity verification process is performed using a program.

With this configuration, not only can the same operation and effect as the above-described first embodiment be obtained, but also all the test points set on the CAD data after the start of the processing are stored in the nearby part data. Can be verified as to whether or not they are included in or touched by the dead space.

In order to achieve the above object, a CAD system according to a fifth aspect of the present invention is the CAD system according to the first or second or third or fourth aspect, wherein An error mark is given to a corresponding point on the CAD data for the test point having a consistency error in the verification processing, and the error mark is displayed.

With this configuration, not only can the same operation and effect as the above-described invention of claim 1 be obtained, but if there is a consistency error, the corresponding test point on the CAD data can be obtained. By providing an error mark and facilitating the finding of the error portion, the subsequent correction work can be performed smoothly.

In order to achieve the above object, a CAD system according to a sixth aspect of the present invention provides a CAD system according to the first, second, third, fourth, or fifth aspects. For the test point group in which the consistency error has occurred, the coordinates on the CAD data of the error location, if the test point has been given a name in advance, a part including the name and the dead space subject to the error Outputs a list of names etc.

According to this configuration, not only the same operation and effect as the above-described first embodiment can be achieved, but also a list of the consistency error test points in the consistency verification processing of the test points is displayed on the display. By displaying the list, the error location can be easily confirmed from the drawing output by the plotter or the like.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a CAD system according to an embodiment of the present invention.

In FIG. 1, reference numeral 1 denotes a CPU that creates CAD data from component data, printed wiring board outer shape information, wiring pattern information, and the like, and controls various programs. Reference numeral 2 denotes a component symbol information master file in which component data created by the CPU 1 is registered.
Is a CAD data file for storing CAD data created by the CPU 1. Reference numeral 4 denotes a keyboard for inputting component outline information, printed wiring board outline information, wiring pattern information, and various instructions when the CPU 1 creates various data. Reference numeral 5 denotes a display for displaying component data and CAD data created by the CPU 1 as images.

It should be noted that the CPU 1 stores the component data and the CAD data.
It corresponds to data creation means and control means for controlling various programs, and includes a part symbol information master file 2 and a CAD.
The data file 3 is storage means. The keyboard 4 corresponds to each information input unit and each command operation unit, and the display 5 corresponds to an output unit that displays component data, CAD data, and the like as images.

Next, the operation of the CAD system of the present invention having the above configuration will be described. First, prior to designing a printed wiring board, component data of various components mounted on the printed wiring board is registered in the component symbol information master file 2.

When information such as the shape and dimensions of a part, the positions and dimensions of mounting holes and lands provided on a printed wiring board for incorporating the part, and the dead space around the part is input from the keyboard 4, the CPU 1 receives the information. Creates component data based on the input information and stores the component data in the component symbol information master file 2.

Next, when the external shape of the printed wiring board to be designed is input from the keyboard 4, the CPU 1
Creates printed wiring board outer shape data indicating the outer shape of the printed wiring board based on the input shape and dimension information of the printed wiring board outer shape, and displays the image on the display 5. The same display is performed when the component data is created.

When the designer determines the component mounting position while looking at the screen of the display 5 on which the printed wiring board outline data is displayed, and inputs a component placement command based on the component type and position information from the keyboard 4, the CPU 1 The designated component data is read from the component symbol information master file 2, and the CAD data in a state where the CAD data is arranged at the designated position on the printed wiring board outer shape data is displayed on the display 5.

Subsequently, the designer inputs the CAD data under design displayed on the display 5 to the keyboard 4.
When input commands such as wiring pattern information, via hole information and test pad information via the pattern are issued, the CPU
1 registers the CAD data based on the input information, and causes the display 5 to display an image of the registered data.

The designer performs a printed wiring board design by repeating the component placement instruction and the wiring pattern input instruction in this manner, and completes the CAD data. In addition,
CAD data during design completion and during design may be
It can be stored in the D data file 3.

FIG. 2 shows the positional relationship between the components incorporated on the printed wiring board designed as described above and the porobe provided in the jig for the in-circuit tester. In this case, a test point 12 is provided on the wiring pattern 11 on the printed wiring board 8, and when the test point 12 is to be brought into contact with the in-circuit tester jig porobe 10, depending on the shape, the test point 12 is connected to the insertion mounting type component 9. Interfering part A
Can be done. In other words, a dead space B, which is an in-circuit tester test point position prohibition area, exists around the insertion mounting type component 9.

On the other hand, with respect to the leads 14 of the surface mount type component 13 mounted on the printed wiring board 8, the probe 1
In the case where 5, 16, and 17 are brought into contact with each other, if the lead pitch of the surface mount component 13 is narrower than the shape of the probes 15, 16, and 17, a portion C where the probes interfere with each other is formed. That is, a dead space D exists around the surface mount component 13.

Due to the external dimensions and shape of the components (insertion-mounting component 9 and surface-mounting component 13) mounted on such a printed wiring board, even if the test point 12 is provided due to interference between the component and the probe 10. The dead spaces B and C that the probes 10, 16 and 17 cannot directly contact the leads 14 of all the components due to the inability of the probe 10 to contact or the mounting form of the component are input to a specific layer of the component data. Then, after inputting, it is stored.

This is the gist of the invention according to claim 2, wherein the specific layer of the data input means is a dead space data layer for inhibiting the installation of an in-circuit tester test point, and after inputting, It is stored in the storage means.

FIG. 3 shows a state in which the image of the insertion mounting type component 9 and the dead space B existing therearound is displayed on the display 5. Also, the lead 1 of the surface mount component 13
FIG. 4 shows a state in which the image 4 and the dead space D existing around it are displayed on the display 5 as images.

Displaying the dead spaces B and D in the component data as described above is the gist of the third aspect of the present invention.

FIG. 5 shows a flowchart of the test point consistency verification processing, which is performed on the CAD data after the design and the test point installation are completed. After the start of the process (step S21), for all the test points set on the CAD data, the consistency of whether or not they are included in or touched by the dead space in the nearby component data is verified (step S22). If there is a consistency error, an error mark is given to the corresponding test point on the CAD data (step S23), and the subsequent correction work can be performed smoothly by making it easy to find the error location. To do.

Furthermore, a list of coordinates on the CAD data of the test point group in which the consistency error occurred, a name of the test point if a test point name has been given in advance, and a part name including a dead space subject to the error are prepared. (Step S24), and terminates the process (Step S25).

It is the gist of the fourth aspect of the present invention that the integrity verification process is performed using a program with respect to the dead space in the component data and the test points provided on the CAD data as described above.

In the test point consistency verification processing,
The error mark 31 given in step S23 is
FIG. 6 shows a case where the information is displayed on the display 5. In this case, the test point name (TZ000) is inserted into the dead space B of the component name (NF001) 35 of the insertion mounting type component 9.
1) Since 34 test points 12 are included,
An integrity error results.

According to a fifth aspect of the present invention, there is provided a CAD system for consistently displaying an error mark 31 of a test point having an error in the test point consistency verification process from a printed wiring board design.

In the process of verifying the consistency of the test points,
FIG. 7 shows a state in which a list of the consistency error test points created in step S24 is displayed on the display 5. This list is X coordinate 3 on CAD data.
2, Y coordinate 33, test point name 34, error target part name 35, and other information. This list makes it easy to confirm the error location even from a drawing output by a plotter or the like.

The invention according to claim 6 relates to a test point group in which a consistency error has occurred, the coordinates of the error location on the CAD data, and if the test point has been given a name in advance, the name and error target are set. In other words, a list of the names of components including dead spaces is output.

[0040]

As described above, according to the CAD system of the present invention, the installation of the test point for the in-circuit tester which must be provided in the printed wiring board design process is performed by inputting the dead space in the component data in advance. By doing so, you can do it while displaying it,
By performing the consistency verification process on the installed test points, it is possible to install test points that can be used in an in-circuit tester in a friendly manner, and it is possible to ensure the quality of the printed wiring board.

The display of the dead space in the component data has the effect of improving the efficiency of the design work by easily determining the place where the test point is set at the time of the design work, in addition to the above effect. .

Further, as a result of the consistency verification processing, an error mark is added to and displayed on a test point where an error has occurred, or an error list created in the consistency verification processing is displayed on a display or output to a printer or the like. By doing so, the error location can be easily determined on the CAD data and on the output drawing, and the correction work can be performed smoothly, which has the effect of improving the efficiency of the design work.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a CAD system according to the present invention.

FIG. 2 is an explanatory diagram showing a relationship between components mounted on a printed wiring board and probes provided on an in-circuit tester jig.

FIG. 3 is an explanatory view showing a state in which an image of an insertion mounting type component and a dead space existing around the insertion mounting component are displayed on a display.

FIG. 4 is an explanatory view showing a state in which a lead of a surface-mounted component and a dead space existing around the lead are displayed on a display.

FIG. 5 is a flowchart of a test point consistency verification process.

FIG. 6 is an explanatory diagram showing a state in which an error mark given in step S23 of the test point consistency verification processing is displayed on a display.

FIG. 7 is an explanatory diagram showing a state in which a list of consistency error test points created in step S24 is displayed on the display in the test point consistency verification processing.

[Explanation of symbols]

 1 CPU 2 Parts symbol information master file 3 CAD data file 4 Keyboard 5 Display

Claims (6)

[Claims] A part data such as an external dimension of a part, a part mounting hole provided on a printed wiring board for incorporating the part, a position and a shape of a land, and the like are input by a plurality of layers, and a specific data is inputted. Data input means for inputting a dead space, which is a test point position prohibition area for an in-circuit tester, existing around the component in the layer, and storage means for storing the component data input by the data input means Operating means for inputting an output command for outputting the component data stored by the storage means; reading the component data from the storage means in accordance with the command input by the operating means; Control means for performing a process of verifying the consistency between a dead space in the data and a test point in the CAD data; Goods data, CAD system, characterized in that an output means for outputting the result of verifying the consistency by the CAD data and the control unit. 2. The data storage device according to claim 1, wherein the specific layer of the data input unit is a dead space data layer for prohibiting the installation of an in-circuit tester test point, and is stored in the storage unit after input. CAD system. 3. The CAD system according to claim 1, wherein a dead space in the component data is displayed. 4. A dead space in the component data,
4. The CAD system according to claim 1, wherein the test point provided on the CAD data is subjected to an integrity verification process using a program. 5. 5. The method according to claim 1, wherein an error mark is given to a corresponding point on the CAD data with respect to the test point that has resulted in a consistency error in the consistency verification processing, and is displayed. The CAD system according to claim 3 or 4. 6. A method according to claim 6, wherein the test point group having the consistency error has coordinates of an error location on the CAD data,
3. A list including a name and a name of a part including a dead space subject to an error when a name is given to the test point in advance.
Or the CAD according to claim 3 or claim 4 or claim 5.
system.