JPH04566A - Conductive land position determining system - Google Patents

Abstract

PURPOSE:To save manhour and to prevent the generation of missetting by allowing a CAD device to automatically retrieve a conductive land generation enabled position to determine the position of the conductive land. CONSTITUTION:A CAD device program including conductive land position determining algorithm and printed substrate data are stored in a memory 191. A CPU 192 drives the program of the memory 191 and displays the printed substrate data on a CRT 195 and a keyboard 193 or a pointing device 194 receives an input for starting the algorithm. Then, the CPU 192 operates the printed substrate data of the memory 191 by using the algorithm and redisplays the operated result on the CRT 195.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention is a method for determining the position of a conductive land, particularly a conductive land positioning method applied to automatic wiring between power supply pads and clamp pins of surface mount components and power supply planes on inner layers in a CAD system for printed circuit boards. Concerning land position determination method.

[Conventional technology]

The conventional conduction land positioning method uses CPU, memory,
CAD that runs on a computer consisting of a CRT, keyboard, and pointing device! location and its CA
Regarding component pins that require connection with a conductive land to the inner layer of the printed circuit board using a DH placement Regarding component pins that require connection to the inner layer of the printed circuit board using a conductive land, occurrence of conductive land on the inner layer of the printed circuit board The method includes a step of manually indicating the position t using a pointing device.

Figure 5 shows the CPU in the conventional conduction land position determination method.
, CAD that runs on a computer consisting of memory, CRT, keyboard, and pointing device.
It is a block diagram of a device. In FIG. 5, the memory 591 has C.
The AD device program and printed circuit board data are stored, the CAD device program in the memory 591 is operated by the CPU 592, the printed circuit board data in the memory 591 is displayed on the CRT 595, and the CAD device operator uses the keyboard 593 or pointing device 594 to operate the CAD device program in the memory 591. The CPU 592 receives the input from the memory 59 according to the input.
Manipulate the printed circuit board data of 1 and transfer the results to the CRT5.
95.

FIG. 6 shows a process of manually indicating the location of a conductive land on the inner layer of a printed circuit board using a pointing device for a component pin that requires connection with the inner layer of the printed circuit board using a conductive land in a conventional conduction land position determination device. It is a schematic diagram. In Figure 6, CRT5
95' is a CRT1 cursor 691 which displays the printed circuit board data explained in FIG. 5, and a picture indicating the position of the pointing device 594 explained in FIG. 5 on the CRT. In FIG. 6, the pointing device 594 is manually operated to move the cursor 891 to specify the position of the conductive land where the component pin 612, which needs to be connected to the inner layer surface of the printed circuit board by means of a conductive land, is connected to the inner layer surface 628.

[Problem to be solved by the invention]

The conventional conductive land position determination method described above manually specifies the position of the conductive land for all component pins that require connection with conductive lands to the inner layer plane, which increases approximately in proportion to the number of components on the printed circuit board. Therefore, determining the location of the conductive land requires a lot of manual effort, which has the disadvantage that design errors are likely to occur.

[Means to solve the problem]

The conduction land position determination method of the present invention is implemented by a CPU.

Using a CAD device that runs on a computer consisting of memory, CRT, keyboard, and pointing device, we find the shortest distance between the component pins that need to be connected to the inner layer of the printed circuit board through conductive lands and the inner layer of the printed circuit board. The present invention is configured to select conduction land generation candidate points in a spiral manner centered around the shortest distance position, and to test whether or not a conduction land can be generated at the conduction land generation candidate points.

〔Example〕

Hereinafter, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of a CAD device showing an embodiment of the present invention. In FIG. 1, a memory 191 stores a CADi device program including the conduction land position determination algorithm of the present invention and printed circuit board data, and a CPU 192 operates the CAD device program in the memory 191.
Display the printed circuit board data in the memory 191 on the RT 195 and use the keyboard 198 or pointing device 1
94 accepts the CAD device operator's input to start the continuity land positioning algorithm, and accordingly the CPU
192 manipulates the printed circuit board data in memory 191 using the conductive land location algorithm of the present invention and redisplays the results on CRT 195.

FIG. 2 is a schematic diagram showing an example of finding the shortest distance between a component pin that requires connection with the inner layer of the printed circuit board by a conductive land and the inner layer of the printed circuit board. In FIG. 2, component pins 211 and 212 are component pins on the printed circuit board that need to be connected to the inner layer plane 221 by conductive lands, and the shortest distance position 231 is the inner layer plane 2 to the component pin 211.
The shortest distance position 21, the shortest distance position 232 is the component pin 2
12, the shortest distance position of the inner layer solid 221, side 241
, 242, 243, 244, 245° 246 are the sides of the polygon forming the inner layer solid 221.

If the component pin exists inside the inner layer planar, the shortest distance position will match the position of that component pin, and if the component pin exists outside the inner layer planar, the shortest distance position will constitute the component pin and the inner layer planar. The position where the distance from the side to which the That is, in FIG. 2, since the component pin 211 exists inside the inner layer flat 221, the shortest distance position of the inner layer flat 221 with respect to the component pin 211 is set to the shortest distance position 231 having the same coordinates as the component pin 211. Also, component pin 2
12 exists outside the inner layer plane 221, so the parts pin 212 and the sides 241, 242, which constitute the inner layer plane 221,
Find the distances between
1, the shortest distance position 232.

FIG. 3 is a schematic diagram showing an example of selecting conduction land generation candidate points in a spiral manner centered on the determined shortest distance position. In FIG. 3, the inner layer solid 321 is the inner layer solid that generates the conductive land, and the shortest distance position 331 is the shortest distance position between the component pin and the inner layer solid determined using the means explained in FIG. 2. Furthermore, the grid 341 represents the position where the conductive land can be manufactured, and the conductive land can be manufactured only on the intersections thereof, and the conductive land generation candidate points must be on the intersections of the grid inside the inner layer solid.

In FIG. 3, the grid 341 is
The closest intersection among the intersections is defined as the first conductive land generation candidate point 1. Hereinafter, considering the intersections of the grid 341 as a spiral centered on the conduction land generation candidate point 1, the conduction land generation candidate points 2° 3.4, 5, 6, 7, 8, 9, . Choose ~. The upper limit number of conduction land generation candidate points is specified using the keyboard 193 explained in FIG.

FIG. 4 is a schematic diagram showing an example of testing whether a conduction land can be generated at a selected conduction land generation candidate point. A printed circuit board has a structure in which multiple wiring layers are stacked, and a conductive land is manufactured as a part of a via that passes through the wiring layer.The via has a land with a unique shape for each wiring layer, and a conductive land is one type of via. It is. Figure 4 shows wiring layers 481 and 48.
In the example of a printed circuit board with four wiring layers of 2°483.484, via 471 is connected to lands 461, 462°463.
．． Has 464. In addition, in FIG. 4, the inner layer solid 421
is an inner layer plane that generates a conductive land in the wiring layer 482,
The conduction land generation candidate point 41 is a conduction land generation candidate point for the inner layer solid 421, the wiring 401 is the wiring pattern of the printed circuit board in the wiring layer 481, and the wiring 402 is the wiring layer 48
The wiring pattern of the printed circuit board shown in No. 3, the wiring 403, is the wiring pattern on the wiring layer 484.

In Figure 4, lands 461, 462, 463° 464
Of these, the land 462 that is electrically connected to the inner layer surface 421 is a conductive land. In the following description, the land 462 will be particularly described as a conductive land 462.

In FIG. 4, it is checked whether or not the conductive land 462 is included within the inner layer solid surface 421. If it is not included, it is not a conductive land, and therefore the test is terminated as a conductive land cannot be generated at the conductive land generation candidate point 41. do. When the conductive land 462 is included inside the inner layer plane 421, the wiring layer 48 in which each land exists for lands other than the conductive land 462, that is, lands 461°483.464
1,483,484 to check for interference between land and wiring.
If the land and the wiring interfere with each other, an electrical short circuit will occur, and therefore, the inspection is terminated with the conclusion that a conductive land cannot be generated at the conductive land generation candidate point 41. In addition, if all the lands do not interfere with the wiring, it is assumed that a conductive land can be generated at the conductive land generation candidate point 41, and the lands 46L 463, 4B4. A via 471 consisting of a conductive land 462 is generated and the process ends.

In FIG. 4, an interference test is performed between a land 461 and a wire 401 in a wiring layer 481, an interference test is performed between a land 463 and a wire 402 in a wiring layer 483, and an interference test is performed between a land 464 and a wire 403 in a wiring layer 484.

Since the component pin and the conductive land must be connected by a wiring pattern on the printed circuit board, it is desirable that the distance between them be short. Therefore, it is checked whether a conductive land can be generated from a conductive land candidate point near the center of the spiral, and a conductive land is first generated at a position where it can be generated.

To explain with the drawings, regarding the conduction land generation candidate points in FIG.
,9. . . , as explained in FIG. 4, using the means described above, it is tested whether or not a conductive land can be generated, and a conductive land is first generated at a position where it can be generated. If a conductive land does not occur even after reaching the upper limit for determining conductive land generation candidate points, it is determined that a conductive land cannot be generated.

〔Effect of the invention〕

The conductive land position determining method of the present invention has the effect of eliminating manual labor and design errors because the CAD device automatically searches and determines the conductive land position for a position where a conductive land can occur.

[Brief explanation of drawings]

Fig. 1 is a configuration diagram of a CAD device that implements an embodiment of the present invention, and Fig. 2 shows the shortest distance between a component pin that needs to be connected to the inner layer of the printed circuit board through a conductive land and the inner layer of the printed circuit board. Fig. 3 is a schematic diagram showing an example of selecting conductive land generation candidate points in a spiral manner centered on the shortest distance position, Fig. 4 is a schematic diagram showing an example of selecting conductive land generation candidate points in a spiral manner centered on the shortest distance position, and Fig. 4 is a schematic diagram showing an example of selecting conductive land generation candidate points. 5 and 6 are explanatory diagrams showing conventional examples. 191...Memory, 192...CPU, 193...
・Keyboard, 194... pointing device,
195...CRT1211.212...Component pin,
22L 321.421...Inner layer solid, 231°2
32.331...Shortest distance position, 241,242°2
43.244,245,246...side, 1,2°3.
4, 5, 6, 7, 8, 9.41... Conduction land generation candidate point, 341... Grid, 401, 402, 403...
・Wiring, 461, 463, 484... Land, 462
... Continuity land, 471... Via, 481°48
2.483,484...wiring layer.

Claims (1)

[Claims] CAD that runs on a computer consisting of a CPU, memory, CRT, keyboard, and pointing device
Using a device, find the shortest distance position between a component pin that needs to be connected to the inner layer of the printed circuit board by a conductive land and the inner layer of the printed circuit board, and create conductive land generation candidate points in a spiral shape around the shortest distance position. A method for determining the position of a conductive land, comprising: selecting a conductive land, and inspecting whether a conductive land can be generated at the conductive land generation candidate point.