JPH11249616A - Luminance adjusting circuit and luminance adjusting method for video display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the luminance adjusting circuit for a video display device in which the circuit scale of a PWM(pulse width modulation) circuit is small and a luminance adjustment is not necessary even when the number of synchronizing signals is changed, and a luminance adjusting method. SOLUTION: A video signal generating part 110 outputs a video data signals, a video synchronizing signals stipulating one frame of the video data and video control signals corresponding to respective display parts, to respective display parts 140 to 1n0. When the setting of luminance is changed in a luminance setting part 120, the change is informed to a PCM clock generating part 130 as a luminance setting signal and the frequency of a PCM clock signal to be generated from the video synchronizing signal is changed. This PCM clock signal is used in common in all of PCM circuits 141 of the display parts 140 to 1n0 and the luminance of all lamps are changed in accordance with the change of the frequency of the PCM clock signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus and a method for adjusting the brightness of an image display device comprising a plurality of lamps arranged in a grid pattern to form an image display surface.

[0002]

2. Description of the Related Art Conventionally, in a video display device in which a plurality of lamps are arranged in a grid pattern to form a video display surface, a lamp brightness adjustment circuit is used for the purpose of adjusting the brightness of the entire video display surface.

For example, in an apparatus for displaying an image by arranging a unit for controlling the lamp luminance in a pulse width modulation (hereinafter referred to as PWM) in a grid pattern, a luminance adjustment signal is supplied to each unit as lighting data together with a video signal. There is a technology for outputting and controlling the overall brightness. FIG. 6 is a block diagram showing an example of a conventional lamp brightness adjustment circuit.

[0004] The video signal generating section 610 receives the 1
A video synchronization signal that defines a frame period, a video data signal that defines a luminance level of each lamp, and a video control signal that defines a sampling timing of the video data are generated. The oscillator 630 generates a fixed-frequency PWM clock signal which is a reference for pulse width modulation of the display units 640 to 6n0, and outputs it to the display units 640 to 6n0. Brightness adjustment section 620 outputs a brightness setting signal to display sections 640 to 6n0.

Since the display units 640 to 6n0 are all common, the operation will be described with the display unit 640 as an example.

The PWM circuits 64 of the display units 640 to 6n0
Reference numeral 1 temporarily stores a video data signal and a luminance setting signal as lighting data, and performs a PWM operation based on a PWM clock signal from a time when a video synchronization signal is valid. Lamp 642
Indicates the ON / O of the lamp by using the PWM result of the PWM circuit 641.
Received as FF control signal and turned on (ON) / turned off (OF
F) Perform the operation. By repeating this operation for each frame, the brightness of the lamp is controlled and an image is formed. When the luminance is set high by the luminance setting unit 620 while keeping the video data signal constant, a value larger than the normal luminance is input to the PWM circuit 641 as the lighting data, and the lighting time of the lamp 642 becomes longer than usual. , The overall lamp brightness increases. Similarly, when the brightness is set low by the brightness adjustment unit 620, a value smaller than the normal brightness is input as the lighting data, and the overall lamp brightness is reduced.

[0007]

However, this prior art has the following problems. That is, the first problem is that the PWM circuit 641 in each unit has a bit number of the luminance setting signal (p in FIG. 6) compared with the bit number of the circuit when the luminance control is not performed (p bit in FIG. 6). A circuit larger by (q bits) is required. In particular, a large number of display units 640 to 6
A display device that requires n0 is expensive because of an increase in circuit scale. The reason is that it is necessary to deliver a multi-bit luminance control signal to each display unit as it is.

A second problem is that when the synchronization frequency of the video source changes, the brightness of the entire screen changes even with the same image data, and it is necessary to adjust the brightness each time, which is troublesome. The reason for this is that keeping the luminance constant with respect to a change in the synchronization signal is not considered.

An object of the present invention is to solve the above problems,
It is an object of the present invention to provide a brightness adjustment circuit and a brightness adjustment method for a video display device in which a PWM circuit has a small circuit scale and does not require brightness adjustment even when the number of synchronization signals of a video source changes.

[0010]

A brightness adjustment circuit for a video display device according to the present invention is a brightness adjustment circuit for a video display device in which a plurality of lamps are arranged in a grid to form a video display surface. A plurality of display units having a pulse width modulation circuit for outputting a lighting signal to the lamp; a video synchronization signal defining one frame period of video data; and a luminance level of each lamp. A video signal generator that outputs a video data signal and a video control signal that defines the sampling timing of the video data; a luminance setting unit that sets the luminance of the video display surface; and a video synchronization signal output by the video signal generator. A pulse width modulation clock generation unit that outputs a pulse width modulation clock signal having a frequency determined by a setting value of the luminance setting unit to the display unit based on the frequency,
A pulse width modulation circuit, comprising: a control unit that controls the operation of each of the constituent elements; and a recording medium that stores a program for a luminance adjustment method of the luminance adjustment circuit and outputs the program to the control unit as necessary. The value of the video data signal input from the video signal generation unit is pulse width modulated in synchronization with the pulse width modulation clock signal input from the clock unit, and output as a lighting signal.

The pulse width modulation clock generation unit includes a first frequency divider, a second frequency divider, a phase detector, and an oscillator, and the first frequency divider includes a video signal generation unit. Divides the video synchronization signal input from the first frequency divider into a first frequency division ratio set by the luminance setting signal input from the luminance setting unit, and outputs the divided frequency to the phase detector. The output pulse width modulated clock signal is frequency-divided into a second frequency division ratio set by the luminance setting signal and output to the phase detector. The phase detector includes a first frequency divider and a second frequency divider. And outputs a phase difference signal to an oscillator based on the phase difference signal. The oscillator outputs the signals from the first and second frequency dividers based on the phase difference signal. The frequency of the pulse width modulation clock signal may be adjusted so that the phase difference between the signals disappears, and the pulse width modulation clock generation unit may be adjusted. A third frequency divider, which converts the pulse width modulated clock signal input from the oscillator into a third frequency division ratio set by the luminance setting signal input from the luminance setting unit. And output to the display unit.

[0012] The brightness adjusting method of the video display device according to the present invention comprises:
What is claimed is: 1. A brightness adjusting method for a video display device comprising a plurality of lamps arranged in a grid pattern to form a video display surface, wherein a video signal generating unit includes: a video synchronization signal defining one frame period of video data; A video data signal that specifies the luminance level and a video control signal that specifies the sampling timing of the video data are output to the pulse width modulation circuit, and the pulse width modulation clock generation unit corresponds to the luminance set by the luminance setting unit. A pulse width modulation clock signal having a frequency is generated and output to a pulse width modulation circuit. The pulse width modulation circuit performs pulse width modulation of a video data signal value in synchronization with the pulse width modulation clock signal, and outputs the same as a lighting signal. Lights up.

The generation of the pulse width modulation clock signal in the pulse width modulation clock generation unit is performed by a first frequency divider which converts the video synchronization signal into a first frequency division ratio set by a luminance setting signal from the luminance setting unit. , And outputs the resulting signal to the phase detector. The second frequency divider divides the pulse width modulation clock signal output from the oscillator into a second frequency division ratio set by the luminance setting signal. Output to a phase detector, the phase detector detects a phase difference between the signals output from the first frequency divider and the second frequency divider, and outputs a phase difference signal to an oscillator. It may be executed by adjusting the frequency of the pulse width modulation clock signal so that the phase difference between the signals output from the first frequency divider and the second frequency divider is eliminated from the phase difference signal. Of the pulse width modulated clock signal input from the oscillator Signal third division ratio to be output to the display unit by dividing set at.

A brightness adjustment circuit and a brightness adjustment method for a video display device according to the present invention are arranged such that a plurality of lamps are arranged in a grid pattern to form a video display surface, and the brightness of each lamp is controlled by pulse width modulation. , A reference clock signal for PWM operation (hereinafter referred to as a clock signal) is generated from the video synchronization signal, and the frequency of the PWM clock signal is changed to fine-tune the brightness of all lamps at the same time. Does not affect the lamp brightness and maintains the brightness level set by the brightness adjustment.

The video signal generator outputs a video data signal, a video synchronizing signal defining one frame period of the video data, and a video control signal corresponding to each display to each display. When the brightness setting is changed by the brightness setting unit, the change is notified to the PWM clock generation unit as a brightness setting signal, and the frequency of the PWM clock signal generated from the video synchronization signal changes. This PWM clock signal is used in common by all the PWM circuits of the display unit, and the whole lamp luminance changes according to the change of the frequency of the PWM clock signal.

When the frequency of the video synchronizing signal changes, the frequency of the PWM clock signal changes so as to cancel out the change in the video synchronizing signal, and the duty ratio of the lamp lighting time / extinguishing time (hereinafter referred to as the lamp lighting rate). ) Does not change. Thus, a change in the frequency of the video synchronization signal does not affect the brightness of the lamp.

[0017]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a lamp brightness adjusting circuit according to a first embodiment of the present invention. Referring to FIG. 1, a video signal generation unit 110 includes a video synchronization signal that specifies one frame period of video data, a video data signal that specifies a luminance level of each lamp, and a video control signal that specifies a sampling timing of video data. Output a signal.

The PWM clock generation unit 130 displays a PWM clock signal having a frequency determined by the setting value of the luminance setting unit 120 on the display units 140 to 1n0 based on the frequency of the video synchronization signal output from the video signal generation unit 110. Output.

The control unit 101 controls the operation of each of the constituent elements, and the recording medium 102 stores a program for the brightness adjustment method of the brightness adjustment circuit, and outputs the program to the control unit 101 as necessary.

Since the display units 140 to 1n0 have a common configuration, the configuration of the display unit 140 will be described here.

The display section 140 performs pulse width modulation (hereinafter referred to as P) on the value of the video data signal input from the video signal generation section 110.
WM), and P to convert to a lamp ON / OFF signal
A WM circuit 141 and a lamp 14 which is turned on / off in response to a lamp ON / OFF signal input from the PWM circuit 141
And 2.

The PWM circuit 141 includes the video signal generator 11
When the video control signal input from 0 is valid, the video data signal is stored inside, and when the video synchronization signal is valid, the PWM operation is performed in synchronization with the PWM clock signal.
Is notified as a lamp ON / OFF signal.

The lamp 142 is turned on / off according to the state of the lamp ON / OFF signal, and maintains a constant brightness in the lighting state. The lamp 142 can be realized by, for example, a constant current switching circuit and a discharge tube.

Next, a detailed configuration of the PWM clock generator 130 will be described. PWM clock generator 130
Can be realized by, for example, a PLL circuit and a frequency divider. FIG.
FIG. 3 is a block diagram showing a configuration of a PWM clock generator 130 according to the first embodiment of the present invention.

In FIG. 2, the PWM clock generator 13
0 includes a first frequency divider 131, a second frequency divider 132, a phase detector 133, and an oscillator 134. The first frequency divider 131 converts the video synchronization signal input from the video signal generation unit 110 into a first frequency division ratio (= M frequency division) set by the luminance setting signal input from the luminance setting unit 120. The frequency is divided and output to the phase detector 133. Further, the second frequency divider 132 converts the PWM clock signal output from the oscillator 134 into a second frequency division ratio (= N) set by the luminance setting signal.
(Frequency division), and outputs the result to the phase detector 133. The phase detector 133 includes a first frequency divider 131 and a second frequency divider 13.
2 detects a phase difference between the signals output from the second and the second signals, and outputs a phase difference signal to the oscillator 134. The oscillator 134 adjusts the frequency of the PWM clock signal up and down so that the phase difference between the signals output from the first frequency divider 131 and the second frequency divider 132 is eliminated from the phase difference signal.

Next, the operation of the brightness adjusting method of the brightness adjusting circuit of FIG. 1 will be described with reference to FIG. FIG. 3 is a flowchart of a video display method using the brightness adjustment method according to the first embodiment of the present invention.

When video display is started (S301), the video signal generator 110 outputs a video data signal, a video control signal, and a video synchronization signal to the PWM circuit of each display unit (S30).
2). If the luminance is to be changed (S303 Yes), the luminance is set by the luminance setting unit 120 (S304). PWM
The clock generator 130 generates the frequency of the PWM clock signal corresponding to the luminance (S305), and outputs the PWM clock signal to the PWM circuit 141 (S306). If the brightness is not changed (S303 No), the process proceeds to step 306 with the same brightness setting as the previous time.

The video data signal value is pulse width modulated by the PWM circuit 141 in synchronization with the PWM clock signal (S30).
7), ramp O with the pulse width modulated video data signal value
An N / OFF signal is output to turn on the lamp (S30
8). If one frame is not completed (S309N
o), returning to step (S307) and repeating the operation. 1
When the frame ends (Yes in S309), the next display unit is selected (S310), and when the image display is to be continued (No in S311), the process returns to step S302 to continue the operation. To end the image display (S311Ye
s) The video display operation ends (S312).

Next, the operation of the circuit of FIG. 1 will be described in more detail with reference to FIG. FIG. 4 is a time chart showing a relationship between signals of the luminance adjustment circuit of the present invention. Normally, a device that displays a video displays the moving image by updating the brightness of all the lamps for each frame and executing the update continuously. Here, the frame frequency of the video signal is fs
[Hz] and the PWM clock frequency are assumed to be fp [Hz], and the operation in a certain one frame period will be described.

Referring to FIG. 4, at time T0, the luminance setting value from luminance setting section 120 is set in PWM clock generating section 130, and the PWM clock signal has a frequency corresponding to the luminance setting value. PWM clock generator 13
When the frequency division ratios M and N are set in the first frequency divider 131 and the second frequency divider 132 inside 0, respectively, the frequency fp = (M
/ N) output a PWM clock signal of fs [Hz].
The PWM clock generation unit 130 can be realized by, for example, a combination of a PLL circuit and a frequency divider.

At time T1, a video control signal is output from the video signal generator 110, and the PWM circuit 141 stores the video data signal (value d in the figure) at that time. P
The WM circuit 141 can be realized by, for example, a combination of a counter and a flip-flop. When the video synchronization signal becomes valid at time T2, the PWM circuit 141 starts pulse width modulation of the video data (value d) stored at time T1, and turns on the lamp ON / OFF signal until time T3. The lamp 142 receives this lamp ON / OFF signal and lights up from time T2. Lamp lighting time T2-T
3 is (lamp ON time) = d / fp = d (N / M) · (1 / fs) [sec] from the frequency fp of the PWM clock signal and the video data signal value d. At the time T3, when the pulse width modulation is completed, the PWM circuit 131 turns off the lamp ON / OFF signal. The lamp 32 receives the lamp ON / OFF signal and turns off.

Assuming that the maximum value of the video data is dmax, the lighting rate of the lamp between T2 and T4 is (lamp lighting rate) = {(d / fp) / (1 / fs) / dmax} = (d / dmax) ) · (N / M) [%]. Therefore, the lamp lighting rate is determined only by the video data to be displayed and the luminance setting value, and is not affected by a change in the video synchronization frequency.

The control program is read by the control unit 101 from the recording medium 102 and controls the operation of the data processing device. The control unit 101 executes the following processing under the control of the control program.

The video signal generator 110 generates a video data signal,
A process of outputting a video control signal and a video synchronization signal to the PWM circuit of each display unit;
A process of generating a frequency of a PWM clock signal corresponding to the luminance in the WM clock generation unit 130 and outputting the frequency to the PWM circuit 141, and a process of converting the video data signal value into
Pulse width modulation in synchronization with the WM clock signal
Outputting the N / OFF signal to turn on the lamp.

Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 5 is a block diagram showing a configuration of the PWM clock generator 530 according to the second embodiment of the present invention.

In the second embodiment of the present invention, the PWM clock generator 130 of the first embodiment described above
A third frequency divider 530 is added to the clock signal circuit. The other configurations and functions are the same as those of the first embodiment, and the description is omitted.

The third frequency divider 530 converts the pulse width modulated clock signal input from the oscillator 534 into a luminance setting section 520.
The frequency is divided by a third frequency division ratio (= L frequency division) set by the luminance setting signal input from the display unit 540 and output to the display unit 540. PW
By providing the third frequency divider 532 in the M clock signal circuit and adjusting the frequency division ratio, finer luminance adjustment can be performed.

[0038]

As described above, the first effect of the present invention is that a signal for notifying each display unit of a luminance setting signal is unnecessary. Therefore, the number of wirings can be reduced, and each PWM circuit can be reduced in size and cost. The reason is to notify each display unit of the luminance setting signal as a frequency change of the PWM clock signal.

The second effect is that even if the synchronization frequency of the video source changes, the change is not affected by the change in luminance. Therefore, it is not necessary to set the luminance when the video source is changed and the synchronization frequency is changed. The reason is that a mechanism for canceling the change in the frequency of the video synchronization signal by generating the PWM clock signal from the video synchronization signal is provided.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a lamp luminance adjusting circuit according to a first embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a PWM clock generation unit according to the first embodiment of the present invention.

FIG. 3 is a flowchart of a video display method using the brightness adjustment method according to the first embodiment of the present invention.

FIG. 4 is a time chart showing a relationship between signals of the luminance adjustment circuit of the present invention.

FIG. 5 is a block diagram showing a configuration of a PWM clock generator 530 according to the second embodiment of the present invention.

FIG. 6 is a block diagram showing an example of a conventional lamp brightness adjustment circuit.

[Explanation of symbols]

101 control unit 102 recording medium 110, 510, 610 video signal generation unit 120, 520, 620 brightness setting unit 130, 530 PWM clock generation unit 131, 531 first frequency divider 132, 532 second frequency divider 133, 533 Phase detector 134, 534 Oscillator 140, 150 to 1n0, 640, 540, 650, 6
n0 display section 141, 641 PWM circuit 142, 642 ramp 535 third frequency divider

Claims (7)

[Claims] 1. A brightness adjusting circuit for an image display device comprising a plurality of lamps arranged in a grid pattern to form an image display surface, comprising: a lamp; and a pulse width modulation circuit for outputting a lighting signal to the lamp. A plurality of display units, a video synchronization signal defining one frame period of video data, a video data signal defining a luminance level of each lamp, and a video defining sampling timing of video data in the pulse width modulation circuit. A video signal generating unit that outputs a control signal; a luminance setting unit that sets the luminance of the video display surface; and a setting value of the luminance setting unit based on a frequency of a video synchronization signal output by the video signal generating unit. A pulse width modulation clock generation unit that outputs a pulse width modulation clock signal having a frequency determined by the following formula to the display unit: a control unit that controls operations of constituent elements; A recording medium that stores a program of a brightness adjustment method of the adjustment circuit, and outputs the program to the control unit as necessary. The pulse width modulation circuit includes a pulse width modulation clock signal input from the pulse width modulation clock unit. A brightness adjustment circuit for a video display device, wherein the value of the video data signal input from the video signal generation unit is pulse-width modulated in synchronization with the signal and output as the lighting signal. 2. The pulse width modulation clock generating section includes a first frequency divider, a second frequency divider, a phase detector, and an oscillator, wherein the first frequency divider comprises: The video synchronization signal input from the video signal generation unit is frequency-divided into a first frequency division ratio set by the luminance setting signal input from the luminance setting unit, and output to the phase detector. Frequency divider divides a pulse width modulated clock signal output from the oscillator to a second frequency division ratio set by the luminance setting signal, and outputs the frequency divided clock signal to the phase detector. Detects a phase difference between signals output from the first frequency divider and the second frequency divider, and outputs a phase difference signal to the oscillator. The oscillator detects the phase difference signal based on the phase difference signal. The frequency of the pulse width modulated clock signal is adjusted so that the phase difference between the signal output from the frequency divider and the signal output from the second frequency divider is eliminated. Adjusting the brightness adjustment circuit of the image display device according to claim 1. 3. The pulse width modulation clock generation unit further includes a third frequency divider, and the third frequency divider receives a pulse width modulation clock signal input from the oscillator and inputs the pulse width modulation clock signal from the luminance setting unit. The brightness adjustment circuit according to claim 2, wherein the brightness is adjusted to a third frequency division ratio set by the brightness setting signal and output to the display unit. 4. A brightness adjusting method for a video display device comprising a plurality of lamps arranged in a grid pattern to form a video display surface, wherein the video signal generating unit defines a video synchronization signal for defining one frame period of video data. And a video data signal defining the brightness level of each lamp and a video control signal defining the sampling timing of the video data are output to a pulse width modulation circuit. Generating a pulse width modulation clock signal having a frequency corresponding to the brightness, and outputting the generated pulse width modulation clock signal to the pulse width modulation circuit. The pulse width modulation circuit synchronizes the video data signal value with the pulse width modulation clock signal by pulse width modulation. And outputting a lighting signal to turn on the lamp. 5. A method for generating a pulse width modulation clock signal in a pulse width modulation clock generation unit, comprising the steps of: a first frequency divider for converting a video synchronization signal into a first division set by a luminance setting signal from a luminance setting unit; A frequency divider divides the pulse width modulation clock signal output from the oscillator by a second frequency divider to a second frequency division ratio set by the luminance setting signal. The phase detector detects a phase difference between signals output from the first frequency divider and the second frequency divider, and outputs a phase difference signal to the oscillator. The oscillator is implemented by adjusting the frequency of the pulse width modulated clock signal so that the phase difference between the signals output from the first frequency divider and the second frequency divider is eliminated from the phase difference signal. The method according to claim 4, wherein the brightness is adjusted. 6. A third frequency divider further divides a pulse width modulated clock signal input from the oscillator to a third frequency division ratio set by a luminance setting signal and outputs the frequency divided clock signal to a display unit. The method for adjusting the luminance of a video display device according to claim 5. 7. A recording medium recording a control program for adjusting the luminance of a video display device comprising a plurality of lamps arranged in a grid pattern and constituting a video display surface, wherein the video signal generating section comprises a video data signal. A procedure for outputting a video control signal and a video synchronization signal to the pulse width modulation circuit of each display unit; setting a luminance in a luminance setting unit; and generating a pulse width modulation clock signal corresponding to the luminance in a pulse width modulation clock generation unit. Generating a frequency and outputting the frequency to the pulse width modulation circuit; andpulse width modulation of the video data signal value in synchronization with the pulse width modulation clock signal in the pulse width modulation circuit, and outputting as a lighting signal. A recording medium recording a procedure for turning on a lamp and a program for executing the procedure.