JPH11240792A - Silicon wafer and crystal growth - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase wafer strength without making wafer thickness thick and having adverse effect on electric characteristics of the device and yield. SOLUTION: In this method for growing silicon single crystal 9 by using a CZ method, heat-insulating performance of the lower end part of an inverted conical heat-shielding member 16 arranged on the outside of the crystal pulling up passage is more strengthened than heat-insulating performance of the other part to locally quench the vicinity of solid-liquid interface of growing crystal and the single crystal 9 is pulled up under low speed conditions in which an OSF ring is produced on inner side than 1/2 position of crystal diameter direction or disappears in the center part of crystal. In the wafer, average particle size of transfer cluster produced on the outside of the OSF ring is finely cut into <=100 μm to increase mechanical strengths of the wafer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a silicon wafer used as a material of a semiconductor device and a method for growing a crystal for producing the wafer.

[0002]

2. Description of the Related Art A silicon wafer used for manufacturing a semiconductor device is mainly collected from a single crystal grown by a CZ method. As is well known, the CZ method is a method in which a seed crystal is immersed in a raw material melt of silicon contained in a quartz crucible, and the seed crystal is pulled up while rotating the seed crystal and the quartz crucible in opposite directions. This is a method of growing a single crystal.

[0003] Silicon wafers manufactured through such a growth process by the CZ method have been rapidly increasing in diameter due to an increase in chip area due to an increase in the degree of integration of device chips. The actual operation of the process is being promoted.

[0004] The increase in the diameter of the wafer increases the yield of devices, but on the other hand, the problem of strength has become more important than before. In particular, in a heat treatment process such as an oxide film formation in a device process, slip occurs due to a combination of a decrease in yield stress due to heat of a silicon wafer, a force due to the weight of the wafer, and a thermal stress due to uneven temperature in the wafer surface. There is such a problem. It is well known that the occurrence of the slip becomes more remarkable as the diameter of the wafer increases, which causes a decrease in the yield of the device per wafer.

[0005] In order to prevent the occurrence of slip on a large diameter wafer, it is necessary to improve the heat treatment conditions and the method of holding the wafer to prevent the concentration of stress. It is also important to increase the strength of the wafer itself.

[0006]

However, in the case of measures to alleviate stress concentration, there are problems such as gas flow during heat treatment and structural problems of the heat treatment furnace, and there is no definitive measure at present. is there.

On the other hand, as a measure to increase the strength of the wafer itself, it is effective to increase the thickness, and it is known that impurities such as oxygen, carbon, and B improve the strength. However, to increase the thickness of the wafer,
Due to the problem of increasing its own weight and the problem of reducing the yield of wafers taken from single crystal ingots,
It is not a realistic measure. Regarding the addition of impurities,
Again, this cannot be a definitive solution because the amount of addition is severely limited due to the relationship with the impurity standard in the product and the problem of crystal defects.

SUMMARY OF THE INVENTION An object of the present invention is to provide a silicon wafer and a crystal for producing the same, which can ensure high strength without increasing the thickness and without adversely affecting the electrical characteristics and yield of the device. It is to provide a training method.

[0009]

Means for Solving the Problems In a silicon wafer manufactured through a growing process by the CZ method,
It is known that when subjected to a thermal oxidation treatment, ring-shaped oxidation-induced stacking faults called OSF rings are generated. The OSF ring not only causes deterioration of the characteristics of the semiconductor device itself, but also has different physical properties outside and inside the ring, and dislocation clusters are generated outside the OSF ring due to aggregation of interstitial atoms. However, the inside of the OSF ring is relatively healthy. On the other hand, this OS
It is known that the F-ring moves to the outer peripheral side of the single crystal as the pulling speed increases.

[0010] Under such circumstances, the OSF
Single crystals are grown under high-speed pulling conditions such that the rings are distributed at the outermost peripheral portion of the crystal excluded from the effective portion when forming the device.

However, there is no problem inside the OSF ring. In this portion, vacancy clusters caused by vacancy aggregation occur. These defects appear as small pits when the surface of the wafer is etched, but are so small that they have not been particularly problematic. However, since the pattern width has become very fine with the remarkable increase in the degree of integration in recent years, even this vacancy cluster has begun to become a problem in high-grade single crystals.

Although this vacancy cluster hardly occurs in a so-called epitaxial wafer in which a silicon single crystal thin film is grown on a wafer, this wafer is very expensive. From this viewpoint, it is required to grow a crystal having a small number of hole clusters. From this viewpoint, in growing a high-grade crystal, the pulling speed is reduced and the OSF ring is pulled up from the outermost periphery of the crystal. A low-speed pulling method has been considered in which a defect portion is generated inside to concentrate the defective portion at the central portion or is eliminated at the central portion to improve the yield.

However, in this low-speed raising, O
The generation of dislocation clusters outside the SF ring cannot be avoided.
And this dislocation cluster may become a harmful defect in the device. For this reason, in the low-speed raising, the OS
It is necessary to reduce the number of dislocation clusters generated outside the F-ring.

The present inventors have been conducting research on suppressing the generation of dislocation clusters at low speed pulling, and in the process, dislocation clusters, particularly fine dislocation clusters, have no adverse effect on device characteristics, and the wafer has no adverse effect. Of the present invention can be effectively increased, and the present invention has been completed. The following describes the results of this research.

In crystal growth by the CZ method, vacancies and interstitial silicon are taken into the solid-liquid interface of the grown crystal by a thermal equilibrium concentration. Of these holes, the holes move to the higher temperature side of the melt due to the slope diffusion due to the temperature gradient during the heat history of pulling. Further, due to the temperature distribution in the crystal radial direction and the release of vacancies on the crystal surface, the vacancies on the crystal surface have a low concentration. For this reason, the concentration of vacancies is high at the center of the crystal with a small temperature gradient and low at the outer periphery with a large temperature gradient.

On the other hand, interstitial silicon in a high temperature part hardly moves because its diffusion coefficient is as low as 1/100 to 1/1000 of that of vacancies. Therefore, the concentration of interstitial silicon is
It becomes almost constant regardless of the thermal history in the crystal radial direction, and a concentration difference between vacancies and interstitial silicon occurs in the crystal radial direction. FIG. 1A shows the vacancy concentration distribution and the interstitial silicon concentration distribution in the case of ordinary high-speed pulling.

As can be seen from FIG. 1A, the concentration of vacancies increases toward the center of the crystal, while the interstitial silicon concentration is constant in the radial direction of the crystal. Then, in the crystal center portion where the temperature gradient is small, the vacancy concentration becomes higher than the interstitial silicon concentration, and when the concentration difference B increases, vacancy clusters are generated. On the other hand, in the crystal periphery where the temperature gradient is large,
When the interstitial silicon concentration becomes higher than the vacancy concentration and the concentration difference A increases, dislocation clusters are generated.

Here, when the lifting speed is reduced, FIG.
As shown in (b), the heat history of the high-temperature portion becomes longer, and the diffusion of the slope is promoted, so that the vacancy concentration decreases. But,
The distribution form in the crystal radial direction does not change. For this reason, excessive vacancies decrease in the central portion of the crystal and the concentration difference B decreases, but excessive interstitial silicon increases in the peripheral portion of the crystal and the concentration difference A increases. As a result, dislocation clusters are generated from the outer periphery of the crystal, and the generation position is expanded toward the center from the normal generation position.

As described above, in the low-speed pulling, the vacancy cluster generation area inside the OSF ring narrows to the center, but on the other hand, the generation of dislocation clusters outside the OSF ring is inevitable. In addition, in the case of low speed, the crystal is gradually cooled,
The dislocation cluster enlarges because the growth of the dislocation cluster is promoted. Such a large dislocation cluster has a high risk of becoming a harmful defect in the device.

However, if these dislocation clusters are also fine, they are harmless to the device. Further, the fine dislocation clusters have an effect of increasing the wafer strength, and a wafer in which the fine dislocation clusters are dispersed over a wide area cannot be used. ,
It has been found from the studies by the present inventors that they possess high mechanical strength. This is presumably because in a single crystal wafer having excess interstitial silicon, a small dislocation loop is formed by the interstitial silicon, which absorbs or disperses stress such as heat.

In order to manufacture such a high-strength wafer, the vicinity of the solid-liquid interface of the grown crystal is locally quenched in the crystal growing step, and a temperature gradient difference between the outer peripheral portion and the central portion at the high temperature portion is obtained. Is set to 0.5 ° C./mm or more, and the crystal pulling speed is set to 70% or less of the maximum speed, and the OSF ring is generated inside the １ ／ position in the crystal diameter direction, thereby dislocation outside the OSF ring We found that it was effective to expand the cluster generation area.

That is, by locally quenching the vicinity of the solid-liquid interface of the grown crystal and setting the temperature gradient difference between the outer peripheral portion and the central portion in the high temperature portion to 0.5 ° C./mm or more, the maximum pulling speed can be reduced. With the increase, interstitial silicon is excessively taken into the outer periphery of the crystal, and the interstitial silicon aggregation is frozen, so that fine dislocation clusters are formed. And
By lowering the pulling speed relatively to 70% or less with respect to the increased maximum pulling speed, an OSF ring is generated inside the half position in the crystal diameter direction, and the area of the interstitial silicon-excess region in the wafer plane is reduced. Is 3/4 or more of the area of the entire wafer, so that a high-strength wafer can be obtained.

The silicon wafer of the present invention is derived from the above findings, and uses the CZ method and the OSF
A silicon wafer manufactured through a low-speed growth step in which a ring is formed inside a half position in the crystal diameter direction or disappears at the center of the crystal, and the average grain size of the dislocation cluster is 100 μm or less. The feature point of.

Further, according to the crystal growth method of the present invention, in the crystal growth method for growing a silicon single crystal using the CZ method, the temperature gradient difference between the crystal outer peripheral portion and the crystal center portion at a high temperature portion where the crystal temperature is 1300 ° C. or higher. Is locally quenched in the vicinity of the solid-liquid interface of the grown crystal so that the temperature is 0.5 ° C./mm or more, and an OSF ring is formed inside a half position in the crystal diameter direction or disappears at the center of the crystal. A feature of the configuration is that the lifting is performed under low speed conditions.

The average grain size of the dislocation cluster is the average value of the major axis of the composite pit observed when the wafer collected from the grown crystal is etched by Secco etch. When the average particle size exceeds 100 μm, coarse dislocation clusters become a starting point of slip and the like, and the wafer strength is not sufficiently improved. In the device, the coarse dislocation cluster becomes a harmful defect. Particularly preferred average particle size is 70 μm or less. The lower limit of the average grain size is not particularly defined, but if the dislocation cluster is too fine, the effect of improving the strength cannot be obtained.

Regarding the difference in temperature gradient between the outer peripheral portion of the crystal and the central portion of the crystal at a high temperature portion where the crystal temperature is 1300 ° C. or more, when the difference is less than 0.5 ° C./mm, the dislocation cluster is not sufficiently refined. A particularly preferred temperature gradient difference is 0.6 ° C /
mm or more.

As a method for locally quenching the vicinity of the solid-liquid interface of the grown crystal, the heat insulation performance at the lower end of the inverted conical heat shielding member arranged on the outer peripheral side of the silicon single crystal being grown is determined by another method. It is preferable to enhance the heat insulation performance at the portion from the viewpoint of simplicity and effectiveness. In other words, in recent crystal growth by the CZ method, an inverted cone-shaped heat shielding member called a cone is arranged outside the crystal pulling path, and heat entering the pulled crystal from outside is promoted on the way to promote heat radiation of the crystal. By doing so, the pulling speed is increased, but by strengthening the heat insulation performance at the lower end of this heat shielding member more than the heat insulation performance at other portions, the heat shielding member is moved to the surface of the crystal high-temperature portion immediately after the pulling. , The amount of incident heat is reduced, and the vicinity of the solid-liquid interface of the grown crystal is easily and effectively locally and rapidly cooled.

If the position where the OSF ring is generated is located outside the half position in the crystal diameter direction, the dislocation cluster generation region outside the ring is narrowed, and the wafer strength is not sufficiently improved. In addition, the vacancy cluster generation area inside the ring is widened, and quality degradation due to the vacancy cluster becomes a problem.

In order to generate the OSF ring inside a half position in the crystal diameter direction, the pulling speed is reduced to 70% or less of the maximum pulling speed. Here, the maximum pulling speed is (Dmax−Dmin) / D where the maximum outer diameter of the grown crystal is Dmax and the minimum outer diameter is Dmin.
The maximum pulling speed at which the crystal deformation rate represented by Dmin × 100% becomes 2% or less.

[0030]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 2 is an explanatory diagram of the crystal growing method according to the embodiment of the present invention.

The crystal growing apparatus includes a main chamber 1 and a pull chamber 2 connected to the center of the upper surface. These are composed of a substantially cylindrical vacuum vessel whose axial direction is vertical, and have a water cooling mechanism (not shown). Inside the main chamber 1, the crucible 3 is arranged substantially at the center, and a cylindrical heater 4 and a heat insulating material 5 are arranged outside the crucible 3. Above the crucible 3, an inverted conical heat shield member 6 called a cone is concentrically arranged.

The crucible 3 comprises an inner container made of quartz and an outer container made of graphite, and is rotatably and vertically movable supported by a support shaft (not shown). Above the crucible 3, a rotary and elevating lifting shaft 7 is suspended through the pull chamber 2. The heat shielding member 6 has a crystal temperature of 130.
In order to locally quench the vicinity of the solid-liquid interface of the grown crystal so that the temperature gradient difference between the crystal periphery and the crystal center becomes 0.3 ° C./mm or more in the high temperature part of 0 ° C. or more, the entire inside is thermally insulated. A heat insulating material 6b is separately attached to the outer surface of the lower end of the main body 6a of the normal structure filled with the material.

In order to grow a crystal, first, a polycrystalline silicon raw material is loaded into the crucible 3 with the chamber being disassembled. Next, the chamber 4 is assembled, and the heater 4 is operated in a state where the inside of the chamber is evacuated to melt the raw material in the crucible 3.

When the silicon raw material melt 8 is thus formed in the crucible 3, the seed crystal mounted on the lower end of the pulling shaft 7 is immersed in the raw material melt 8, and the crucible 3 is removed from this state.
While rotating the lifting shaft 7 in the opposite direction.
To rise. As a result, a silicon single crystal 9 is grown below the seed crystal.

The pulling speed here is 70% of the maximum pulling speed such that the OSF ring is generated inside the half position in the crystal diameter direction or disappears at the center.
It is as follows.

In the grown single crystal 9, the OSF ring is reduced by slow pulling, and the region where vacancy clusters are generated is limited to the crystal center. Although dislocation clusters occur outside the OSF ring, the dislocation clusters are refined to have an average grain size of 100 μm or less. Therefore, the wafer collected from the single crystal 9 has high strength and high quality with few harmful defects.

[0037]

EXAMPLES Next, examples of the present invention will be shown, and the effects of the present invention will be clarified by comparing with the conventional example.

In a quartz crucible, 12 polycrystalline silicon materials were placed.
From the raw material melt produced by charging and dissolving 0 kg, 10
When pulling an 8-inch crystal in the 0 direction, a conventional heat shielding member was used as a conventional example. The gap G from the lower end of the heat shielding member to the melt surface was 20 mm. The pulling speed was set to 70% of the maximum pulling speed so that the OSF ring was generated at a half position in the crystal diameter direction.

On the other hand, as a first embodiment of the present invention, a heat insulating material is attached to the entire outer surface of the lower end portion (portion 40 mm upward from the lower end) of the heat shielding member, and the thickness of the heat insulating material at this portion is changed to another value. 1. The thickness of the heat insulating material in the part
5 times. The pulling speed was set to 70% of the maximum pulling speed so that the OSF ring was generated at a half position in the crystal diameter direction.

In Examples 2 and 3, the thickness of the heat insulating material at the lower end of the heat shielding member was twice or 2.5 times that of the other portions. The lifting speed is OS
As the F-ring is generated at a half position in the crystal diameter direction,
It was 70% of the maximum pulling speed.

On the other hand, as a comparative example, the lifting speed was set to 80% of the maximum lifting speed. The OSF ring was generated at a quarter position from the outer periphery of the crystal. In the heat shielding member, the thickness of the heat insulating material at the lower end was twice the thickness of the heat insulating material at the other portions, as in Example 2.

In each example, the maximum pulling speed, pulling speed, difference in temperature gradient between the crystal outer peripheral portion and the crystal central portion at a high temperature portion where the crystal temperature is 1300 ° C. or more, dislocation in a 0.85 mm thick wafer collected from the grown crystal. Table 1 shows the results obtained by examining the average grain size and the yield stress of the cluster. Also,
Fig. 3 shows the results of investigation of the particle size distribution of dislocation clusters in each case.
Shown in

The difference in the temperature gradient at the high temperature portion was determined by calculation based on heat transfer simulation and temperature measurement with a simulator placed in the furnace. The grain size of the dislocation cluster was investigated by subjecting a wafer collected from the grown crystal to Secco etching and measuring the major axis of the cluster pit (composite pit) at an optical microscope magnification of 100. Wafer yield stress is a measured value at 900 ° C.

Except for the comparative example, the OSF ring was generated at a half position in the crystal diameter direction, and dislocation clusters were generated at the same width outside the ring. Since the high-temperature portion of the crystal was locally quenched so that the difference in temperature gradient was 0.5 ° C./mm or more, the average grain size of the dislocation cluster was reduced to 100 μm or less, and as a result, the yield strength was improved.

In the comparative example, the high temperature portion of the grown crystal was locally quenched so that the difference in temperature gradient was 0.5 ° C./mm or more. However, an OSF ring was generated near the outer periphery of the wafer, and interstitial silicon was generated. Since there were few dislocation clusters, the yield strength was low.

[0046]

[Table 1]

[0047]

As is apparent from the above description, the silicon wafer of the present invention has a high strength and a high quality with few harmful defects, because it has dislocation clusters that have been refined in a wide range.

Further, the crystal growing method of the present invention can easily and inexpensively produce a high-quality silicon wafer having high strength and few harmful defects.

[Brief description of the drawings]

FIG. 1 is a density distribution diagram for explaining the reason for the occurrence of clusters.

FIG. 2 is an explanatory diagram of a crystal growing method according to an embodiment of the present invention.

FIG. 3 is a table showing a particle size distribution of dislocation clusters.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Main chamber 2 Pull chamber 3 Crucible 4 Heater 5 Heat insulating material 6 Heat shielding member 6a Main body 6b Heat insulating material 7 Pulling shaft 8 Raw material melt 9 Single crystal

Claims (3)

[Claims] 1. A silicon wafer manufactured using a CZ method and a low-speed growth step in which an OSF ring is generated inside a half position in a crystal diameter direction or disappears at a center of a crystal, and a dislocation cluster is formed. Average particle size of 100
A silicon wafer having a thickness of not more than μm. 2. A crystal growing method for growing a silicon single crystal using a CZ method, wherein a difference in temperature gradient between a crystal outer peripheral portion and a crystal central portion is 0.degree.
The vicinity of the solid-liquid interface of the grown crystal is locally quenched so as to be 5 ° C./mm or more, and the OSF ring is 1/1 of the crystal diameter direction.
A crystal growing method, wherein pulling is performed under a low-speed condition where the pull-up occurs inside two positions or disappears at the center of the crystal. 3. The heat insulating performance at the lower end of the inverted conical heat shielding member arranged on the outer peripheral side of the silicon single crystal being grown is enhanced more than the heat insulating performance at other parts. Item 4. The crystal growing method according to Item 1.