JPH11233616A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device with a small element area, while a high breakdown strength system is maintained in a semiconductor device, and its manufacturing method. SOLUTION: An n<+> -type embedded layer 2 is formed on a p-type semiconductor substrate 1 and an n-type epitaxial layer 3 is formed thereon. A trench 6 with a depth which reaches the p-type semiconductor substrate 1 is formed in a region, where an element isolation region will be formed, so that an element region 5 and another element region are isolated from each other by the trench 6. Then, impurity of the same conductive type as the epitaxial layer 3 is doped in the element region 5, that is surrounded by the trench 6 to form an n<+> -type resistance diffusion layer 8 with impurity concentration higher than that of the epitaxial layer 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a diffusion resistance.

[0002]

2. Description of the Related Art A conventional semiconductor device will be described with reference to the drawings. FIG. 6A is a top view of a conventional semiconductor device, and FIG. 6B is a cross-sectional view of the conventional semiconductor device.
As shown in FIG. 6B, the P-type semiconductor substrate 10
Antimony is implanted into the element formation region 1 and boron is implanted into the element isolation region, thereby simultaneously forming the N ⁺ -type buried layer 102 and the P ⁺ -type buried layer 103. Next, an N-type epitaxial layer 104 is grown on the surface, an oxide film is further formed and selective oxidation is performed, and a field oxide film 107 is formed in a region where element isolation is to be formed. After that, an impurity is implanted to form the resistance diffusion layer 108. After an interlayer insulating film 109 is formed on the surface, the interlayer insulating film 109 on the resistance diffusion layer 108 is etched to form a contact hole 110
Open. Next, a metal such as Al is deposited to form a wiring layer 11.
Then, the conventional semiconductor device manufacturing process is completed.

[0003]

Conventionally, the diffusion resistance layer 10
8 is based on the PN junction, and FIG.
As shown in (a), in order to increase the breakdown voltage, P ⁺
It was necessary to increase the distance between the mold buried layer 103 and the resistance diffusion layer. Therefore, there is a problem that the PN junction of the element isolation greatly affects the area of the entire semiconductor device.

Conventionally, there has been a method of increasing the thickness of the epitaxial layer 104 in order to realize a high breakdown voltage. However, it takes time and cost to form the epitaxial layer 104, and the thickness of the epitaxial layer 104 is increased. As a result, it is necessary to deepen the impurity diffusion in order to form the P ⁺ -type buried layer 103. Therefore, there is a problem that the area of the element isolation region 105 increases in consideration of the lateral spread. .

Further, when a high voltage of about 200 V is applied, the voltage dependency increases due to depletion in the resistor due to the potential difference between both ends of the resistor, and there is a problem that linearity cannot be maintained. The present invention has been made in view of the above circumstances, and has as its object to realize a semiconductor device capable of maintaining a high breakdown voltage even if the element isolation region is reduced, and a method of manufacturing the same.

[0006]

To achieve the above object, a semiconductor device according to the present invention comprises a semiconductor substrate, a first impurity region formed on the semiconductor substrate, and a first impurity region formed on the semiconductor substrate. A trench formed to have a depth to reach a semiconductor substrate; and a first trench surrounded by the trench.
And a second impurity region of the same conductivity type as the first impurity region formed on the surface of the impurity region.

Further, the second impurity region is provided in the first impurity region.
It is desirable that the impurity concentration is higher than that of the impurity region.
A semiconductor substrate; a buried layer formed by injecting impurities into the semiconductor substrate; an epitaxial layer formed on the buried layer and the semiconductor substrate; And a resistive diffusion layer of the same conductivity type as the epitaxial layer formed on the surface of the region surrounded by the trench. .

Further, it is desirable that the resistance diffusion layer has a higher impurity concentration than the epitaxial layer. Also,
A semiconductor substrate, a buried oxide film formed on the semiconductor substrate, an active silicon layer formed on the buried oxide film, and a depth at least in a predetermined region from the surface to the buried oxide film. And a resistance diffusion layer of the same conductivity type as the active silicon layer formed on the surface of the region surrounded by the trench.

Further, it is desirable that the resistance diffusion layer has a higher impurity concentration than the active silicon layer. A step of preparing an element isolation region and an element region surrounded by the element isolation region on a semiconductor substrate; a step of injecting impurities to form a buried layer; and a step of growing an epitaxial layer on the surface. Forming a groove in the element isolation region at least to a depth from the surface to the semiconductor substrate; filling the groove with an insulating film; and injecting impurities into the element region to form a resistance diffusion layer There is a method for manufacturing a semiconductor device, characterized by comprising the following.

A step of preparing an element isolation region on the semiconductor substrate and an element region surrounded by the element isolation region; a step of forming a buried oxide film on the surface; and a step of forming active silicon on the buried oxide film. Forming a layer, forming a groove at a depth at least from the surface to the buried oxide film in the element isolation region, burying the groove with an insulating film, and adding impurities to the element region. Implanting to form a resistance diffusion layer.

Further, after the step of filling the trench with an insulating film, a step of forming an oxide film on a surface and a step of selectively oxidizing the oxide film to form a field oxide film on the element isolation region. It is desirable to have the following.

[0012]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.
A semiconductor device and a method for manufacturing the same according to the first embodiment will be described. FIG. 1A is a top view of a semiconductor device according to a first embodiment of the present invention, and FIG. 1B is a cross-sectional view of the semiconductor device according to the first embodiment of the present invention.

A semiconductor device according to a first embodiment of the present invention includes a P-type semiconductor substrate 1 having an N ⁺ -type buried layer 2 and an N-type epitaxial layer 3 formed on a surface thereof; Trench 6 having a depth reaching mold semiconductor substrate 1, and an N-type impurity formed by injecting an N-type impurity having the same conductivity type as epitaxial layer 3 into element region 5 surrounded by trench 6. ^{And a +} -type resistance diffusion layer 8.

Next, a method of manufacturing the semiconductor device according to the first embodiment of the present invention will be described with reference to FIG. FIG. 2 is a manufacturing process diagram of the semiconductor device according to the first embodiment of the present invention.

First, as shown in FIG. 2A, antimony is implanted into a P-type semiconductor substrate 1 to form an N ⁺ -type buried layer 2. Next, an epitaxial layer 3 of about 3 μm is formed on the surface.

Next, as shown in FIG. 2B, a trench 6 is formed in the region where the element isolation is to be formed, so as to reach the P-type semiconductor substrate 1. After oxidizing the inner wall of the trench 6, an oxide film is formed on the surface, and the oxide film on the element isolation region 4 including the region where the trench 6 is formed is selectively oxidized to form a field oxide film 7. After that, polysilicon is buried in the trench 6.

Next, as shown in FIG. 2C, arsenic is implanted and diffused into the element region 5 surrounded by the trench 6 and the field oxide film 7 to form an N ⁺ -type resistance diffusion layer 8. The N ⁺ -type resistance diffusion layer 8 formed at this time has a depth that does not reach the N ⁺ -type buried layer 2.

Next, as shown in FIG. 2D, after an interlayer insulating film 9 is formed on the surface, a contact hole 10 is opened on the N ⁺ -type resistance diffusion layer 8, and a metal film such as Al is formed. The wiring layer 11 is formed by vapor deposition. As described above, the first aspect of the present invention
The manufacturing process of the semiconductor device according to the second embodiment ends.

The element isolation is realized by the trench 6 and the N ⁺ -type resistance diffusion layer 8 of the same conductivity type as that of the epitaxial layer 3 is formed. It can be reduced to about 46%.

Conventionally, as shown in FIG. 3 (a), it is necessary to increase the area of the element isolation region 4 and to increase the interval between the elements in order to realize a horizontal breakdown voltage. . On the other hand, according to the present embodiment, FIG.
As shown in b), since the trench 6 is formed in the element isolation region 4, the elements can be formed close to each other.

Incidentally, in order to realize a larger withstand voltage system, if a further trench is formed outside the trench 6 to form a double trench, it can be realized with a minimum increase in element area.

The depth of trench 6 is not limited as long as it reaches P-type semiconductor substrate 1. Next, a semiconductor device according to a second embodiment will be described with reference to FIG. FIG. 4A is a top view of a semiconductor device according to the second embodiment of the present invention, and FIG. 4B is a cross-sectional view of the semiconductor device according to the second embodiment of the present invention.

In the semiconductor device according to the second embodiment of the present invention, a buried oxide film 12 is formed on a P-type semiconductor substrate 1, and another P-type semiconductor substrate is bonded on the buried oxide film 12. And implant and diffuse boron to obtain an impurity concentration of about 1 × 10
^An SOI (Silicon On Insulator) substrate formed by forming a P-type active silicon layer 13 of about ¹⁵ atoms / cm ³ is used. The trench 6 formed in the element isolation region 4 reaches the buried oxide film 12. Of depth. In addition, boron is implanted and thermally diffused into the element region 5 so that the impurity concentration is higher than that of the P-type active silicon layer 13 by about 1 × 10 5.
A P ⁺ -type resistance diffusion layer 14 of about ¹⁸ atoms / cm ³ is formed.

Next, a method of manufacturing a semiconductor device according to a second embodiment of the present invention will be described with reference to FIG. FIG. 5 is a manufacturing process diagram of the semiconductor device according to the second embodiment of the present invention.

First, as shown in FIG. 5A, a buried oxide film 12 of silicon oxide is formed on a P-type semiconductor substrate 1. Next, another P-type semiconductor substrate is bonded on the buried oxide film 12, boron is implanted into the bonded P-type semiconductor substrate, and thermal diffusion is performed to achieve an impurity concentration of about 1 × 10 ¹⁵ atom.
A P-type active silicon layer 13 of about ms / cm ³ is formed.

Next, as shown in FIG. 5B, a trench 6 having a depth reaching the buried oxide film 12 is formed in the region where the element isolation is to be formed, and the trench 6 and the buried oxide film 12 are formed. The element region 5 is completely surrounded and electrically insulated from the surroundings. After oxidizing the inner wall of the trench 6, an oxide film is formed on the surface, and the oxide film on the element isolation region 4 including the portion where the trench 6 is formed is selectively oxidized to form a field oxide film 7. After that, the trench 6 is filled with polysilicon.

Next, as shown in FIG. 5C, boron is implanted and diffused into the element region 5 surrounded by the trench 6 and the field oxide film 7, and an impurity concentration of about 1 × 10 A P ⁺ -type resistance diffusion layer 14 of about ¹⁸ atoms / cm ³ is formed.

Next, as shown in FIG. 5D, after forming an interlayer insulating film 9 on the surface, a contact hole 10 is opened on the P ⁺ -type resistance diffusion layer 14, and a metal film such as Al is formed. The wiring layer 11 is formed by vapor deposition. Thus, the manufacturing process of the semiconductor device according to the second embodiment of the present invention is completed.

By using the present invention for an SOI substrate, the P ⁺ -type resistance diffusion layer 14 is dielectrically separated by the trench 6 and the buried oxide film 12 and is completely separated from the surrounding elements. Is determined not by the resistance and the depletion layer of the active silicon layer but by the trench 6 and the buried oxide film 12, and the distance of the element isolation region 4 can be reduced. Also, since the vertical breakdown voltage is determined by the buried oxide film 12, the P-type active silicon layer 13 does not need to be formed thick, and the parasitic capacitance can be reduced.

Further, the P ⁺ -type resistance diffusion layer 14 is formed in a shallow region of the surface, and a current path flowing through the P ⁺ -type resistance diffusion layer 14 is separated from the buried oxide film 12.
The accumulated layer or depletion layer of holes formed at the interface of the semiconductor substrate is separated from the current path, and the linearity can be improved.

[0031] Incidentally, when the substrate is a negative potential, the active silicon layer suppressing the extension of the depletion layer interface of the buried oxide film 12 becomes accumulate layer by the P-type, the P ⁺ -type resistive diffusion layer 14 The approach of the depletion layer can be prevented. Thereby, voltage dependency can be reduced, high breakdown voltage can be maintained, and linearity can be improved.

Further, the method of forming the SOI substrate is the same as that of the second method.
However, the present invention is not limited to the embodiment. In addition, the first
The present invention is not limited to the second embodiment, and element isolation can be realized only by the trench 6 without forming the field oxide film 7.

The conductivity type of the semiconductor substrate or the epitaxial layer or the like is not limited, and the resistance diffusion layer and the layer immediately below it may be formed of the same conductivity type. Further, the method of forming the resistance diffusion layer is not limited to the impurity diffusion method, but may be realized by another method, for example, a gas phase diffusion method.

[0034]

According to the present invention, the element isolation is formed by trenches, and the resistance diffusion layer is formed of the same conductivity type as the layer immediately below, thereby greatly increasing the element area while maintaining a high breakdown voltage system. It is possible to reduce.

Further, by applying the present invention to an SOI substrate, a vertical breakdown voltage can be secured, a parasitic capacitance can be reduced, and a diffusion resistance having no voltage dependence and having linearity can be obtained.

[Brief description of the drawings]

FIG. 1A is a top view of a semiconductor device according to a first embodiment of the present invention. (B) Sectional drawing of the semiconductor device concerning a 1st embodiment of the present invention.

FIG. 2 is a sectional view illustrating a manufacturing process of the semiconductor device according to the first embodiment of the present invention.

FIG. 3A is a top view of a conventional semiconductor device. (B) A top view of the semiconductor device according to the first embodiment of the present invention.

FIG. 4A is a top view of a semiconductor device according to a second embodiment of the present invention. (B) Sectional drawing of the semiconductor device concerning a 2nd embodiment of the present invention.

FIG. 5 is a sectional view illustrating a manufacturing process of the semiconductor device according to the second embodiment of the present invention.

FIG. 6A is a top view of a conventional semiconductor device. (B) Sectional drawing of the conventional semiconductor device.

[Explanation of symbols]

1, 101: P-type semiconductor substrate, 2, 102: N ⁺ type buried layer, 3, 104: epitaxial layer, 4, 105: element isolation region, 5, 106: element region, 6, trench: 7, 107 ... Field oxide film, 8 ... N ⁺ type resistance diffusion layer, 9, 109 ... interlayer insulating film, 10, 110 ... contact hole, 11, 111 ... wiring layer, 12 ... buried oxide film, 13 ... P-type active silicon layer, 14: P ⁺ type resistance diffusion layer; 103: P ⁺ type buried layer; 108: resistance diffusion layer

Claims (9)

[Claims] A semiconductor substrate; a first impurity region formed on the semiconductor substrate; a trench formed in the first impurity region to a depth reaching the semiconductor substrate; A semiconductor device comprising: a first impurity region formed on a surface of the first impurity region surrounded by the trench; and a second impurity region of the same conductivity type. 2. The semiconductor device according to claim 1, wherein said second impurity region has a higher impurity concentration than said first impurity region. 3. A semiconductor substrate, a buried layer formed by implanting impurities into the semiconductor substrate, an epitaxial layer formed on the buried layer and the semiconductor substrate, and A trench formed at a depth reaching the semiconductor substrate; and a resistive diffusion layer of the same conductivity type as the epitaxial layer formed on the surface of a region surrounded by the trench. Semiconductor device. 4. The semiconductor device according to claim 3, wherein the resistance diffusion layer has a higher impurity concentration than the epitaxial layer. 5. A semiconductor substrate; a buried oxide film formed on the semiconductor substrate; an active silicon layer formed on the buried oxide film; And a resistance diffusion layer of the same conductivity type as the active silicon layer formed on the surface of a region surrounded by the trench. . 6. The semiconductor device according to claim 5, wherein the resistance diffusion layer has a higher impurity concentration than the active silicon layer. 7. A step of preparing an element isolation region and an element region surrounded by the element isolation region on a semiconductor substrate, a step of implanting impurities to form a buried layer, and growing an epitaxial layer on the surface. A step of forming a groove at a depth at least from the surface to the semiconductor substrate in the element isolation region, and a step of filling the groove with an insulating film;
Forming a resistance diffusion layer by injecting impurities into the element region. 8. A step of preparing an element isolation region and an element region surrounded by the element isolation region in a semiconductor substrate, a step of forming a buried oxide film on a surface, and a step of forming active silicon on the buried oxide film. Forming a layer, forming a groove at a depth at least from the surface to the buried oxide film in the element isolation region, burying the groove with an insulating film, and adding impurities to the element region. Implanting to form a resistance diffusion layer. 9. A step of forming an oxide film on a surface after the step of forming the groove, and a step of selectively oxidizing the oxide film to form a field oxide film on the element isolation region. The method for manufacturing a semiconductor device according to claim 5, wherein the method is provided.