JPH11212539A - Display controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a display controller which can display characters with partial drop-out without using an inexpensive memory having a large circuit scale like a graphic memory and eliminates the write operation to a display memory at each time of the change of the display position to reduce the burden on the display operation of a microprocessor and reduces the program capacity related to display. SOLUTION: A means is provided which changes the read start position of a display memory 22 in the horizontal direction. For example, when the display start position is designated in the left to a reference position, characters displayed in a picture can be gradually erased or be caused to gradually appear in the edge of the picture by only changing one data designated by a microprocessor 12. Consequently, the display start position of the display memory 22 can be changed without rewrite of the display memory 22.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to on-screen display of various information such as operation information and adjustment information on a video signal screen of a display device of a video device such as a television receiver or a video tape recorder using characters and graphics. The present invention relates to a display control device for causing the display to be controlled.

[0002]

2. Description of the Related Art In recent years, in video equipment such as a color television receiver and a video tape recorder, with the diversification of video information, for example, a circuit for converting a video signal into a digital signal and performing video processing has been digitized. I'm advancing.

As described above, by digitizing the image processing circuit, the image quality is improved, and a function of displaying a screen such as a parent-child screen (two-screen display), a multi-screen, and a still image reproduction by applying a memory, for example. Can be added.

[0004] By the way, various functions are adopted in such a video device. Among them, a superimpose function (hereinafter referred to as an on-screen function) for displaying characters, video information and the like on a screen in a superimposed manner. Is a function widely used in video equipment in general.

As is well known, the on-screen function is to display characters and video information desired by the viewer so as to be superimposed on the screen. For example, a channel number is displayed when a channel is switched, and a volume during setting is displayed. Various settings such as levels can be displayed.

Further, it is also possible to display a menu for performing various controls on the screen by using the on-screen function, and to control the apparatus by using the menu display as an operation panel.

[0007] As described above, the on-screen function has become an indispensable function in recent video equipment.
It is also a necessary function for the user to easily perform the device setting operation.

In a television receiver or the like, in order to perform an on-screen function, an external signal based on a character (hereinafter referred to as an on-screen signal) is generated and superimposed on a video signal. An on-screen display circuit (hereinafter referred to as OSD) generates and superimposes the on-screen signal.
Circuit).

The on-screen function using such an OSD circuit can be used not only for home-use television receivers, but also for home-use television receivers.
It is also used for display devices such as computers.

A channel display, a volume display, and the like employed in a television receiver can display characters by a relatively simple on-screen function. On the other hand, in more sophisticated television receivers,
Some devices have a function of changing the on-screen display according to a user operation using the on-screen display as an operation panel. By using such a function, the user can operate while confirming the adjustment items and the adjustment amount by on-screen display on the screen, and high operability is obtained.

FIG. 14 is a block diagram showing the overall configuration of a display control device for performing on-screen display on such a screen.

Referring to FIG. 14, the display control device comprises an OSD circuit having a microcomputer block 10, a main circuit section 20, and a timing block 30. Note that some OSD circuits do not include the microcomputer block 10.

The microcomputer block 10 comprises a microprocessor 12 as a CPU, a program memory 13 composed of a ROM, and a working memory 14 composed of a RAM.

The main circuit section 20 includes a control circuit 21 and a display memory.
22, a character memory 23, and an output control circuit 24. The control circuit 21 is for performing OSD display control. The display memory 22 stores a character number corresponding to a display position on the screen. The character memory 23 stores a character font represented by m × n (m and n are natural numbers) dots specified by the character numbers. The output control circuit 24 converts a part of the character font into a form corresponding to the display scan, processes the character data with attribute data such as color and border, and outputs it as an on-screen signal 107. The switch 26 is a superimposing means for receiving the video signal supplied to the input terminal 25 and the on-screen signal 107 and superimposing the on-screen signal on the video signal by the control signal 119.

A microcomputer block 10 and a control circuit 21 for performing OSD display control are connected by a CPU bus 101.

The display device 27 is constituted by a cathode ray tube (CRT), and displays a video signal on which an on-screen signal from the main circuit section 20 is superimposed on a screen.

The timing block 30 includes the control circuit 2
1, a timing signal is supplied to the display memory 22 and the character memory 23, and a horizontal position counter 34, a horizontal position decoder 35, a vertical position counter 36, a vertical position decoder 37, a variable delay 38, And a delay unit 39. The horizontal position counter 34 outputs a horizontal synchronization signal (H
When a predetermined number of display clocks have been counted based on D), the horizontal leading character position of the on-screen signal on the screen is determined. The horizontal position decoder 35 includes a display memory 22 corresponding to a horizontal position on the screen.
To the read address. Vertical position counter
Reference numeral 36 is used to determine the position of the first character in the vertical direction of the on-screen signal on the screen when the predetermined number of horizontal synchronization signals HD are counted based on the vertical synchronization signal (VD). The vertical position decoder 37 decodes to a read address of the display memory 22 corresponding to a vertical position on the screen. The variable delay unit 38 delays the horizontal synchronizing signal HD serving as a reference of the horizontal position counter 34 by setting a delay amount in order to correspond to various TV sets, and determines the first character position in the horizontal direction of the displayed character data on the screen. The correction is performed to arrange the character data at an appropriate position in the horizontal direction. The variable delay unit 39 delays the vertical synchronization signal VD, which is the reference of the vertical position counter 36, by setting the delay amount in the same manner as the variable delay unit 38, and corrects the top character position of the displayed character data in the vertical direction on the screen By doing so, the character data is arranged at an appropriate position in the vertical direction.

In such a configuration, the CPU clock 110 from the input terminal 11 is input to the control circuit 21 while being input to the microprocessor 12, and the microprocessor 12 displays an OSD display from operating means such as a remote controller (not shown). An instruction signal (including an instruction signal such as a channel number display accompanying the channel switching) is input from the input terminal 15. The control circuit 21 receives a display clock 112 from the input terminal 31, a horizontal synchronization signal (HD) 113 from the input terminal 32, and a vertical synchronization signal (V) from the input terminal 33.
D) 114 is input.

The horizontal synchronizing signal 113 and the vertical synchronizing signal 114 are also input to the timing block 30. In the horizontal direction, the horizontal position counter 34 in the horizontal direction follows the timing of the horizontal synchronizing signal HD passed through the variable delay 38. The counter value of the display clock 112 counted based on the horizontal synchronizing signal is generated and input to the horizontal position decoder 35. The horizontal position decoder 35 decodes the read address of the display memory 22 corresponding to the horizontal position on the screen based on the counter value from the horizontal position counter 34, and reads the read address bus 11
Output to 8.

In the vertical direction, the vertical position counter 36 generates a counter value when a predetermined number of horizontal synchronization signals have been counted based on the vertical synchronization signal 114 in accordance with the timing of the vertical synchronization signal VD passed through the variable delay device 39, Input to the vertical position decoder 37. The vertical position decoder 37 decodes the counter value from the vertical position counter 36 into a read address of the display memory 22 corresponding to the vertical position on the screen, and outputs it to the read address bus 118. With the output of the horizontal position decoder 35 and the output of the vertical position decoder 37,
A read address of the display memory 22 storing character data (character number and attribute data) corresponding to the position of the display screen is formed, and this read address is supplied to the control circuit 21.

The control circuit 21 controls the microprocessor 12 based on the timing of the horizontal synchronizing signal 113 and the vertical synchronizing signal 114.
An interrupt signal 111 is generated to transfer data to and from the CPU bus 101. Further, a read address from the timing block 30 for creating a read address of the display memory 22 is supplied to the display memory 22 as a display control signal 102 to perform an OSD display operation.

In the OSD display operation, a character number (hereinafter referred to as "character code") 103 read out from the display memory 22 based on the read address and attribute data 104 such as character color and green color are output to the character memory 23, respectively. A part 105 of the character font read out from the character memory 23 based on the character number is processed by the attribute data 104 and input to the control circuit 24 as an on-screen signal 107 to one terminal of the switch 26 as the superimposing means. I do. The other terminal of the switch 26 receives a video signal 108 from the input terminal 25 and a switching signal from the output control circuit 24.
By switching between the on-screen signal 107 and the video signal 108 in accordance with 119, one of the signals is output to the display device 27 as the screen display signal 109 for display, or the on-screen signal 107 is superimposed on the video signal 108. Pause and output to the display device 27 as the screen display signal 109 for display.

As described above, the variable delay units 38 and 39 in the timing block 30 delay the horizontal synchronization signal 113 from the input terminal 32 and the vertical synchronization signal 114 from the input terminal 33, respectively. Are supplied to the horizontal position counter 34 and the vertical position counter 36.
With respect to each delay amount of the vertical synchronizing signal 114, data for delay control from the microprocessor 12 is supplied by the control circuit 21 to the delay units 38 and 39 via the data bus 117 at timing corresponding to the display clock 112. Thus, the delay amount is set. By setting these delay amounts, the position of the character data to be displayed on the screen can be corrected, and the character data can be arranged at an appropriate position on the screen in a well-balanced manner and OSD-displayed.

The microcomputer block 10 and the control circuit 21
In many cases, different clocks are used for the CPU clock 110 and the display clock 112 used for the above. Therefore, they are described as different clocks, but there is no problem even if they are the same clock.

FIGS. 15A and 15B show the structure of the display memory 22. FIG. The display memory shown in FIG. 15A has 24 columns in the horizontal direction and 12 rows in the vertical direction, that is, 24 × 12.
The number of characters is divided, and a character code is stored at each position (address) corresponding to each divided character. The horizontal display start position (HS) is set to a horizontal synchronization signal (H).
D) is set by the variable delay unit 38, and the vertical display start position (VS) is set by the variable delay unit 39 based on the vertical synchronization signal (VD). The display memory shown in FIG. 15 (b) is a case where the display memory is divided for each row, and the vertical display start positions VS1, VS2,.
, VS8 can be individually set on the basis of the vertical synchronization signal (VD). In this case, the horizontal display start position (HS) is set to a predetermined position HS1 based on the horizontal synchronization signal (HD).

By the way, in the display control device shown in FIG. 14, when the operation information and the adjustment information of the video equipment are displayed on the screen by the OSD, the display memory 22 is stored in the display memory 22 in accordance with the operation contents of the remote control transmitter (not shown). All contents are rewritten at once. In other words, in a case where the state in which the screen is sequentially switched according to the operation is shown as a display operation, for example, the operation of extinguishing the OSD display on the left side of the screen, or the operation of pulling out the OSD display from the left side of the screen, The contents of the display memory 22 are changed as shown in FIGS. 16 (a), (b) and (c) or FIGS. I had to rewrite them sequentially.

FIG. 17 shows an operation flow of the microprocessor 12 in FIG. By timer interrupt,
In step S01, the number of digits to start displaying is set. In step S02, a character string to be displayed is transferred to the display memory 22, and in step S03, data in the display memory 22 that is no longer needed is deleted. The processing must be performed for the above-described character string transfer line, and in step S04, the above operations of S02 to S03 have to be repeated for the number of displayed lines.

Therefore, every time the display position is changed, data must be rewritten, which increases the load on the microprocessor 12 and requires a program for rewriting the display memory 22 to increase the program capacity. Was.

Further, coordinates are set on the screen for performing the OSD display. Up to now, the circuit configuration is such that the reference position of the OSD display is located on the upper left side of the screen, and the OSD display is displayed according to the horizontal and vertical synchronization signals that are the reference for displaying one screen. Therefore, there is a problem that the display position can be set only at the lower right side of the reference position (upper left side of the screen).

Further, from the left or upper part of the screen, the OSD
Considering that the display is drawn, each character constituting the display image could be displayed in the entire character (that is, in character units), but a display in which a part of the character was missing, for example, the left half of the character OSD display such as hiding in the left part of the screen or hiding the upper half of the character in the upper part of the screen could not be performed.

By the way, a personal computer (hereinafter, referred to as a personal computer) is one that performs a screen display similar to the on-screen display of the television receiver described above. A personal computer has a graphic memory called a video RAM (VRAM) connected to a bus from a microcomputer, and creates a final stage screen to be actually displayed on the graphic memory by a method such as synthesis and displays the screen on a display device. It has a configuration. The control method is described in JP-A-2-7093, "Display address generator" and JP-A-60-216385, "Display controller".

According to the configuration of the personal computer, although the display character string can be moved by the program processing, the number of steps of the program is large, and the graphic memory is required. There has been a problem that it becomes large and very expensive in terms of cost.

[0033]

As described above, in the conventional display control device, when performing a display in which the state in which the screen is switched according to the operation is displayed as an operation, for example, an operation of extracting the display from the left side of the screen is performed. To do so, it is necessary to rewrite the data written in the display memory each time according to the amount of the drawn out.Every time the display position is changed, the load on the microprocessor increases and the rewriting operation of the display memory is performed. There is a problem that a program is required and the program capacity is increased.

When the display is pulled out from the screen, the display can be moved in units of characters, but a display in which a part of the display characters is missing, for example, the upper half of the characters is hidden at the top of the screen. Could not be displayed.

Further, if a similar screen display is performed by a personal computer, the number of steps of the program processing is large and a graphic memory is required, so that the circuit scale becomes large and the cost becomes very high. There was a problem.

In view of the above problems, the present invention enables an OSD display in which a part of display characters is missing without using an expensive one having a large circuit scale such as a graphic memory, and furthermore, a display position. It is an object of the present invention to provide a display control device capable of reducing the load on the display operation of the microprocessor by reducing the operation of writing to the display memory every time the display is changed and reducing the program capacity related to the OSD display. Is what you do.

[0037]

A display control device according to the first invention of the present application stores characters such as characters and symbols represented by m × n (m and n are natural numbers) dots displayed on a screen. A character memory, a display memory for specifying at which position on the screen the character is to be displayed, and a data for specifying a position on the screen from the display memory based on a horizontal and vertical synchronization signal of a video signal, Display control means for reading the character corresponding to the data from the character memory and displaying it on a screen, and a display start position and display of the display control means by a unit constituting the character displayed based on the data. And changing means for changing the range.

When the display start position is specified to the left with respect to the reference position by the above means, the read start position of the display memory is moved by, for example, data specifying the display start position from the microprocessor. By simply changing one piece of data designated by the microprocessor, characters to be displayed on the screen can be gradually erased or displayed on the edge of the screen in pixel units.

[0039]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the overall configuration of the display control device according to the first embodiment of the present invention. In FIG. 1, description of the same components as those in FIG. 14 is omitted.

Referring to FIG. 1, the display control device comprises an OSD circuit having a microcomputer block 10, a main circuit section 20, and a timing block 30. Here, the OSD circuit refers to a circuit in which the blocks 10, 20, and 30 are contained in one IC.

The microcomputer block 10 comprises a microprocessor 12 as a CPU, a program memory 13 composed of a ROM, and a working memory 14 composed of a RAM.

The main circuit section 20 includes a control circuit 21 and a display memory.
22, a character memory 23, and an output control circuit 24. The control circuit 21 is for performing OSD display control. The display memory 22 stores a character number corresponding to a position on the display screen. The character memory 23 stores a character font represented by m × n (m and n are natural numbers) dots specified by the character numbers. The output control circuit 24 processes a part of the character font with attribute data such as character color and border, and outputs the processed data as an on-screen signal. The switch 26 is a superimposing means for inputting the video signal supplied to the input terminal 25 and the on-screen signal and superimposing the on-screen signal on the video signal.

The microcomputer block 10 and a control circuit 21 for performing OSD display control are connected by a CPU bus 101.

The display device 27 is constituted by a cathode ray tube (CRT), and displays a video signal on which an on-screen signal from the switch 26 is superimposed on a screen.

The timing block 30 includes the control circuit 2
1, a timing signal is supplied to the display memory 22 and the character memory 23, and a horizontal position counter 34, a temporary storage circuit 40, an adder 41, a variable delay unit 42, a horizontal position decoder 35, and a vertical position It comprises a counter 36, a vertical position decoder 37, a variable delay unit 38, and a variable delay unit 39. The horizontal position counter 34 determines the first character position in the horizontal direction of the on-screen signal on the screen, that is, the horizontal display start position, when a predetermined number of display clocks are counted based on the horizontal synchronization signal (HD). . The temporary storage circuit 40 stores a correction amount (set value) for changing the display start position in the horizontal direction through the microprocessor 12 and the control circuit 21 based on a horizontal movement instruction from an operation means such as a remote control transmitter and the like. The horizontal character position is corrected in units and pixels (dots), and the correction amount can be divided into 200 characters and 201 remaining dots and output. The adder 41 adds the output of the number of characters from the horizontal position counter 34 and the output of the number of characters from the temporary storage circuit 38. The variable delay unit 42 is for correcting the character position in dot units, and is a variable delay unit described later.
The horizontal synchronizing signal HD is input from the memory 38, and the horizontal synchronizing signal is delayed by the number of dots output from the temporary storage circuit 40 and supplied to the reset terminal of the horizontal position counter 34. The horizontal position decoder 35 receives the added value from the adder 41,
The addition value is decoded into a read address of the display memory 22 corresponding to the horizontal position on the screen. The vertical position counter 36 is for determining the position of the first character in the vertical direction of the on-screen signal on the screen when a predetermined number of horizontal synchronization signals HD are counted based on the vertical synchronization signal (VD). The vertical position decoder 37 receives the output of the vertical position counter 36 and decodes the output to a read address of the display memory 22 corresponding to the vertical position on the screen. The variable delay unit 38 is provided with a horizontal position
By delaying the horizontal synchronization signal HD which is the reference 34 and changing the first character position in the horizontal direction of the character data to be displayed on the screen, the character data is arranged at an appropriate position in the horizontal direction. The variable delay unit 39 delays the vertical synchronization signal VD, which is the reference of the vertical position counter 36, by setting the delay amount, and changes the vertical character position of the character data to be displayed on the screen in the vertical direction. At an appropriate position in the vertical direction.

The microprocessor 12 and the control circuit
CPU clock 110 used for 21 and display clock 112
Since different clocks are often used, they are described as different clocks. However, there is no problem even if the clocks are the same.

With the above configuration, the microprocessor 12 in the microcomputer block 10, the temporary storage circuit 40 for the correction amount in the timing block 30, the adder 41, and the variable delay unit 38 are arranged in the horizontal direction at the display start position. Is configured as changing means. The microprocessor 12 constitutes means for designating the horizontal display start position to the left with respect to the reference position, and the temporary storage circuit 40, the adder 41, and the variable delay 38 are based on the designation of the microprocessor 12. Means for changing the read position of the display memory 22. The temporary storage circuit 40 and the adder 41 constitute means for changing the display position in units of characters when changing the read position of the display memory 22, and the temporary storage circuit 40 and the variable delay unit 38 Means for correcting the display position in pixel units. The control circuit 21 controls the screen 270 by the display control signal 273.
Means for limiting the display range above is provided. Control circuit 21
The output control circuit 24 and the output control circuit 24 constitute display control means for on-screen display.

In such a configuration, the CPU clock 110 from the input terminal 11 is inputted to the control circuit 21 while being inputted to the microprocessor 12, and the microprocessor 12 is provided with an OSD from an operating means such as a remote control transmitter (not shown).
A signal instructing display (including an instruction signal such as a channel number display accompanying the channel switching) is input from the input terminal 15. The control circuit 21 has an input terminal 31
, A horizontal synchronizing signal (HD) 113 from the input terminal 32, and a vertical synchronizing signal (VD) 114 from the input terminal 33.

The horizontal synchronizing signal 113 and the vertical synchronizing signal 114 are also input to the timing block 30. In the horizontal direction, the horizontal synchronizing signal HD passed through the variable delay unit 38 is further varied in the horizontal position counter 34. In accordance with the delay amount in dot units determined by the delay unit 42, a counter value is generated when the display clock 112 is counted a predetermined number based on the horizontal synchronization signal, and the output of the counter 34 and the number of characters output from the temporary storage circuit 40 are output. Is added to the horizontal position decoder 35 by the adder 41. The horizontal position decoder 35 decodes the output from the adder 41 into a read address of the display memory 22 corresponding to the horizontal position on the screen, and outputs it to the read address bus 118.

In the vertical direction, the vertical position counter 36 generates a counter value when a predetermined number of horizontal synchronization signals have been counted based on the vertical synchronization signal 114 in accordance with the timing of the vertical synchronization signal VD passed through the variable delay device 39, Input to the vertical position decoder 37. The vertical position decoder 37 decodes the counter value from the vertical position counter 36 into a read address of the display memory 22 corresponding to the vertical position on the screen, and outputs it to the read address bus 118. With the output of the horizontal position decoder 35 and the output of the vertical position decoder 37,
A read address of the display memory 22 storing character data (character number and attribute data) corresponding to the position of the display screen is formed, and this read address is supplied to the control circuit 21.

The control circuit 21 controls the microprocessor 12 based on the timing of the horizontal synchronizing signal 113 and the vertical synchronizing signal 114.
An interrupt signal 111 is generated to transfer data to and from the microcomputer block 10, that is, the CPU bus 101.
Further, the read address from the timing block 30 is supplied to the display memory 22 as a display control signal 102, so that the OSD
Perform display operation.

In the OSD display operation, the character number (hereinafter referred to as "character code") 103 read from the display memory 22 and the attribute data 104 such as character color and green color are given to the character memory 23 and the output control circuit 24, respectively. Character font 105 read from character memory 23 is assigned to attribute data 10
4 and is input as an on-screen signal 107 to one terminal of the switch 26 as the superimposing means. The video signal 108 is input to the other terminal of the switch 26 from the input terminal 25, and by switching between the on-screen signal 107 and the video signal 108 by the switching signal 119 from the output control circuit 24, one of the signals is Screen display signal 10
For example, the image signal 108 is output to the display device 27 for display, or the on-screen signal 107 is superimposed on the video signal 108 and output as the screen display signal 109 to the display device 27 for display.

As described above, the variable delay units 38 and 39 in the timing block 30 delay the horizontal synchronization signal 113 from the input terminal 32 and the vertical synchronization signal 114 from the input terminal 33, and The delay amounts of the horizontal synchronizing signal 113 and the vertical synchronizing signal 114 are supplied to the position counter 34 and the vertical position counter 36, based on an OSD display position instruction from operation means (not shown) such as a remote control transmitter. Then, the delay amount is set by supplying the data for delay control from the microprocessor 12 to the delay units 38 and 39 via the data bus 117 at the timing corresponding to the display clock 112 by the control circuit 21. By setting these delay amounts, the position of the character data to be displayed on the screen can be changed, and the character data can be arranged at an appropriate position on the screen in a well-balanced manner for OSD display.
The character position can be changed by the delay units 38 and 39 only in units of characters.

Further, in the first embodiment, the correction amount of the temporary storage circuit 40 is determined by the microprocessor 12 based on an OSD movement instruction from operation means (not shown) such as a remote control transmitter. Control circuit 21 for correction amount data
To supply the data to the temporary storage circuit 40 via the data bus 117, thereby setting the correction amount. With this correction amount setting, the display start position of the character data to be displayed on the screen can be changed in the horizontal direction in units of characters and pixels (dots).

For example, it is assumed that a character font is represented by 16 × 16 points. Temporary storage circuit for correction amount
In 40, a display start position can be set for each pixel (dot) constituting a character.

In the display control device, when characters are read, the character memory 23 in which character fonts are stored has a large capacity and the reading speed is low. Therefore, one line of data constituting a character is read from the character memory 23 in parallel, and the data is rearranged into serial data by the output control circuit 24 and output to the display device 27. Here, description will be made on the assumption that 16 dots are read at a time. One horizontal line constituting one character is read out collectively from the character memory, or read out in units of the same number of dots. That is, one horizontal line for one character is 1
When it is 6 dots, read 16 dots at once,
Either the data is read out twice in units of 8 dots. Therefore, data cannot be read from the character memory 23 in dot units.

Therefore, for example, in the present embodiment, when the character is a horizontal 16-dot character, the control circuit 21 sends a correction amount temporary storage circuit 40 based on an instruction from the microprocessor 21.
Is 34, two characters and two dots are obtained by dividing 34 by 16. Since the number of horizontal dots constituting the character is a power of 2, the temporary storage circuit 40
Can be divided into the number of characters and the number of dots in bit units. In this case, the number of horizontal dots constituting one character is one.
6. Therefore, if 4 bits are required, and if up to 24 characters can be displayed in one line, 5 bits are required, and the temporary storage circuit 40 is composed of 9 bits. If the number of dots is the lower 4 bits and the number of characters is 5 bits, when the value of 34 is set by the microprocessor 21, it becomes 100010 (2) in binary notation, and the set value is used as it is as the correction amount. be able to.

Of the data from the temporary storage circuit 40,
The number of upper characters 200 is added to the adder 41, and the number of dots 201 is given to the variable delay unit 42 and the control circuit 21.

Here, the respective set values 200 and 201 will be described with reference to the display examples of FIGS. 2 (a) and 2 (b). The setting based on the respective data 200 and 201 is expressed in the display example of FIG.

When the OSD display shown in FIG. 2A is moved to the left of the screen 270 as shown in FIG. 2B, the number of characters 200 added to the adder 41 causes the points A,
... Which of B, C,. FIG.
In the case of (b), B is output to the horizontal position decoder 35.

However, since only the movement is performed in units of characters in this case, the operation of the variable delay unit 42 performs correction in units of dots. The variable delay unit 23 is delayed by the number of dots (for example, 16 dots) read from the character memory 23 at a time when the set value is 0. In the case of this embodiment, when the set value is 0, the delay amount is 16 dots.
The delay amount of the variable delay unit 42 decreases as the set value of the number of dots 201 increases (a delay amount of 15 for the setting value 1 and 14 dots for the setting value 2).

In the case of FIG. 2A, which is a display example before changing the horizontal display start position, the correction amount of the temporary storage circuit 40, that is, the set value is 0, and the set value of the variable delay unit 42 is 0. 2 shows the OSD display. That is, FIG. 2A shows a case where the display is performed by reading from the point A of the display memory 22 at a position which is delayed by one character, that is, 16 dots from the display reference position 272 corresponding to the horizontal synchronization signal HD. Is shown.

In the case of FIG. 2B, which is a display example when the display start position is changed in the horizontal direction, the correction amount of the temporary storage circuit 40, that is, the set value is 18 (one character and two dots) and the variable delay The OSD display when the setting value of the device 42 is 2 is shown. That is, FIG. 2B shows a case where the display is performed by reading from the point B of the display memory 22 at a position delayed by 14 dots from the display reference position 272 corresponding to the horizontal synchronization signal HD.

By the way, at the above-mentioned stage, it is intended to display all the characters without losing the display. That is, in FIG. 2B, the display memory 22 is moved relative to the display screen 270 in units of characters and pixels and read out from the point B on the display memory 22 for display. In the case of, part of the left side of the scan display is the display screen
270 is overscanned. That is, if displayed as it is, the entire display memory 22 has moved to the left of the screen 270, and the display range is limited. Therefore, the number of dots 201 from the temporary storage circuit 40 is also given to the control circuit 21 in order to generate a display control signal 273 for limiting the display range to the range indicated by the reference numeral 271. Control circuit
The circuit 21 includes a circuit for starting display at a position delayed by two dots from the point B shown in FIG. 2B and ending the display after a predetermined display period (display range) has elapsed from the start position. Thus, the display control signal 273 indicating the display range for the horizontal synchronizing signal HD is output to the output control circuit 24. The output control circuit 24 masks the data read from the character memory 23 using the display control signal 273 and outputs the data.

By doing so, the position of the left end of the video content displayed on the screen 270 is fixed as shown in FIG. By giving an instruction to change the display start position (correction amount) to the temporary storage circuit 40, the display content can be moved leftward and the display can disappear from the display range 271 in dot units. At this time, since the data in the display memory 22 is not erased, if the display start position is returned to the original setting, the data shown in FIG.
The same display as (a) can be displayed without rewriting the data in the display memory 22. Conventionally, according to the embodiment of the present invention, data in the display memory needs to be rewritten every time display on the screen is moved.
The display contents on the screen can be easily moved and displayed in a short time.

In the above description, the horizontal direction of one character is 16 dots, that is, the power of 2. However, the character font used in the display control device is not always a power of two. For example, it may be 10 dots. In this case, the bit configuration of the temporary storage circuit 40 for the correction amount is allocated in the same manner as for 16 dots, and a program may be added on the microprocessor 12 side so as to increase the number of characters for every 10 dots. This method does not lead to a large increase in the program. Alternatively, there is no problem if this correspondence is realized by incorporating it into hardware.

The case where the display is moved on the display screen 270 will be described with reference to FIGS.

As shown in FIGS. 3 (a), 3 (b) and 3 (c), in the process of sequentially moving the display contents to the left and extinguishing them, reference numeral 27 is used.
As shown in Fig. 4, missing characters can be displayed.
Conversely, in the process of moving the display contents rightward in the order of (c), (b), and (a) so that they appear, the missing characters can be displayed.

FIGS. 4 (a), (b) and (c) show FIGS. 3 (a) and 3 (b).
7A and 7B are views for explaining the state of the display memory 22 for the display of (c). Reference position of display corresponding to horizontal sync signal HD
272 is set to the first character position of the display memory 22, and the display reference position 272 is set to the display start position when the display is moved to the left (that is, the display start position of the display control signal 273). An example of the case is shown. However, in FIGS. 4 (a), (b) and (c), unlike the case of FIG. 2, the display control signal 273 as a mask signal is represented by (a), (b) and (c).
Is created to fit the display range as the display moves. In the embodiment of the present invention, FIGS. 4 (a), (b),
As shown in (c), the readout position of the display memory 22 can be moved in character units and pixel units with respect to the reference position 272 while the data in the display memory 22 remains as it is, and displayed by the display control signal 273. Since the range can be limited, it is not necessary to perform a rewriting operation of the display memory 22, and it is possible to display a missing character.

FIG. 5 is a flowchart for explaining the operation of FIG. As shown in FIG. 5, when the program of the microcomputer block 10 operates in the interrupt processing, a value obtained by adding a predetermined value in the left direction (or the right direction) to the current position is set as a set value (step S11). The set value is set in the temporary storage circuit 40 (step S12). The processing program becomes simpler than the conventional flow described with reference to FIG.

FIG. 6 is a block diagram showing a display control device according to the second embodiment of the present invention. The second embodiment shown in FIG. 6 differs from FIG. 14 (conventional example) or FIG. 1 (first embodiment) only in the configuration of a portion corresponding to the timing block 30.

In FIG. 6, the conventional timing block 30 of FIG. 14 includes a correction amount temporary storage circuit 50 and a variable delay unit.
51 and switch 52, and a vertical position decoder 37
a is decoded by the signal 300 when the display moves the display start position to the left of the reference position 272 (that is, when the signal 300 indicating the right or left of the reference position 272 indicates the left). The configuration is such that a function of subtracting one from the output is added.

With respect to the correction amount of the temporary storage circuit 40, the correction amount data is supplied from the microprocessor 12 via the data bus 117 by the control circuit 21 based on an OSD movement instruction from operation means (not shown) such as a remote control transmitter. Then, the correction amount is set by supplying the correction amount to the temporary storage circuit 50. With this correction amount setting, the display start position of the character data to be displayed on the screen can be changed in the horizontal direction in pixel (dot) units. In other words, the correction amount temporary storage circuit 50
The display start position in pixel (dot) units can be set by temporarily storing the correction amount (set value) from the microprocessor 12, and the reading position of the point A is shifted to the right with respect to the reference position 272. In addition to outputting a signal 300 indicating whether it is the left side or the left side, the delay amount is set in the variable delay unit 51 in dot units.

The switch 52 is connected to the first horizontal synchronizing signal from the variable delay unit 38 and the second horizontal synchronizing signal from the variable delay unit 51 capable of further delaying and outputting this horizontal synchronizing signal. Of the two inputs, one of the horizontal synchronizing signal inputs is switched by the signal 300 and output, and is supplied to the reset terminal of the horizontal position counter 34. switch
52 is an operation as described above when the signal 300 is a signal indicating the right side, and when the signal 300 is a signal indicating the right side, the switch 52 is a signal for controlling the horizontal synchronization signal from the variable delay unit 38. And supplies it to the horizontal position counter 34, the circuit operation becomes the same as that of the conventional example (FIG. 14) for reading the display memory at a position after the reference position 272. Thus, when the signal 300 indicates the right side, the vertical position decoder 37
In a, the conventional screen display is performed without performing the operation of subtracting 1 from the decoded output.

The signal 300 from the temporary storage circuit 50 is supplied to the control circuit 21 and to the switch 52 and the vertical position decoder 37a.

When the display start position is moved to the left of the reference position 272 by the signal 300 also input to the control circuit 21, the control circuit 21 displays the image as a mask signal so that there is no unnecessary display on the screen. The control signal 273 is generated and supplied to the output control circuit 24 to control the display range.

In the first embodiment, the read position of the display memory 22 is changed, and the read position is always after the horizontal reference position 272 (right side) before and after the change.
However, in the second embodiment, the read position is not changed in units of characters, that is, the read position is always read from the point A (see FIG. 2A) of the display memory 22. Point A is read out before (left side) from the horizontal reference position 272, that is, read out with a delay from the previous row, and a display control signal 273 as a mask signal is set corresponding to the screen display. It is configured to control the range. With this configuration, the display start position in the horizontal direction can be changed in pixel (dot) units, as in the first embodiment.

With the above configuration, the microprocessor 12 in the microcomputer block 10, the temporary storage circuit 50 for the correction amount in the timing block 30, the variable delay unit 51, and the vertical position decoder 37a are connected to the display start position in the horizontal direction. Is configured as changing means. The microprocessor 12 constitutes means for designating the horizontal display start position to the left of the reference position, and the temporary storage circuit 50, the variable delay unit 51, and the vertical position decoder 37a perform one-time operation based on the designation of the microprocessor 12.
A means for setting the display data before the line is configured. The control circuit 21 includes means for restricting the display range on the screen 270 by the display control signal 273 so as to prohibit the display of the previous line. Control circuit 21 and output control circuit
24 constitutes display control means for on-screen display.

Next, the operation of FIG. 6 will be described with reference to the timing chart of FIG. In the apparatus shown in FIG. 6, a horizontal display start position is checked one line before the start of display as shown in FIG. If the result of the survey shows the following line,
If all are displayed on the screen, the display operation starts at the timing of the next line.

As a result of the investigation, if the display start position is the previous line and is ahead (left side) of the reference position 272, the display operation is started from the current line. The variable delay 51 measures this timing. Reference numeral 302 shown in FIG. 7 is the maximum delay amount of the variable delay device 51. When the set value supplied by the temporary storage circuit 50 is 0, the display character string 304 is delayed by one line. And the temporary storage circuit
When the delay amount is set from 50, the delay amount of the display character string 304 is shorter than the maximum delay amount 302 by the timing 303 in FIG.

Further, since the display is unnecessary during the period of the timing 303 in FIG. 7, the display control signal 273 is generated as shown in the figure so that the display is performed only when the line requiring the display is reached.

By the way, in general, in a display control device, characters are enlarged and displayed with a reference of a display memory, that is, a leftmost digit and a topmost line as a reference position when displayed on a screen. In the case of the enlarged display, since the display clock is controlled, there may be a circuit configuration in which it is difficult to change the reading position of the display memory 22 as in the first embodiment.
The second embodiment is a method suitable for a circuit having such a configuration.

In the case of a configuration in which the enlarged display of characters is performed, the display memory is divided for each line as shown in FIG. If the display start position is configured to be individually set, the display of the previous line and the display of the next line may partially overlap in one line. In such a case, a method of prohibiting the display of the subsequent line or not displaying only the first line is common in the OSD circuit, but in any case, the display is not in a normal state during the operation. Not preferred. As a countermeasure, if the horizontal position counter 34 shown in FIG. 6 is divided into two sets, and only one of the counters is designed for timing, the circuit can be solved without a large increase in circuit.

FIG. 8 is a block diagram showing a display control device according to the third embodiment of the present invention. The second embodiment shown in FIG. 8 differs from FIG. 1 (the first embodiment) only in the configuration of a portion corresponding to the timing block 30. Here, only the timing block 30 will be described, and description of the other blocks will be omitted.

Although the third embodiment of FIG. 8 was mentioned in the latter half of the second embodiment, as shown in FIG. 15 (b), the display memory is divided into rows, The horizontal display start position can be set for each line.

In the third embodiment, the correction amount temporary storage circuit 40 in the first embodiment is set to correspond to a row.
The configuration having the display row selection circuit 60 is shown.

The display row selecting circuit 60 outputs the horizontal synchronizing signal (H
D) The row counter 61 is counted in the horizontal synchronization period at the timing of 113, and the display start line previously set for each row by the microprocessor 12 is read from the start line memory 62. At this time, the output is compared with the output of the vertical position counter 36, and if the two values match in the comparator 63, the latch 64 holds the output of the row counter 61 at that time (that is, the output indicating the row). It has become. Then, an output indicating the number of the row from the latch 64 is input to the horizontal position correction amount memory 65, so that the horizontal position correction amount memory
From 65, the correction values (200 characters and 201 dots) relating to the horizontal position of each line are read. The horizontal position correction amount memory 65 stores the horizontal position correction amount (set value) for each row in advance by the microprocessor 12 in the same manner as the start line memory 62.
Is stored.

The correction value 200 corresponding to the number of characters out of the output of the horizontal position correction amount memory 65 storing the horizontal position correction amount is input to the adder 41, and the output of the horizontal position correction amount memory 65 is output. The correction value 201 corresponding to the number of dots is input to the variable delay unit 42 and the control circuit 21. The variable delay unit 42 allows the display position to be changed in pixel (dot) units by the number of dots 201, and the control circuit 21 controls the control signal 273 to limit the display range to a predetermined range on the screen by the number of dots 201. Create

The subsequent operation is the same as that of the first embodiment. The read position of the display memory 22 in units of characters is set by the number of characters 200, and the read position of the display memory 22 in units of pixels is set by the number of dots 201. By performing the setting, the display start position in the horizontal direction can be changed and set for each line in units of characters and pixels.

In the third embodiment, the display memory 22
Is divided into rows, and the microprocessor 12 in the microcomputer block 10, the display row selection circuit 60 in the timing block 30, the adder 41, and the variable delay The microprocessor 12 constitutes a change means for changing the display start position, and the microprocessor 12
A means for designating a horizontal display start position for every 22 rows is provided, and a display row selection circuit 60, an adder 41, and a variable delay
A means for changing the reading position of the display memory 22 for each row based on the designation of the microprocessor 12 is configured.
The control circuit 21 and the output control circuit 24 constitute display control means for on-screen display.

FIG. 9 is a block diagram showing a main part of a display control device according to the fourth embodiment of the present invention. This is an embodiment in which the display row selection circuit 60 in the third embodiment of FIG. 8 is improved, and only a portion corresponding to the display row selection circuit 60 is shown, and other blocks are the same as those in the third embodiment. Since it is the same, it is omitted.

The fourth embodiment is intended to improve that the third embodiment cannot be moved unless a display start position is set for each line.
As shown in the display example of FIG. 3A, a plurality of designated lines can be moved simultaneously.

FIG. 9 shows a display row selection circuit 60 of FIG. 8 to which a means for moving a plurality of rows at once is added. Additional means for moving a plurality of rows at once include a correction amount storage means 70, an adder 71, and a changeover switch 72.

In FIG. 9, a horizontal position correction amount memory 65 is provided.
In a, a horizontal position correction amount of a row to be moved is set, and a flag of a row to be moved simultaneously is set in advance.
The changeover switch 72 is operated for each row by the signal 500 indicating the presence or absence of the flag for each row, and whether or not the horizontal position correction amount data held in advance in the correction amount storage means 70 is added for each row is selected. I do. In the correction amount storage means 70,
The same correction amount as that set in the horizontal position correction amount memory 65a for the row to be moved is set by the microprocessor 12.

The output of the horizontal position correction amount from the memory 65a is 200 characters and 20 dots as in the case of FIG.
2 is equivalent to 1 data, and similarly, the correction amount storage means
The output from 70 is also two data corresponding to the number of characters 200 and the number of dots 201, but for simplicity, the two data are represented by one line, and only the output of the changeover switch 72 is two data. It is represented by two lines.

In the fourth embodiment, the display memory 22
The configuration shown in FIG. 8 is divided into rows, and the microprocessor 12 (see FIG. 8) in the microcomputer block 10 and the display row selection circuit in the timing block 30
The adder 60 (see FIG. 8), the variable delay unit 42 (see FIG. 8), and the variable delay unit 42 (see FIG. 8) constitute changing means for changing the display start position in the horizontal direction.
Means for simultaneously specifying the horizontal display start position of a plurality of rows in a plurality of rows, a display row selection circuit 60, an adder 41, and a variable delay
Display memory based on the specification of the microprocessor 12
This constitutes a means for simultaneously changing the readout positions of a plurality of rows in a plurality of rows. The control circuit 21 and the output control circuit 24 constitute display control means for on-screen display.

In the above arrangement, a plurality of lines to be moved together are selected in advance by operating means (not shown) such as a remote control transmitter or the like, so that a plurality of lines to be moved simultaneously through the microprocessor 12 and the control circuit 21 are selected. , A flag can be set for each of them, and a plurality of rows to be moved in the same manner by only one correction amount data can be simultaneously moved by a required amount. In the display example as shown in FIG. 13A, the display 91 is displayed on the screen 270, and the display 91 can be moved in the moving direction 901 without moving the display 91 as the operation guide display. . In the case of the third embodiment, in order to move the display 90, the setting of the display start position for five rows must be changed.

As described above, according to the fourth embodiment, the flags are set in advance on the lines to be moved in the same manner, and those having the flags are moved by the same amount by changing only one data. Can be done. However, in such a case where the display memory is often handled in units of several lines in advance, if the display memory has a configuration in which two to four rows are integrated instead of one row, the third embodiment is sufficient. Function.

In FIG. 13A, when the display area 95 indicated by the dotted line indicates a different page, it is necessary to superimpose each character. In this case, it can be realized by having the output control circuit 24 twice.

FIG. 10 is a block diagram showing a main part of a display control device according to a fifth embodiment of the present invention. until now,
Although only the processing in the horizontal direction has been described, the processing in the vertical direction will be described in the fifth embodiment. Here, FIG.
4 shows only a portion corresponding to the timing block 30 in the conventional example of FIG. 4 or the first embodiment of FIG. Other blocks are the same as those in FIG. 14 or FIG.

FIG. 10 is different from the timing block 30 in FIG. 14 in that a storage means 80 for storing a correction amount for correcting a display position in the vertical direction and an adder 81 are provided, and furthermore, a character (line) is provided. (A line on a screen can indicate which line of a character should be displayed according to the correction amount).

The microprocessor 12 controls the control circuit 21 in response to a vertical movement instruction from operation means such as a remote control transmitter.
, The amount of correction in the vertical direction is stored in the storage means 80, and the storage means outputs a correction value 80 corresponding to the number of characters as its output.
0 is input to one input terminal of the adder 81, and a correction value 801 corresponding to the number of lines is input to the vertical position decoder 82.
A vertical position counter 36 is provided at the other input end of the adder 81.
Is inputting data indicating a vertical display line from. The adder 81 adds the data from the vertical position counter 36 and the data of 800 characters for vertical position correction from the storage means 80, and supplies the result to the vertical position decoder 82. The vertical position decoder 82 uses the data from the adder 81 and the data from the storage means 80 to generate a vertical read address of the display memory 22 in character units and line units, and
Supply 21. The control circuit 21 supplies the read address together with the horizontal read address from the horizontal position decoder 35 to the display memory 22.

In the above configuration, the microprocessor 12 (see FIG. 14 or FIG. 1) in the microcomputer block 10, the storage means 80 in the timing block 30, the adder 81, and the vertical position decoder 82 The microprocessor 12 includes means for designating the display start position above the reference position 275, and includes a storage means 80, an adder 81, and a vertical position. The decoder 82 constitutes means for changing the display start position of the character to be displayed in units of lines based on the designation of the microprocessor 12. The control circuit 21 and the output control circuit 24 constitute display control means for on-screen display.

Next, the circuit operation of the above configuration will be described with reference to FIG.

In FIG. 11, (a) is a diagram showing the display timing, and (b) is a display example. In the case of the vertical direction, the display start position N in the vertical direction can be designated in units of characters (lines) and lines as shown in FIG. That is, the vertical line start positions a, b, c,.
Is calculated from the number of characters 800 in the output of the storage means 80. Next, the display position 801 for each line input to the vertical position decoder 82 specifies which line of the character to be displayed (this is set at the character position 800) should be displayed. .

According to the fifth embodiment, FIG.
As shown in the example of the vertical scroll in FIG.
However, by pressing a button such as “function setting” of the remote control transmitter, a display can be performed such that it gradually descends from the upper part of the screen. As a result, the function selection branch 92 can be hidden or pulled out at the top of the screen in the direction of movement 902.

FIG. 12 is a block diagram showing a main part of a display control device according to the sixth embodiment of the present invention. Here, only a portion corresponding to the timing block 30 in the conventional example of FIG. 14 or the first embodiment of FIG. 1 is described.
Other blocks are the same as those in FIG. 14 and FIG.

In the sixth embodiment, a configuration is shown in which the horizontal processing and the vertical processing which have been individually described so far are combined. In this configuration, the microprocessor 12 (see FIG. 14 or FIG. 1) in the microcomputer block 10, the correction amount temporary storage circuit 40 in the timing block 30, the adder 41, and the variable delay 42 The microprocessor 12 (see FIG. 14 or FIG. 1) in the microcomputer block 10 and the storage unit 80 in the timing block 30 constitute a changing means for changing the display start position.
, The adder 81 and the vertical position decoder 82 constitute changing means for changing the display start position in the vertical direction. The control circuit 21 and the output control circuit 24 constitute display control means for on-screen display.

FIG. 12 shows a configuration in which the first embodiment and the fifth embodiment are combined. Regarding the horizontal processing, any of the configurations of the second, third and fourth embodiments is used. There may be.

According to the above configuration, as shown in the display example of the block movement in FIG.
It is possible to move to.

As for the operation shown in FIG. 13C, there is a description about a system using a graphic memory in Japanese Patent Application Laid-Open No. Sho 60-216385 entitled "Display Controller". However, the device described in this publication has a large circuit size not only for the memory but also for peripheral circuits.

According to the embodiment of the present invention described above,
When screen adjustment is performed by performing on-screen display for screen adjustment, if the screen display position can be changed, the adjustment amount (parameter) can be changed at a position where the state of the screen can be easily understood. By moving the display when you want to watch the video you are worried about during the adjustment, you can also memorize what you were adjusting.

Further, according to the configuration of the embodiment of the present invention, there is an advantage that the circuit scale is small and the number of parameters to be set is small.

[0114]

As described above, according to the present invention, the position of the character string displayed on the screen can be changed only by the data specifying the display start position from the microprocessor.
Each time the display position is changed, the operation of the microprocessor writing the character string data to the display memory can be reduced. As a result, the load on the display operation of the microprocessor is reduced, and the program required for the display memory rewriting operation is eliminated, so that the program capacity related to the display can be reduced. In addition, it is possible to perform a display in which a part of display characters is missing without using an expensive device having a large circuit scale such as a graphic memory.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a display control device according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a display operation according to the first embodiment.

FIG. 3 is a view showing an example of a screen display according to the first embodiment;

FIG. 4 is a view showing a state of a display memory corresponding to the display example of FIG. 3;

FIG. 5 is a flowchart illustrating the operation of FIG. 4;

FIG. 6 is a block diagram showing a display control device according to a second embodiment of the present invention.

FIG. 7 is a diagram illustrating a display operation according to the second embodiment.

FIG. 8 is a block diagram showing a display control device according to a third embodiment of the present invention.

FIG. 9 is a block diagram showing a main part of a display control device according to a fourth embodiment of the present invention.

FIG. 10 is a block diagram showing a main part of a display control device according to a fifth embodiment of the present invention.

FIG. 11 is a diagram illustrating a display operation according to a fifth embodiment.

FIG. 12 is a block diagram illustrating a main part of a display control device according to a fifth embodiment of the present invention.

FIG. 13 is a diagram showing a screen display example according to various embodiments of the present invention.

FIG. 14 is a block diagram showing a conventional display control device.

FIG. 15 is a diagram showing a configuration of a general display memory.

FIG. 16 is a diagram showing a state of a display memory for a conventional screen display (horizontal movement).

FIG. 17 is a flowchart illustrating the operation of FIG. 16;

[Explanation of symbols]

10 ... microcomputer block, 12 ... microprocessor, 13 ...
Program memory, 14… Work memory, 20… Main circuit,
21: control circuit for OSD control, 22: display memory, 23: character memory, 24: output control circuit, 26: switch for OSD, 27: display device, 30: timing block,
31: display clock input terminal, 32: horizontal synchronization signal input terminal, 34: horizontal position counter, 35: horizontal position decoder, 36
... Vertical position counter, 37, 37a, 82 Vertical position decoder, 40 Temporary storage circuit of correction amount, 41, 81 Adder, 42
Variable delay device, 50: Temporary storage circuit of correction amount, 51: Variable delay device, 52: Switch, 60: Display row selection circuit, 61: Row counter, 62: Start line memory, 63: Comparator, 64: Latch,
65: horizontal position correction amount memory; 80: storage means.

Claims (5)

[Claims] 1. A character memory for storing characters such as characters and symbols represented by m × n (m and n are natural numbers) dots displayed on a screen, and a position on the screen where the character is displayed. And a data specifying a position on a screen from the display memory based on a horizontal and vertical synchronization signal of a video signal,
Display control means for reading the character corresponding to the data from the character memory and displaying it on a screen; and a display start position and display of the display control means by a unit constituting the character displayed based on the data. A display control device comprising: a change unit for changing a range. 2. The display control device according to claim 1, wherein said changing means sets a read position of said display memory and limits a display range. 3. The display memory according to claim 1, wherein said display memory is divided into rows, and said change means changes at least one of a display start position and a display range of said display control means for each row. The display control device according to claim 1. 4. The display control device according to claim 1, wherein the display control unit changes the display start position of a plurality of lines at a time, moves the display start position collectively for each line, and changes the display start position of the designated line. The display control device according to claim 3, wherein: 5. The display control device according to claim 1, wherein said change means sets a line position at which display is started by said display control means in a non-display period of said video signal at an upper portion of a screen.