JPH11204921A - Board for electroplating process and method of dividing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable uniform plating of a metal and improve the yield by setting the distance between a plurality of circuit boards with wiring patterns and first tie bar and spacing between the circuit boards to narrow ranges cuttable by a cutter and setting the width of a second tie bar to a size cuttable by a cutter. SOLUTION: A cooling Cu plate 12c is formed together with the bottom of an approximately rectangular resin insulation board 1 through a Cu plate 12a and resin insulation board 12b. On the bottom face of the plate 12c a protective film 12d is formed to block the bottom face of the Cu plate 12c from being exposed to the plating in an electroplating process. Between circuit boards 15, approximately lattice-like tie bars 16c are made of Cu etc., and set to a thickness cuttable by a cutter 18. They are covered with protective films 17, together with lead wires 16d, wiring 4b, to constitute a board 10 for electroplating processes, including the protective films 17 etc.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate for an electrolytic plating process and a method for dividing the same, and more particularly, to a substrate for BG, for example.
For the electrolytic plating process used when applying electrolytic plating of Ni (nickel), Au (gold), etc. at once on pads and terminals on a plurality of circuit boards constituting an A (Ball Grid Array) type package The present invention relates to a substrate and a method for dividing the substrate.

[0002]

2. Description of the Related Art FIGS. 3A and 3B are schematic views showing a conventional substrate for such an electrolytic plating process, wherein FIG. 3A is a plan view, and FIG. 3B is an enlarged sectional view taken along line AA in FIG. Insulating substrate 2
Reference numeral 1 denotes an insulating substrate 2 which is formed in a substantially rectangular shape using a resin.
A plurality of substantially circular pads 23a and a substantially square electrode 23b are formed at predetermined locations on one main surface 21a of the first main surface 21a using a conductive material such as Cu (copper), and an insulating substrate is formed. A plurality of through-holes 23c are formed at predetermined portions 21 so as to penetrate them. Pad 23
a, an electrode 23b, and a through hole 23c are connected to a wiring 23d, respectively.
The wiring pattern 23 includes the wiring pattern 3b, the through hole 23c, and the wiring 23d. On the other hand, a plurality of terminals 24a, 24b
Is formed using a Cu material or the like. Terminals 24a, 24
The wiring 24c is connected to each of the b and the through hole 23c, and the wiring pattern 24 is configured to include these terminals 24a and 24b, the through hole 23c, and the wiring 24c. Each circuit board part 22 is configured to include these wiring patterns 23 and 24 and the part of the insulating substrate 21 on which these wiring patterns 23 and 24 are formed. On the other hand,
Insulating substrate surface 21a, on the outer periphery of the plurality of circuit board 22 in 21b, the width d ₁ in which the shape of substantially square is about 2 to 3
A tie bar 25 of mm is formed using a Cu material or the like, and a conducting portion 25a is formed at a corner of the tie bar 25. A tie bar 26 having a substantially lattice shape and a width d ₂ of about 1 to ₂ mm is formed using a Cu material or the like between the circuit board portions 22. The tie bars 25 and 26 are electrically connected to each other. ing. One ends of a plurality of narrow lead wires 27 are connected to the tie bars 25 and 26, while the other ends of the lead wires 27 are connected to predetermined wirings 23 d and 24.
c, and the length L of the lead wire 27 (the distance between the tie bars 25, 26 and the circuit board portion 22) L is set to about 3.5 to 15 mm. Tie bar 25,
26, lead line 27, wiring 23d, 24c, pad 2
The portion of the electrode 23b except for the portion 3e is covered with the protective film 28, respectively. The substrate 20 for the electrolytic plating process is configured to include the circuit board portion 22, the tie bars 25 and 26, the lead wire 27, the protective film 28, and the like.

When manufacturing the substrate 20 for the electroplating process having the above-described structure, for example, a Cu foil is adhered to both main surfaces 21a and 21b of the insulating substrate 21, and the Cu foil is subjected to an etching process to form the pads 23a, the electrodes 23b, and the like. Wirings 23d, 24c, terminals 24a, 24b, tie bars 25, 26, lead wire 2
7 is formed. Next, a through-hole is formed at a predetermined position of the insulating substrate 21, and a through-hole 23c is formed by printing and applying, for example, a Cu paste (both not shown) to the through-hole. Thereafter, when the protective film 28 is printed and applied on the upper surfaces of the electrodes 23b except for the tie bars 25 and 26, the lead wires 27, the wirings 23d and 24c, and the pads 23e, the substrate 20 for the electrolytic plating process is manufactured.

Next, a Ni or Au electrode (both not shown) and the substrate 20 for electrolytic plating are immersed in an electrolytic plating solution, and a negative DC voltage is applied to a current-carrying portion 25a of the substrate 20. When a positive DC voltage is applied to the Au electrode,
A circuit is formed in which a current flows in the order of Ni, Au electrodes, electrolytic plating solution, pads 23a and 23e terminals 24a and 24b, tie bars 25 and 26, and conducting section 25a. Since the tie bars 25 and 26 having relatively small electric resistance are arranged around the circuit board portion 22, the current density is easily maintained even to the end portions of the wiring patterns 23 and 24, and as a result, the surface is exposed. Pads 23a, 23e, terminals 24a, 24
b is reliably plated with Ni or Au. Thereafter, when the lead wire 27 and the insulating substrate 21 are completely cut at the cutting portion 29 using a cutter or the like and the circuit board portion 22 is divided individually, wiring patterns 23 and 24 are formed, and pads 23a and 23e and terminals A circuit board having the surfaces of 24a and 24b plated is manufactured.

However, in the substrate 20 for the electroplating process having the above-described structure, the tie bars 25 and 26 and the circuit board portion are inevitably provided in order to secure the space for forming the tie bar 26 and the lead wire 27 to be removed and the width of the cut portion 29. 22
Is increased, and the number of circuit board portions 22 that can be arranged in one insulating substrate 21 is reduced. Further, since the number of cut portions 29 between the tie bar 26 and the circuit board portion 22 is large, there is a problem that the cost is easily increased. In order to cope with this problem, an attempt is made to use a substrate for an electrolytic plating process in which each circuit board portion is arranged close to each other and the tie bar 26 is omitted, and each wiring and each lead wire are wired and connected in a snake shape. I have.

FIG. 4 is a plan view schematically showing a conventional substrate for an electrolytic plating process on which such a snake wiring is formed. In the figure, reference numeral 31 denotes an insulating substrate. The insulating substrate 31 is formed in a substantially rectangular shape using a resin, and a plurality of pads (not shown) and electrodes are provided at predetermined locations on one main surface 31a of the insulating substrate 31 as shown in FIG. 33b is Cu
It is formed using a material or the like. A wiring 33d is connected to the electrode 33b and the pad in a substantially L-shape, and a wiring pattern 33 is configured to include the electrode 33b, the wiring 33d and the pad. These wiring patterns 33 and the insulating substrate 3 on which the wiring patterns 33 are formed
Each circuit board section 32 is configured to include the first section. On the other hand similar to that shown in FIG. 3, on the outer periphery of the plurality of circuit board 32, the width d ₁ in which the shape of substantially square is about 2 to 3
mm tie bar 35 is formed using a Cu material or the like, and the distance L between the tie bar 35 and the circuit board portion 32 is about 3.5 to 15
mm, and a current-carrying portion 35 a is formed at a corner of the tie bar 35. The circuit boards 32 are arranged close to each other, and between the tie bar 35 and the wiring 33d of the circuit board 32, and between the predetermined wirings 33d of the circuit board 32, a plurality of lead wires 37 having a small width are formed. It is connected in a substantially snake shape via the same. Tie bar 35,
The portion of the electrode 33b excluding the lead line 37, the wiring 33d, and the pad (not shown) is covered with a protective film 38, respectively. These circuit board part 32, tie bar 35,
The substrate 30 for the electrolytic plating step is configured to include the lead lines 37, the protective film 38, and the like.

When manufacturing the substrate 30 for the electroplating process having the above-described structure, a Cu foil or the like is adhered to one main surface 31a of the insulating substrate 31, and the Cu foil is subjected to an etching treatment to form the pads, the electrodes 33b, and the wirings 33d. , Tie bars 35 and lead lines 37 are formed. Then tie bar 35, lead 3
7. When the protective film 38 is printed and applied on each upper surface of the electrode 33b excluding the wiring 33d and the pad portion, the substrate 30 for the electrolytic plating process is manufactured.

Next, a Ni or Au electrode (both not shown) and the substrate 30 for the electrolytic plating step are immersed in an electrolytic plating solution, and a negative DC voltage is applied to the current-carrying portion 35a of the substrate 30. A positive DC voltage is applied to the Ni and Au electrodes. Then, Ni, Au electrode, electrolytic plating solution, pad, wiring 3
A circuit through which a current flows is formed in the order of 3d, the lead wire 37, the tie bar 35, and the conducting portion 35a, so that the surface of the exposed pad can be plated. Thereafter, using a cutter or the like, the lead wire 37 is cut at the cutting portion 39.
When the insulating substrate 31 is completely cut and the circuit board portion 32 is individually divided, a circuit board having a wiring pattern 33 formed thereon and a surface of the pad plated with Ni or Au is manufactured.

[0009]

In the above-mentioned substrate 20 for the electrolytic plating step, as described above, the tie bar 2 is used.
The distance L between the circuit boards 5 and 26 and the circuit board 22 is inevitably widened, and the circuit board 22 disposed on one insulating substrate 21
Is small. In addition, since the cutting portion 29 is provided between the tie bar 26 and the circuit board portion 22, there is a problem that the number of times of cutting is large, the cutting length is long, and the cost is easily increased.

Further, in the above-described substrate 30 for the electroplating process, since the distance between the circuit board portions 32 is short, compared with the substrate 20 for the electroplating process shown in FIG.
The number of circuit board parts 32 arranged on one insulating board 31 can be increased. However, it is difficult to wire the wiring 33d and the lead-out line 37, and the design restrictions are increased. The lead wire 37 and the wiring 33d having a small width have relatively high electric resistance, and the lead wire 37 and the wiring 33d connected in series depending on the position of the circuit board portion 32.
Of the tie bar 35, that is, the electrical resistance value, greatly differs, so that the current densities at the respective pads differ. As a result, it is difficult to uniformly plate the surfaces of all the pads. Further, when the circuit board part 32 is divided, the lead wire 37 and the insulating substrate 31 are completely cut using a cutter or the like in the cutting part 39,
When the thickness of the circuit board part 32 is large, there is a problem that the cutting time is easily taken and the cost is high.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and it has been proposed that Ni, Au and the like be provided on the surfaces of all pads and terminals of each circuit board.
And the like can be plated uniformly, a large number of circuit boards can be arranged on one insulating substrate to improve the yield, and the cutting time can be shortened.
It is an object of the present invention to provide a substrate for an electrolytic plating process and a method for dividing the substrate, which can reduce the manufacturing cost.

[0012]

The present inventors have conducted research on the relationship between the current density and the width and length of the tie bar 26 and the lead wire 27 (both shown in FIG. 3).
Even if the width of the tie bar 26 is set to be small, if the length L of the lead wire 27 is set to be short to a predetermined length, each pad 23a, 2
3e (FIG. 3) can be made uniform in current density;
Further, the inventor has found that the application of the abolition of the cutting portion 29 shown in FIG. 3 and the connection of the wirings 33 shown in FIG. 4 can shorten the lead wire 27, thereby completing the present invention.

That is, a substrate for an electrolytic plating step according to the present invention comprises a plurality of circuit board portions on which wiring patterns are formed, and a square-shaped second board disposed on the outer periphery of the plurality of circuit board portions. 1 tie bar, a grid-shaped second tie bar provided between the circuit board portions, and a lead wire connecting the first and second tie bars and the wiring pattern are integrally formed. In the substrate for the electroplating step, the distance between the circuit board portion and the first tie bar and the interval between the circuit board portions are set to be narrow to a range that can be cut by a cutter, and the width of the second tie bar is reduced. The thickness is set so that it can be cut by a cutter (1).

According to the substrate (1) for the electrolytic plating step, the distance between the circuit board portion and the first tie bar and the interval between the circuit board portions are set to be narrow to a range that can be cut by a cutter. At the same time, since the width of the second tie bar is set to a thickness that can be cut by a cutter, the length of the lead wire is shortened, and the electrical resistance of the lead wire and the second tie bar is reduced as a whole. In addition, the variation between the circuit board portions can be reduced. As a result, when the electrolytic plating process is performed, the current density flowing in each of the wiring patterns of each of the circuit board portions becomes uniform, and the surface of the pads, the terminals, and the like can be plated uniformly with a metal such as Au. . Further, since the interval between the circuit board portions can be narrowed, the number of the circuit board portions that can be obtained from one electrolytic plating process substrate can be significantly increased, and the yield can be improved. Further, when the cutter is cut by hitting the second tie bar using the cutter, the second tie bar is cut off by one cutting / dividing operation, and at the same time, two rows or two of the circuits sandwiching the second tie bar are cut. The substrate part can be divided. As a result, the number of cuts is reduced, and costs can be reduced.

Further, in the substrate for an electrolytic plating step according to the present invention, in the substrate for an electrolytic plating step (1), a distance between the circuit board portion and the first tie bar is 0.3 to 3.0 m.
m, the interval between the circuit board portions is set in a range of 0.3 to 3.0 mm, and the width of the second tie bar is set in a range of 0.05 to 0.8 mm. (2).

According to the substrate (2) for the electrolytic plating step, the distance between the circuit board portion and the first tie bar is set in the range of 0.3 to 3.0 mm, and the distance between the circuit board portions is set to 0.3 to 3.0 mm. The interval is set in the range of 0.3 to 3.0 mm, and the width of the second tie bar is 0.05 to 0.8 m.
m, so that the thickness is 0.3 to 3.0.
The distance between the circuit board portions can be easily cut using a normal cutter in a range of mm.

Further, the method for dividing a substrate for an electrolytic plating step according to the present invention comprises the steps of:
The first tie bar and the circuit board portion are cut off by a cutter, and the second tie bar is removed by applying the cutter to the second tie bar portion, and the circuit board portion can be divided individually. It is characterized in that a cut groove is formed in advance.

According to the above-described method of dividing the substrate for the electrolytic plating step, each of the circuit board portions can be easily divided individually by bending at the position of the cut groove, and the thickness of the circuit board portion can be reduced. Even when the thickness is thick, the cutting time is shortened, and the cost can be reduced. Also, a large number of the circuit board portions can be handled collectively until immediately before the divided use.

[0019]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view showing an embodiment of a substrate for an electroplating process according to the present invention and a method of dividing the substrate. Note that components having the same functions as those of the conventional example are denoted by the same reference numerals. FIG. 1 is a schematic view showing a substrate for an electrolytic plating step according to Embodiment (1), where (a) is a plan view and (b) is an enlarged cross-sectional view taken along line BB in (a). The insulating substrate 11 is formed in a substantially rectangular shape using a resin.
Cu plate portion 12c for cooling via resin insulating plate portion 12b
Are integrally formed. A protective film 12d is formed on the lower surface of the Cu plate portion 12c, so that the lower surface of the Cu plate portion 12c is prevented from being plated by the protective film 12d during the electrolytic plating step. On the other hand, a plurality of substantially box-shaped cavities 13 are formed at predetermined positions of the substrate 10 for the electrolytic plating process.
An IC chip (not shown) is mounted in 3. Cavity 13 in insulating substrate main surface 11a
A frame portion 14a for supplying power, for example, is formed in a substantially square shape using a conductive material such as Cu around the frame portion 14a.
And the IC chip are connected via a wire (not shown). A plurality of terminals 14b are formed on the outer periphery of the frame portion 14a using a Cu material or the like. A frame portion 13a serving as a sealing dam and serving as a spacer is formed of resin on the outer periphery of the terminal 14b. Of the cavity 13 using a sealant (not shown).
When sealing the C chip or the like, the frame 13a prevents the sealing agent from protruding outside. A plurality of substantially circular pads 14c are formed using a Cu material at predetermined positions on the outer periphery of the frame 13a, and the frame 14a, the terminals 14b, and the pads 14c are provided with wirings 14d.
Are connected to each other. These frame parts 14
a, a terminal 14b, a pad 14c, a wiring 14d, and the like, the wiring pattern 14 is configured. Each circuit board section 15 includes these wiring patterns 14, the insulating substrate 11, the Cu plate section 12b, the insulating plate section 12c, the protective film 12d, and the like on which the wiring patterns 14 are formed.
On the other hand, the plurality of circuit board portions 1 on the insulating board surface 11a
The outer circumference of the 5, tie bars 16a of about 2~3mm width d ₃
Are formed in a substantially square shape using a Cu material or the like. The tie bar 16a and spacing L ₁ is cleavable by a cutter 18 with a thickness t ranging between the circuit board unit 15 (0.3-3.
0 mm), and a current-carrying portion 16b is formed at a corner of the tie bar 16a. Tie bar 16c also distance L ₂ of and how the circuit board 15 while being narrowly set cleavable range (0.3 to 3.0 mm) by a cutter 18, which overall between the circuit board unit 15 has a substantially grid shape Is formed using a Cu material or the like. The tie bar 16c width d ₄ of the is set to resectable thickness (0.05~0.8mm) by a cutter 18, these tie bars 16a, and what 16c are electrically connected. Tie bar 16a, while the width of the 16c one end portion of the plurality of lead lines 16d set in the d ₄ is connected, the other end of the lead wire 16d is connected to a predetermined wiring 14d of the circuit board portion 15 Have been. Tie bar 1
6a, 16c, the lead line 16d, and the wiring 14d are covered with the protective film 17, respectively.
The substrate 10 for the electroplating process is configured to include the tie bars 16a, 16c, the lead lines 16d, the protective film 17, and the like.

When manufacturing the substrate 10 for the electroplating process having the above configuration, a Cu plate or the like is attached to one main surface 11a of the insulating substrate 11, and the Cu plate is subjected to an etching process to form the wiring pattern 14, the tie bars 16a and 16c. , A lead line 16d is formed. Next, wiring 14d, tie bars 16a, 16c,
Resin is printed on each upper surface of the lead 16d and the wiring 14d.
After forming the protective film 17 by applying, a resin is further printed and applied on the outer periphery of the terminal 14b to form the frame portion 13a.
The substrate 10 for the electrolytic plating process is manufactured.

Next, a Ni or Au electrode (both not shown) and the substrate 10 for the electrolytic plating step are immersed in the electrolytic plating solution, and a negative DC voltage is applied to the current-carrying portion 16b of the substrate 10. A positive DC voltage is applied to the Ni and Au electrodes. Then, Ni, Au electrode, electrolytic plating solution, wiring pattern 1
4. A circuit through which a current flows is formed in the order of the lead wire 16d, the tie bars 16a and 16c, and the conducting portion 16b, and the frame portion 14a exposed in the wiring pattern 14, the terminal 14
b, Ni or Au is plated on the surface of the pad 14c. Thereafter, a cutter 18 having a V-shaped cross section (a blade angle α) and a thickness t (L ₁ ≧ L ₂ ≧ t ≧ d ₄ ) is used.
The Cu plate portion 12a, the insulating plate portion 12b, the Cu plate portion 12c, and the protective film 12d are completely separated. In addition, the cutter 18 is applied to the tie bar 16c to remove all the tie bars 16c.
When a cut groove 19 having a predetermined depth is formed in the insulating substrate 11, the Cu plate portion 12a, the insulating plate portion 12b, and the like, and then bent at the cut groove 19, the circuit board portion 15 is individually divided. Then, the wiring pattern 14 is formed, and the frame portion 14a and the terminal 1 are formed.
4b, a circuit board having the surfaces of the pads 14c plated with Au is manufactured.

As is clear from the above description, in the substrate 10 for the electrolytic plating step according to the embodiment (1), the distance L ₁ between the circuit board portion 15 and the first tie bar 16a and the distance between the circuit board portions 15 are set. L ₂ is set to a narrow range that can be cut by the cutter 18 and the second tie bar 16
Since the width d ₄ of c is set to be able to cut the thickness of a cutter 18, and the shorter length of the lead wire 16d, generally lower the electrical resistance of the second tie bars 16c and the lead wire 16d And the circuit board 1
5 can be reduced. As a result, when the electrolytic plating process is performed, the current density flowing through each wiring pattern 14 of each circuit board portion 15 becomes uniform, and the pads 14 c and the terminals 14 exposed and formed on the wiring pattern 14 are formed.
b. A metal such as Au can be uniformly plated on the surface of the frame portion 14a. Since may reduce the distance L ₂ of and how the circuit board unit 15, can significantly increase the number of circuit board 15 can take from one of the insulating substrate 21 shown in FIG. 3,
Also, the yield can be improved. Also cutter 1
8 and cut against the second tie bar 16c,
The second tie bar 16c can be cut off by one cutting / dividing operation, and at the same time, two rows or two circuit board portions 15 sandwiching the second tie bar 16c can be divided. As a result, the number of cuts is reduced, and costs can be reduced. Moreover, the range distance L ₁ between the circuit board portion 15 and the first tie bar 16a is set in a range of 0.3 to 3.0 mm, distance L ₂ of and how the circuit board portion 15 is 0.3 to 3.0 mm And the width d ₄ of the second tie bar 16c
Is set in the range of 0.05 to 0.8 mm,
Normal cutter 1 having a thickness t in the range of 0.3 to 3.0 mm
By using 8, it is possible to easily cut between the circuit board portions 15.

Further, in the method of dividing the substrate for the electrolytic plating step according to the embodiment (1), each of the circuit board portions 15 can be easily divided individually by bending at the position of the cut groove 19. Even when the thickness of the substrate unit 15 is large, the cutting time is shortened, and the cost can be reduced.

In the method of dividing a substrate according to the embodiment (1) shown in FIG. 1, a case where a cutter 18 having a V-shaped cutting edge is used as a cutter has been described. In the dividing method according to (2), a cutter 41 (FIG. 2A) having a substantially U-shaped cross section may be used. In the dividing method according to still another embodiment (3), the cutter 4 having a substantially U-shaped cross section of the cutting edge is provided.
2 may be used.

Further, in the substrate 10 for the electrolytic plating step according to the embodiment (1) shown in FIG. 1, the wiring pattern 14 is formed on one main surface 11a of the insulating substrate 11, and the wiring pattern 14 is formed under the insulating substrate 11. Although the case where the Cu plate portion 12c is integrally formed via the Cu plate portion 12a and the insulating plate portion 12b has been described, the wiring pattern is formed on both main surfaces of the insulating substrate in substantially the same manner as that shown in FIG. In addition, a plurality of layers of an insulating plate portion and a Cu plate portion may be laminated below the insulating substrate. Further, another conductive material may be used instead of the Cu plate portions 12a and 12c.

Further, in the substrate 10 for the electrolytic plating step according to the embodiment (1) shown in FIG.
Although the case where the frame portions 13a and 14a are formed has been described, the present invention is also applicable to a case where these are not formed.

In the substrate 10 for the electrolytic plating step according to the embodiment (1) shown in FIG.
Although the case in which one 4a is formed has been described, the present invention is also applicable to a case in which a substantially square-shaped ground connection frame portion is formed inside the frame portion 14a.

[Brief description of the drawings]

FIG. 1 is a schematic view showing an embodiment (1) of a substrate for an electrolytic plating step according to the present invention, wherein (a) is a plan view,
(B) is an enlarged sectional view along line BB in (a).

FIG. 2 is a side view schematically showing a cutter used in a method of dividing a substrate for an electrolytic plating step according to embodiments (2) and (3), where (a) shows a U-shaped blade edge cross-sectional shape. In this case, (b) shows a case where the cutting edge has a U-shape.

FIGS. 3A and 3B are schematic views showing a conventional substrate for an electrolytic plating process, wherein FIG. 3A is a plan view and FIG.
It is a line expanded sectional view.

FIG. 4 is a plan view schematically showing a conventional substrate for an electrolytic plating process on which snake wiring is formed.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Substrate for electrolytic plating process 14 Wiring pattern 15 Circuit board part 16a 1st tie bar 16c 2nd tie bar 16d Leader 18 Cutter

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Takeshi Kasai 2701-1, Iwakura, Higashi-ku, Omine-cho, Mine-shi, Yamaguchi Pref.

Claims (3)

[Claims] 1. A plurality of circuit board portions on which a wiring pattern is formed, a first rectangular tie bar disposed on the outer periphery of the plurality of circuit board portions, and between the circuit board portions. In a substrate for an electrolytic plating process, wherein a second lattice-shaped second tie bar and a lead line connecting the first and second tie bars to the wiring pattern are integrally formed, the circuit board portion The distance between the second tie bar and the first tie bar and the interval between the circuit board portions are set to be narrow to a range that can be cut by a cutter, and the width of the second tie bar is set to a thickness that can be cut by the cutter. A substrate for an electrolytic plating process. 2. A distance between the circuit board portion and the first tie bar is set in a range of 0.3 to 3.0 mm, and an interval between the circuit board portions is set in a range of 0.3 to 3.0 mm. And the width of the second tie bar is 0.05 to
2. The substrate for an electrolytic plating process according to claim 1, wherein the substrate is set to a range of 0.8 mm. 3. The method according to claim 1, wherein the first tie bar and the circuit board portion are separated from each other by a cutter while the cutter is applied to the second tie bar portion. A method of dividing a substrate for an electrolytic plating step, wherein all of the second tie bars are removed, and a cut groove is formed so as to divide the circuit board portion individually.