JPH11194996A5 - - Google Patents
Info
- Publication number
- JPH11194996A5 JPH11194996A5 JP1997361533A JP36153397A JPH11194996A5 JP H11194996 A5 JPH11194996 A5 JP H11194996A5 JP 1997361533 A JP1997361533 A JP 1997361533A JP 36153397 A JP36153397 A JP 36153397A JP H11194996 A5 JPH11194996 A5 JP H11194996A5
- Authority
- JP
- Japan
- Prior art keywords
- transfer
- data
- dma
- time
- size
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP36153397A JP4046825B2 (ja) | 1997-12-26 | 1997-12-26 | データ転送装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP36153397A JP4046825B2 (ja) | 1997-12-26 | 1997-12-26 | データ転送装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH11194996A JPH11194996A (ja) | 1999-07-21 |
| JPH11194996A5 true JPH11194996A5 (enExample) | 2004-11-18 |
| JP4046825B2 JP4046825B2 (ja) | 2008-02-13 |
Family
ID=18473969
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP36153397A Expired - Fee Related JP4046825B2 (ja) | 1997-12-26 | 1997-12-26 | データ転送装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4046825B2 (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100419410C (zh) | 1999-11-25 | 2008-09-17 | 奥林巴斯光学工业株式会社 | 缺陷检查数据处理系统 |
| CN100428277C (zh) | 1999-11-29 | 2008-10-22 | 奥林巴斯光学工业株式会社 | 缺陷检查系统 |
| WO2001091046A1 (en) | 2000-05-22 | 2001-11-29 | Matsushita Electric Industrial Co., Ltd. | Ic card |
| US6816921B2 (en) * | 2000-09-08 | 2004-11-09 | Texas Instruments Incorporated | Micro-controller direct memory access (DMA) operation with adjustable word size transfers and address alignment/incrementing |
| JP5040050B2 (ja) * | 2001-06-12 | 2012-10-03 | 富士通株式会社 | 複数チャネルdmaコントローラおよびプロセッサシステム |
| JP5057833B2 (ja) * | 2007-04-24 | 2012-10-24 | 株式会社日立製作所 | 転送システム、イニシエータデバイス及びデータ転送方法 |
| JP5099090B2 (ja) | 2009-08-19 | 2012-12-12 | 日本電気株式会社 | マルチコアシステム、マルチコアシステムの制御方法、及びマルチプロセッサ |
-
1997
- 1997-12-26 JP JP36153397A patent/JP4046825B2/ja not_active Expired - Fee Related
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