JPH11186595A - Semiconductor light-emitting element and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element in which the crystallinity of a light-emitting part in the vicinity of a P-N junction is satisfactory, lead-out efficiency of light is high, luminance is high, and characteristics are stable. SOLUTION: A first conductivity-type current barrier layer 4 is superposed and formed on an almost central part of a first GaP layer 3 of a second conductivity type, and a light lead-out side second conductivity-type electrode 6 is formed on a part corresponding to a forming region of the current barrier layer 4, interposing a second GaP layer 5 of a second conductivity type. Carrier concentrations of the current barrier layer 4 and the second conductivity-type GaP layer 3 are made low.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device used as a light source of a display device and a method for manufacturing the same.
In particular, the present invention relates to a high brightness GaP light emitting diode and a method for manufacturing the same.

[0002]

2. Description of the Related Art In general, a semiconductor light emitting element used for a display device or the like requires less power consumption as the luminance is higher. Therefore, a semiconductor light emitting element with higher luminance is desired. In particular, a semiconductor light emitting device having higher brightness is desired since it is easily affected by disturbance light when used outdoors.

As an example of this type of semiconductor light emitting device, G
There is an aP light emitting diode. The GaP light emitting diode includes a red light emitting diode and a green light emitting diode. A green light emitting diode made of N-doped GaP is mainly used for outdoor display requiring high luminance.

FIG. 9A shows a cross-sectional structure of a conventional GaP light emitting diode. This GaP light-emitting diode comprises a first n-type GaP layer 32, a second n-type GaP layer 33, and a p-type G
The structure in which the aP layers 34 are sequentially stacked, that is, n-n-n-
It has a p-structure. The light extraction side p-type electrode 35 is formed on the upper surface of the p-type GaP layer 34, and the n-type electrode 30 is formed on the lower surface of the n-type GaP substrate 31. In this GaP light emitting diode, the second n-type Ga
The P layer 33 has a low carrier concentration.

In this GaP light emitting diode, the recombination process of light emission is an indirect transition. For this reason, in order to increase the luminance of the GaP light emitting diode, it is important to improve the crystal quality, particularly, the crystallinity near the pn junction.

[0006] Further, since the GaP light emitting diode has a small light absorption amount of the crystal with respect to the emission wavelength and emits light from the whole crystal to the outside, it is also possible to improve the light extraction efficiency for increasing the brightness. is important.

[0007]

Accordingly, the conventional Ga
In the P light emitting diode, the carrier concentration is kept low in order to improve the crystal quality. However, in this case, the spread of the current with respect to the crystal size becomes poor, and in an extreme case, only the light directly below the light extraction side p-type electrode 35 emits light. That is, as shown in FIG. 9B, the distribution of the light emission intensity Ib in the light emitting portion near the pn junction is concentrated directly below the light extraction side p-type electrode 35,
There is a problem that the light extraction efficiency is low.

As a method for solving this problem, for example,
JP-A-6-97498 describes that a current blocking layer is formed on an epitaxial layer structure of a light emitting diode having a heterojunction, thereby improving current spreading.

Therefore, it is conceivable to provide a current blocking layer for the GaP light emitting diode as in the case of the light emitting diode having the hetero junction.

However, when the above method is applied to a GaP light emitting diode, there are problems in the following points.

(1) There is a problem that the manufacturing efficiency is reduced and the manufacturing cost of the GaP light emitting diode is increased.

The reason is that the crystal growth of the GaP light emitting diode is performed by the liquid phase epitaxial growth method, so that the GaP light emitting diode usually has a thickness of 1 μm.
On the other hand, when the current blocking layer is provided, a plurality of solutions are required, and the manufacturing process becomes complicated, the number of processes increases, and the manufacturing time increases.

The conventional GaP light emitting diode shown in FIG. 9 has an nnpnp structure. General Ga
In the case of a P light emitting diode, an n-type single crystal substrate used for the epitaxial growth has become widespread. For this reason,
When the current blocking layer is provided before the pn junction forming epitaxial growth, the current blocking layer becomes p-type. Therefore, the number of solutions required for epitaxial growth is a minimum of two solutions.

However, in this case, since the diffusion length of electrons serving as minority carriers in the current blocking layer is long, it is necessary to grow the thickness of the current blocking layer. Is disadvantageous in doing so.

On the other hand, when the layer thickness is reduced, it is necessary to increase the p-type carrier concentration. Therefore, if Zn is used as a dopant, another problem arises in that the diffusion of Zn occurs due to heat during epitaxial growth for forming the next pn junction, so that the function of the current blocking layer is impaired.

To solve this problem, an epitaxial growth for forming a pn junction on an n-type GaP substrate is performed once, an n-type current blocking layer is epitaxially grown, an etching process is performed, and a p-type GaP layer is further epitaxially grown. A method is conceivable. However, according to this method, although an n-type current blocking layer can be formed, at least three or more types of solutions are required.
There is a problem that the manufacturing efficiency is reduced and the manufacturing cost of the GaP light emitting diode is increased.

(2) When patterning the light extraction side electrode,
There is a problem in aligning the current blocking layer and the light extraction side electrode.

In general, when a current blocking layer is provided on a light emitting diode having a heterojunction, when patterning the light extraction side electrode, the alignment of the current blocking layer and the light extraction side electrode is performed using infrared light from the back side of the patterning surface. Is transmitted. In the case of a light emitting diode having a heterojunction, the difference in the refractive index between the current blocking layer and the epitaxial layer covering it causes an optical path difference in the transmitted light, so that the pattern of the current blocking layer can be observed. Therefore, alignment is performed using this.

However, since the GaP light emitting diode is a homojunction, there is no difference in the refractive index between the current blocking layer and the epitaxial layer covering the current blocking layer, and the above-described alignment method cannot be used.

Therefore, for example, a method is conceivable in which an orientation flat is provided on the wafer before the current blocking layer is formed, and the patterning direction is determined in advance.

However, according to this method,
Since a number of processes are performed from the formation of the current blocking layer to the formation of the light extraction side electrode, the direction of re-patterning may not be known due to wafer cracking. In addition, since the epitaxial layer is grown after the current blocking layer is formed, the shape of the orientation flat portion provided on the wafer may slightly change to cause a pattern shift.

SUMMARY OF THE INVENTION The present invention solves the above-mentioned problems of the prior art, and a semiconductor in which the crystallinity of the light emitting portion near the pn junction is good, the light extraction efficiency is high, the brightness is high, and the characteristics are stable. An object is to provide a light emitting device and a method for manufacturing the same.

It is another object of the present invention to provide a method of manufacturing a semiconductor light emitting device which can accurately align a current blocking layer and a light extraction side electrode when patterning a light extraction side electrode.

Still another object of the present invention is to provide a method of manufacturing a semiconductor light emitting device which can reduce the number of types of solution required for liquid phase epitaxial growth, improve the manufacturing efficiency and reduce the manufacturing cost.

[0025]

A semiconductor light emitting device according to the present invention comprises a pn junction formed by a first conductive type GaP layer and a first second conductive type GaP layer on a first conductive type GaP substrate. A semiconductor light-emitting device, comprising a GaP layer, a first conductivity type current blocking layer, which is formed so as to overlap a substantially central portion on the first second conductivity type GaP layer, and diffuses a current; A second second conductivity type GaP layer formed on the first second conductivity type GaP layer and the current blocking layer so as to cover the current blocking layer on the second conductivity type GaP layer, A light extraction side second conductivity type electrode formed at a portion corresponding to a region where the current blocking layer is formed, with the second second conductivity type GaP layer interposed therebetween;
The current blocking layer and the first second conductivity type GaP layer have a low carrier concentration, thereby achieving the above object.

Preferably, the carrier concentration at the junction between the current blocking layer and the first second conductivity type GaP layer is minimized, and the current blocking layer and the first second conductivity type GaP layer are minimized. Is increased from the bonding surface in the thickness direction of each layer.

Preferably, the segregation coefficient of an impurity serving as a carrier in the current blocking layer is equal to the first second impurity.
The conductivity type GaP layer is configured to be smaller than the segregation coefficient of impurities serving as carriers.

Preferably, a difference is provided between the light absorption coefficient of the current blocking layer and the light absorption coefficient of the second second conductivity type GaP layer.

Preferably, the current blocking layer is set to be transparent with respect to the emission wavelength.

Preferably, the carrier concentration of the current blocking layer and the first second conductivity type GaP layer is 5 × 10 5
The range is from ¹⁵ cm ^{−3 to} 20 × 10 ¹⁵ cm ⁻³ .

Preferably, the thickness of the current blocking layer is 5 μm or more.

Preferably, the carrier concentration of the second second conductivity type GaP layer is 1 × 10 ¹⁸ cm ^{−3 to} 5 × 10 5
The range is ¹⁸ cm ^-3 .

Further, in the semiconductor light emitting device of the present invention, a second second conductivity type GaP layer is formed so as to cover the current blocking layer, and the second second conductivity type GaP layer is interposed therebetween. A light-extraction-side second-conductivity-type electrode formed at a portion corresponding to a region where the current-blocking layer is formed, and the current-blocking layer and the light-extraction-side electrode during patterning of the light-extraction-side second conductivity-type electrode. Alignment is performed by irradiating light from the outside of the substrate on the side opposite to the light extraction side second conductivity type electrode, and the intensity difference between transmitted light between the current blocking layer and the second second conductivity type GaP layer. Wherein a difference is provided between the refractive index of the current blocking layer and the refractive index of the second second conductivity type GaP layer, thereby achieving the above object. Is done.

According to the method of manufacturing a semiconductor light emitting device of the present invention, a first first conductivity type GaP layer, a first second conductivity type GaP layer and a second first conductivity type GaP layer are formed on a first conductivity type GaP substrate. A growth step of successively liquid-phase epitaxially growing the layers in one solution, and an etching process to form a first-conduction-type current blocking layer so as to leave a central portion of the second first-conduction-type GaP layer. Re-growing a liquid phase epitaxial growth of a second second conductivity type GaP layer on the first second conductivity type GaP layer and the current blocking layer;
An electrode forming step of forming a light-extraction-side second-conductivity-type electrode at a portion corresponding to a region where the current blocking layer is formed on the conductivity-type GaP layer, thereby achieving the object described above.

Preferably, in the growing step, the first second conductivity type GaP layer and the second first conductivity type G
An aP layer is formed at a background carrier concentration in liquid phase epitaxial growth by supplying NH ₃ gas.

Preferably, the growth temperature in the regrowth step is in the range of 800 ° C. to 900 ° C.

Preferably, in the regrowth step, Zn is used as a dopant.

In the method of manufacturing a semiconductor light emitting device according to the present invention, when forming the current blocking layer and the second second conductivity type GaP layer, the impurity concentration of the current blocking layer and the second Providing a difference between the impurity concentration of the GaP layer and the difference between the refractive index of the current blocking layer and the refractive index of the second second conductivity type GaP layer; A step of irradiating light from the outside of the substrate on the side opposite to the light extraction side second conductivity type electrode during patterning of the two conductivity type electrode, and transmitting light through the current blocking layer and the second second conductivity type GaP layer. A step of aligning the current blocking layer and the light extraction side second conductivity type electrode by utilizing a difference in light intensity, thereby achieving the above object.

The operation of the present invention will be described below with reference to FIG.

According to the above structure, the first conductivity type current blocking layer 4 is formed so as to overlap the substantially central portion on the first second conductivity type GaP layer 3, and the second second conductivity type GaP layer is formed. The light extraction side second conductivity type electrode 6 is formed at a portion corresponding to the region where the current blocking layer 4 is formed with the layer 5 interposed therebetween. In addition, the current blocking layer 4 and the first second conductivity type GaP layer 3 have a low carrier concentration.

Current blocking layer 4 and first second conductivity type GaP
Since the carrier concentration of the layer 3 is reduced, the crystal quality is improved and the light transmittance is improved. In addition, the provision of the current blocking layer 4 improves the spread of the current and improves the light extraction efficiency. Therefore, it is possible to increase the luminance of the semiconductor light emitting element.

The current blocking layer 4 and the first second conductivity type G
The carrier concentration at the joint surface with the aP layer 3 is minimized, and the carrier concentration of the current blocking layer 4 and the first second conductivity type GaP layer 3 increases from this joint surface in the thickness direction of each layer. Structure. According to the experimental results of the inventors, it has been confirmed that the crystal quality can be further improved and the light transmittance can be further improved.

More specifically, these carrier concentrations are shown in FIG.
It is desirable to set the range of 5 × 10 ¹⁵ cm ^{−3 to} 20 × 10 ¹⁵ cm ⁻³ .

On the other hand, when the carrier concentration is lowered, the diffusion length of electrons serving as minority carriers in the current blocking layer 4 becomes longer. However, since the epitaxial growth is performed by the liquid phase epitaxial growth method, the current blocking layer 4 can be made thicker. In addition, the function of the current blocking layer 4 does not decrease. Specifically, the thickness of the current blocking layer 4 is desirably 5 μm or more.

As a result, the current spreads around the light-extraction-side second-conductivity-type electrode 6 in the semiconductor light-emitting element, so that the distribution of the light-emission intensity does not concentrate directly below the second-conductivity-type electrode 6, and the light emission is reduced. The distribution of the intensity Ia is as shown in FIG. That is, by emitting light around the second conductivity type electrode 6, which has not been emitting light conventionally, light extraction efficiency can be improved and luminous intensity can be improved. Therefore, it is possible to increase the luminance of the semiconductor light emitting element.

In addition, if the current blocking layer 4 is set to be transparent with respect to the emission wavelength, the amount of light attenuation can be reduced.
Since the luminous intensity can be further improved, it is effective in increasing the luminance of the semiconductor light emitting device.

Further, by making the segregation coefficient of the impurity serving as a carrier in the current blocking layer 4 smaller than the segregation coefficient of the impurity serving as a carrier in the first second conductivity type GaP layer 3, the current blocking layer 4 has It becomes conductive type.

Therefore, only two kinds of solutions are required for the liquid phase epitaxial growth, and the manufacturing process is simplified, the number of processes is reduced, and the manufacturing time is shortened. Therefore, it is possible to improve the manufacturing efficiency and reduce the manufacturing cost of the semiconductor light emitting device.

In the above growth step, when NH ₃ gas is supplied, NH ₃ gas reacts with Si in the GaP solution,
The carrier concentration decreases rapidly, and carbon C, which is a p-type impurity supplied from the carbon epitaxial growth boat, and residual S, such as S, which is an n-type impurity supplied from the n-type GaP substrate 1, are lower than the Si concentration in the GaP solution. The impurity concentration becomes dominant. Therefore, the polarity of the epitaxial growth is governed by the background carrier concentration. Therefore, as the wafer is gradually cooled, the first N-doped p-type GaP layer 3 is first formed by C or the like, which is a p-type impurity having a segregation coefficient larger than 1 due to the difference in segregation coefficient of the residual impurities. Then, the n-type impurity S having a segregation coefficient smaller than 1
Thus, a second N-doped n-type GaP layer 4 'is formed.

In the regrowth step, the growth temperature is set to 80
When the temperature is in the range of 0 ° C. to 900 ° C., the growth rate in the liquid phase epitaxial growth is reduced, so that vacancies and the like are increased in the second second conductivity type GaP layer 5, and the crystal quality is reduced. Therefore, a difference can be provided between the light absorption coefficient of the current blocking layer 4 and the light absorption coefficient of the second second conductivity type GaP layer 5.

In the above-mentioned regrowth step, Zn is used as a dopant, and the light absorption coefficient of the current blocking layer 4 and the second light absorption coefficient are increased by utilizing the relation that the amount of light absorbed increases when the doping amount of Zn is increased. A difference can be provided between the two-conductivity-type GaP layer 5 and the light absorption coefficient.

Moreover, when Zn is used as the dopant, the segregation coefficient of Zn is almost 1, so that a uniform concentration profile can be obtained as shown in FIG. 5, so that the characteristics of the semiconductor light emitting device can be stabilized. It becomes possible. still,
As long as the segregation coefficient is approximately 1, a similar effect can be obtained by using an element other than Zn, such as Mg.

However, if the doping amount of Zn is too large, the light extraction efficiency decreases, so that the carrier concentration of the second second conductivity type GaP layer 5 is set to 1 × 10 ¹⁸ cm ^{−3 to} 5 ×.
It is desirable to be in the range of 10 ¹⁸ cm ^-3 . When the carrier concentration is in this range, the growth temperature may be set in any range.

Since there is an inverse correlation between the light absorption coefficient and the refractive index, the light absorption coefficient of the current blocking layer 4 and the light absorption coefficient of the second second conductivity type GaP layer 5 are determined as described above. Is provided, a difference occurs between the refractive index of the current blocking layer 4 and the refractive index of the second second conductivity type GaP layer 5. For this reason, when light is irradiated from the outside of the substrate on the side opposite to the light extraction side second conductivity type electrode 6 in the electrode forming step, the current blocking layer 4 and the second second Conductivity type Ga
Since there is a difference in intensity between the transmitted light and the P layer 5, it is possible to distinguish the current blocking layer and the second second conductivity type GaP layer using the transmission image obtained thereby. Therefore, even in a semiconductor light emitting device having a homojunction, the second light extraction side
At the time of patterning the conductive electrode 6, alignment with the current blocking layer 4 can be performed accurately.

[0055]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be specifically described below with reference to the drawings.

FIG. 1A shows a sectional structure of a GaP light emitting diode of the present invention. This GaP light emitting diode has n
A first n-type GaP layer 2 and a first p-type GaP layer 3 are sequentially stacked on a p-type GaP substrate (wafer) 1 by liquid phase epitaxial growth.
An n-type current blocking layer 4 made of aP is superposed, and the first p-type GaP layer 3 and the n-type current blocking layer
Structure in which the second p-type GaP layer 5 is laminated on the p-type current blocking layer 4, that is, nn with the n-type current blocking layer 4 provided inside.
-Has a pp structure.

On the upper surface of the second p-type GaP layer 5, n
The light extraction side p is formed at a portion corresponding to the formation region of the type current blocking layer 4.
Form electrode 6 is formed, and n-type electrode 7 is formed on the lower surface of n-type GaP substrate 1. In this GaP light emitting diode, the first p-type GaP layer 3 and the n-type current blocking layer 4 have a low carrier concentration.

A method of manufacturing a GaP light emitting diode according to the present invention will be described with reference to the manufacturing process diagram of FIG. 2 and the temperature program for liquid phase epitaxial growth of FIGS. 3 and 4.

The wafer was set in a growth apparatus, and a hydrogen gas was used as a carrier gas at a flow rate of 4 L (liter) / m.
Then, a GaP solution is immersed on the n-type GaP substrate 1 at a temperature of 1000 ° C. (see FIG. 2A and FIG. 3A).

Next, the wafer is gradually cooled at a rate of 0.5 ° C./min.
To 900 ° C. At this time, Si is doped, and the first n-type GaP layer 2 is formed on the n-type GaP substrate 1.
Is formed (see FIGS. 2B and 3B).

Next, NH ₃ gas is supplied at 900 ° C. together with hydrogen gas. At this time, the temperature is maintained at 900 ° C. for about 30 minutes (see FIG. 3C). This is the time for reacting the NH ₃ gas with the GaP solution. As a result, NH ₃ gas and G
The Si in the aP solution reacts and the carrier concentration rapidly decreases, and is supplied from the carbon C or n-type GaP substrate 1 which is a p-type impurity supplied from the carbon epitaxial growth boat more than the Si concentration in the GaP solution. The concentration of residual impurities such as n, which is an n-type impurity, becomes superior.

Next, the wafer is gradually cooled to 850 ° C. at a cooling rate of 0.1%.
Cool at 5 ° C / min. At this time, the residual impurity concentration is dominant, and the polarity of the epitaxial growth is dominated by the background carrier concentration. Therefore, due to the difference in the segregation coefficient of the residual impurities, first, the segregation coefficient is 1
A first N-doped p-type GaP layer 3 is formed by using a larger p-type impurity such as C, and then a second N-doped n-type GaP layer is formed by using an n-type impurity such as S whose segregation coefficient is smaller than 1.
A P layer 4 'is formed (see FIGS. 2B and 3D).
The carrier concentration of each of the formed layers is 5 × 10 ¹⁵ cm ⁻³ to
It is in the range of 20 × 10 ¹⁵ cm ⁻³ . Thus, the first growth is completed, and the wafer is taken out of the growth apparatus.

Next, an SiO ₂ film is formed on the surface of the wafer, and is patterned to about 80 μmφ to 120 μmφ.
Etching is performed to form a second N-doped n-type GaP layer 4 '.
Is removed to form an n-type current blocking layer 4 (FIG. 2).
(C)). The SiO ₂ film is removed, and light etching is performed again. After that, the wafer is set in the growth apparatus again, and the second epitaxial growth is performed.

FIG. 4 shows a temperature program for the second liquid phase epitaxial growth.

A carrier gas is supplied at a flow rate of 4 L (liter) / min in the same manner as the first time, using a hydrogen gas, and a GaP solution is immersed on a wafer at a temperature of 900 ° C. (see FIG. 4E).

Next, the wafer is gradually cooled at a rate of 0.5 ° C./min.
To 850 ° C. At this time, Zn is doped and the second p-type GaP layer 5 is formed.
(D), see FIG. 4f). The carrier concentration of the second p-type GaP layer 5 is 7 × 10 ¹⁷ cm ^{−3 to} 20 × 10 ¹⁷ cm
The range is ^-3 . This completes the second growth.

When the second epitaxial growth is performed at a higher temperature than the above, the carrier concentration of the formed second p-type GaP layer 5 is 1 × 10 ¹⁸ cm ⁻³ or less.
It may be in the range of 5 × 10 ¹⁸ cm ⁻³ .

The thickness of each epitaxial layer is 40 μm for the first n-type GaP layer 2 and 20 μm for the first p-type GaP layer 3.
m, n-type current blocking layer 4 is 5 μm, second p-type GaP layer 5
Is 10 μm.

FIG. 5 shows the results obtained by measuring the carrier concentration directly below the light extraction side p-type electrode 6 by the Schottky method.
Here, the vertical axis represents the impurity concentration, and the horizontal axis represents the epitaxial growth direction. The carrier concentration of each epitaxial layer is
The first n-type GaP layer 2 is 2 × 10 ¹⁷ cm ⁻³ , and the first p-type GaP layer 3 is 0.5 × 10 ¹⁶ cm ⁻³ to 2 × 10 ¹⁶ c
m ⁻³ , the n-type current blocking layer 4 is 0.5 × 10 ¹⁶ cm ^{−3 to} 3 ×
10 ¹⁶ cm ⁻³ , the second p-type GaP layer 5 is 2 × 10 ¹⁸ cm
It is ^-3 .

As shown in FIG. 5, the carrier concentration at the junction between the n-type current blocking layer 4 and the first p-type GaP layer 3 is minimized, and the n-type current blocking layer 4 and the first The relationship is such that the carrier concentration of the p-type GaP layer 3 increases from the junction surface in the thickness direction of each layer.

By making the segregation coefficient of the impurity serving as a carrier in the current blocking layer 4 smaller than that of the impurity serving as a carrier in the first p-type GaP layer 3, the current blocking layer 4 becomes n-type. .

When Zn is used as the dopant of the second p-type GaP layer 5, the segregation coefficient of Zn is almost 1, so that a uniform concentration profile can be obtained as shown in FIG. The characteristics of the element can be stabilized.

However, if the doping amount of Zn is too large, the light extraction efficiency decreases, so that the carrier concentration of the second second conductivity type GaP layer 5 is 1 × 10 ¹⁸ cm ^{−3 to} 5 ×.
It is desirable to be in the range of 10 ¹⁸ cm ^-3 . When the carrier concentration is in this range, the growth temperature may be set in any range.

Next, a light-extraction-side p-type electrode 6 was formed in accordance with the current blocking layer 4 of the substrate, and the light-extraction side was measured for a GaP light emitting diode divided into 0.30 mm openings. As a result, the luminous intensity of the conventional GaP light emitting diode was increased to 100 (emission color: yellowish green, emission wavelength λp: 565).
nm), a luminous intensity of 140 was obtained with the GaP light emitting diode of the present invention. This is because the distribution of the emission intensity Ib of the conventional GaP light-emitting diode was concentrated immediately below the light extraction side p-type electrode 35 as shown in FIG. As the current spreads around the light extraction side p-type electrode 6 in the light emitting diode, the distribution of the light emission intensity Ia becomes as shown in FIG. 1 (B), and the light extraction side p-type electrode 6 which did not emit light conventionally. This is because the effect of improving the luminous intensity was obtained by emitting light from the surrounding area.

Next, in the electrode forming step, the light extraction side p
A method for performing alignment with the n-type current blocking layer 4 during patterning of the mold electrode 6 will be described with reference to FIGS.

This method is performed using the alignment apparatus shown in FIG. Wafer 1 removed from growth equipment
2 is mounted on the stage 11 of the alignment apparatus. Below the stage 11, an alignment light source 10 is provided.
Is provided, and a CCD camera 14 is provided above the wafer 12. The stage 11 is provided with an opening 16 at a portion where light from the alignment light source 10 passes. Also, beside the CCD camera 14,
An exposure light source 15 is provided.

Next, the alignment process will be described with reference to FIGS.

First, the epitaxially grown wafer 1
2 is wrapped from the substrate side until the thickness of the wafer 12 becomes 280 μm, further polished, and
The surface of No. 2 is mirror-finished (step S1 in FIG. 8).

Next, an n-type electrode material is deposited on the mirror-finished surface of the wafer 12 to form an n-type electrode. At this time, an n-type electrode is not formed on a part (R region) of the wafer edge for the later formation of the light extraction side p-type electrode 6 (step S2 in FIG. 8).

Next, a p-type electrode material is deposited on the surface of the epitaxial growth layer of the wafer 12 to form the light extraction side p-type electrode 6. At this time, the p-type electrode 6 is not formed on a part (R region) of the wafer edge as described above (Step S2 in FIG. 8).

Next, a procedure for performing alignment with the n-type current blocking layer 4 when patterning the light extraction side p-type electrode 6 will be described.

A resist is applied to the upper surface of the wafer 12 placed on the stage 11 (Step S3 in FIG. 8).

The mask pattern M of the p-side photomask 13
Is the same as or slightly larger than the shape of the n-type current blocking layer 4.

Light from the alignment light source 10, for example, infrared light L 1 is irradiated from the opening 16 of the stage to the back side of the wafer 12, and infrared light L 1 is emitted from a part (R region) of the wafer end where no electrode is formed. Through. At this time, C
When the transmitted light L2 is observed by the CD camera 14, FIG.
As shown in the figure, the n-type current blocking layer 4 and the second p-type GaP layer 5
The boundary P with the boundary between the ring-shaped dark portion and the light-dark difference of the transmitted light can be confirmed.

In order to provide a refractive index difference, in the second growth step, for example, Zn as a dopant is used.
The difference between the light absorption coefficient of the current blocking layer and the light absorption coefficient of the second second conductivity type GaP layer is exploited by utilizing the relationship that the light absorption amount increases when the Zn doping amount is increased. Provide.
Since there is an inverse correlation between the light absorption coefficient and the refractive index,
A difference in refractive index occurs between the n-type current blocking layer 4 and the second p-type GaP layer 5.

As another method, in the second growth step, the growth temperature is set in the range of 800 ° C. to 900 ° C., and the growth rate in the liquid phase epitaxial growth is reduced to reduce the second second conductivity type GaP. By reducing the crystal quality by generating many holes and the like in the layer, a difference can be provided between the light absorption coefficient of the current blocking layer and the light absorption coefficient of the second second conductivity type GaP layer.

The alignment of the transmission image N and the mask pattern M of the photomask 13 is performed using the R region (step S4 in FIG. 8).

In a state where the wafer 12 placed on the stage 11 and the photomask 13 are aligned,
The stage 11 is moved to the exposure light source 15 side, and exposure is performed by the exposure light source 15 to form a pattern of the light extraction side p-type electrode 6 (Step S4 in FIG. 8).

After etching the electrode material, the resist is peeled off and alloyed to complete the formation of the light extraction side p-type electrode 6 (Steps S5 to S7 in FIG. 8).

Through the above steps, a GaP light emitting diode having the structure shown in FIG. 1A is manufactured.

The GaP described in the above embodiment is
The conductivity types of the semiconductor layers and the electrodes constituting the light emitting diode may be reversed between p-type and n-type.

[0092]

As described above, according to the semiconductor light emitting device of the present invention, the current blocking layer and the first second conductivity type Ga are used.
Since the carrier concentration of the P layer is reduced, the crystal quality is improved and the light transmittance is improved. Further, by providing the current blocking layer, the spread of the current is improved and the light extraction efficiency is improved. Therefore, it is possible to increase the luminance of the semiconductor light emitting element.

Further, according to the semiconductor light emitting device of the present invention, the carrier concentration at the junction surface between the current blocking layer and the first second conductivity type GaP layer is minimized, Since the carrier concentration of the first second-conductivity-type GaP layer increases in the thickness direction of each layer from this junction surface, the crystal quality can be further improved and the light transmittance can be further improved.

According to the semiconductor light emitting device of the present invention, the current blocking layer is set to be transparent with respect to the emission wavelength, so that the luminous intensity can be further improved. Is effective in increasing the brightness of the image.

According to the semiconductor light emitting device of the sixth aspect, the carrier concentration of the current blocking layer and the first second conductivity type GaP layer is set to 5 × 10 ¹⁵ cm ^{−3 to} 20 × 10 ¹⁵ cm ^−3.
, The light transmittance can be further improved.

According to the semiconductor light emitting device of the present invention, the thickness of the current blocking layer is set to 5 μm or more.
The function of the current blocking layer can be prevented from lowering.

According to the semiconductor light emitting device of the present invention, the carrier concentration of the second second conductivity type GaP layer is in the range of 1 × 10 ¹⁸ cm ^{−3 to} 5 × 10 ¹⁸ cm ^−3. Therefore, it is possible to prevent the light extraction efficiency from decreasing. Moreover, in this case, the growth temperature may be set in any range.

Further, according to the semiconductor light emitting device of the third aspect, the segregation coefficient of the impurity serving as a carrier in the current blocking layer is smaller than the segregation coefficient of the impurity serving as the carrier in the first second conductivity type GaP layer. Therefore, the current blocking layer can be of the first conductivity type.

Further, according to the method for manufacturing a semiconductor light emitting device according to the tenth aspect, only two types of solutions are required for liquid phase epitaxial growth, thereby improving the manufacturing efficiency and reducing the manufacturing cost of the semiconductor light emitting device. be able to.

According to the method of manufacturing a semiconductor light emitting device of the present invention, NH ₃ is preferably formed in the growth step.
Since liquid phase epitaxial growth is performed by supplying a gas, the first second conductivity type GaP layer and the second first conductivity type GaP layer can be formed with a background carrier concentration.

According to the method of manufacturing a semiconductor light emitting device of the twelfth aspect, in the regrowth step, the growth temperature is in the range of 800 ° C. to 900 ° C., so that the growth rate in the liquid phase epitaxial growth is reduced. By reducing the crystal quality by generating many holes and the like in the second second conductivity type GaP layer, the light absorption coefficient of the current blocking layer and the light absorption coefficient of the second second conductivity type GaP layer are reduced. Can be provided.

In the method of manufacturing a semiconductor light emitting device according to the thirteenth aspect, since Zn is used as a dopant in the regrowth step, the light absorption coefficient of the current blocking layer can be changed by changing the doping amount of Zn. And a light absorption coefficient of the second second conductivity type GaP layer. Moreover, since a uniform concentration profile can be obtained,
The characteristics of the semiconductor light emitting device can be stabilized.

According to the method of manufacturing a semiconductor light emitting device of the present invention, when patterning the light-extraction-side second-conductivity-type electrode, the current blocking layer and the second second-conductivity-type electrode caused by the difference in the refractive index are patterned. The current blocking layer and the second second conductivity type GaP layer are identified by utilizing the intensity difference in the transmitted light from the GaP layer.
Therefore, even in a semiconductor light emitting device having a homojunction, it is possible to accurately perform alignment between the current blocking layer and the light extraction side electrode.

[Brief description of the drawings]

FIG. 1 is a sectional structural view (A) of a semiconductor light emitting device of the present invention;
FIG. 4 is a diagram showing a light emission intensity distribution (B) in a light emitting portion near the pn junction.

FIG. 2 is a view showing a manufacturing process of the semiconductor light emitting device of the present invention.

FIG. 3 is a diagram showing a first liquid phase epitaxial growth temperature program of the semiconductor light emitting device of the present invention.

FIG. 4 is a diagram showing a second liquid phase epitaxial growth temperature program of the semiconductor light emitting device of the present invention.

FIG. 5 is a diagram showing a carrier concentration profile immediately below a p-type electrode of the semiconductor light emitting device of the present invention.

FIG. 6 is a diagram illustrating a method for aligning a current blocking layer and a light extraction side electrode during electrode patterning in an electrode forming step of the semiconductor light emitting device of the present invention.

FIG. 7 is a view showing a state in which the contour of the current blocking layer can be observed as a transmission image when infrared rays are transmitted from the back side of the electrode patterning surface in the electrode forming step of the semiconductor light emitting device of the present invention.

FIG. 8 is a view showing a procedure for aligning a current blocking layer and a light extraction side electrode during electrode patterning in an electrode forming step of the semiconductor light emitting device of the present invention.

9A and 9B are a cross-sectional structural view of a conventional semiconductor light emitting device and a light emitting intensity distribution in a light emitting portion near a pn junction thereof, respectively.

[Explanation of symbols]

 Reference Signs List 1 n-type GaP single crystal 2 first n-type GaP layer 3 first p-type GaP layer 4 ′ second n-type GaP layer 4 n-type current blocking layer 5 second p-type GaP layer 6 p-type electrode 7 n-type electrode 10 light source for alignment 11 stage 12 wafer 13 photomask 14 CCD camera 15 light source for exposure 16 aperture

Claims (14)

[Claims] 1. A first conductivity type G on a first conductivity type GaP substrate.
A semiconductor light emitting device in which a pn junction is formed by an aP layer and a first second conductivity type GaP layer, the semiconductor light emitting device comprising a GaP layer and superimposed substantially at a central portion on the first second conductivity type GaP layer. A first conductivity type current blocking layer formed to diffuse the current; and a first second conductivity type GaP layer covering the current blocking layer on the first second conductivity type GaP layer. A second second conductivity type GaP layer formed on the current blocking layer; and a portion corresponding to the current blocking layer formation region with the second second conductivity type GaP layer interposed therebetween. A semiconductor light emitting device comprising: a light extraction side second conductivity type electrode; wherein the current blocking layer and the first second conductivity type GaP layer have a low carrier concentration. 2. The method according to claim 1, wherein a carrier concentration at a junction surface between said current blocking layer and said first second conductivity type GaP layer is minimized, and said current blocking layer and said first second conductivity type GaP layer are combined.
2. The semiconductor light emitting device according to claim 1, wherein the carrier concentration of the layer increases from the junction surface in the thickness direction of each layer. 3. The semiconductor light emitting device according to claim 1, wherein a segregation coefficient of an impurity serving as a carrier in the current blocking layer is smaller than a segregation coefficient of an impurity serving as a carrier in the first second conductivity type GaP layer. element. 4. A light absorption coefficient of said current blocking layer and said second coefficient.
4. The semiconductor light emitting device according to claim 1, wherein a difference is provided between the light absorption coefficient of the second conductivity type GaP layer and the second conductivity type GaP layer. 5. The semiconductor light emitting device according to claim 1, wherein the current blocking layer is set to be transparent with respect to an emission wavelength. 6. The current blocking layer and the first second conductivity type GaP layer have a carrier concentration of 5 × 10 ¹⁵ cm ^{−3 to} 20 ×.
The semiconductor light emitting device according to claim 1, wherein the range is 10 ¹⁵ cm ⁻³ . 7. The semiconductor light emitting device according to claim 1, wherein said current blocking layer has a thickness of 5 μm or more. 8. The method according to claim 1, wherein a carrier concentration of the second second conductivity type GaP layer is in a range of 1 × 10 ¹⁸ cm ^{−3 to} 5 × 10 ¹⁸ cm ^−3. Semiconductor light emitting device. 9. A second second conductivity type GaP layer is formed to cover the current blocking layer, and the second second conductivity type GP layer is formed.
A light-extraction-side second-conductivity-type electrode formed at a portion corresponding to a region where the current-blocking layer is formed with the aP layer interposed therebetween, and the current-blocking layer at the time of patterning the light-extraction-side second conductivity-type electrode is formed. And aligning the light-extraction-side electrode with the light-extraction-side second-conductivity-type electrode by irradiating light from outside the substrate on the opposite side to the current-blocking layer and the second second-conductivity-type GaP layer. 3. A semiconductor light emitting device which utilizes a difference in intensity of transmitted light, wherein a difference is provided between a refractive index of the current blocking layer and a refractive index of the second second conductivity type GaP layer. 10. The method for manufacturing a semiconductor light emitting device according to claim 1, wherein a first first conductivity type GaP layer is formed on a first conductivity type GaP substrate.
First second conductivity type GaP layer and second first conductivity type GaP
A growth step in which the layers are successively liquid-phase epitaxially grown in one solution, and an etching process is performed to leave a central portion of the second first conductivity type GaP layer to form a first conductivity type current blocking layer. Performing a liquid phase epitaxial growth of a second second conductivity type GaP layer on the first second conductivity type GaP layer and the current blocking layer; and a second growth type GaP layer. An electrode forming step of forming a light-extraction-side second-conductivity-type electrode on a layer in a portion corresponding to a region where the current blocking layer is formed. 11. In the growing step, the first second-conductivity-type GaP layer and the second first-conductivity-type GaP layer are formed with a background carrier concentration in liquid-phase epitaxial growth by supplying NH ₃ gas. Claim 1
0. A method for manufacturing a semiconductor light emitting device according to item 0 12. The growth temperature in the regrowth step is 8
The temperature is in the range of 00 ° C to 900 ° C.
2. The method for manufacturing a semiconductor light emitting device according to claim 1. 13. The method according to claim 10, wherein Zn is used as a dopant in the regrowth step. 14. The method for manufacturing a semiconductor light emitting device according to claim 9, wherein when forming the current blocking layer and the second second conductivity type GaP layer, the impurity concentration of the current blocking layer and the second Of the second conductivity type G
providing a difference between the impurity concentration of the aP layer and providing a difference between the refractive index of the current blocking layer and the refractive index of the second second conductivity type GaP layer; A step of irradiating light from the outside of the substrate on the side opposite to the light extraction side second conductivity type electrode when patterning the conductivity type electrode, and transmitting light between the current blocking layer and the second second conductivity type GaP layer. A step of aligning the current blocking layer and the light-extraction-side second-conductivity-type electrode by utilizing the difference in intensity of the light-emitting element.