JPH11186510A - Method for forming ferroelectric capacitor and method for manufacturing nonvolatile semiconductor storage device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To manufacture, with good yield, a ferroelectric capacitor of superior ferroelectric characteristics and nonvolatile semiconductor storage device of a stack-type structure comprising the ferroelectric capacitor. SOLUTION: On a lower part Pt electrode 4 formed on a silicon substrate 1 through a thermal-oxidation film 2 and a TiO2 adherence layer 3, an SrBi2 Ta2 O9 film 7 which is a ferroelectric film is formed. Then, through thermal process at 650-800 deg.C in a nitrogen atmosphere which is an inert gas, the ferroelectric film is crystallized. Then, an upper part Pt electrode 6 is formed on the ferroelectric film.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a capacitor having a ferroelectric film (hereinafter referred to as "ferroelectric capacitor") and a method for manufacturing a nonvolatile semiconductor memory device provided with this ferroelectric capacitor. It is about.

[0002]

2. Description of the Related Art A conventional non-volatile semiconductor memory device,
The read time of an EPROM, an EEPROM, a flash memory or the like is comparable to that of a DRAM, but the write time is long and high-speed operation cannot be expected. On the other hand, a non-volatile semiconductor storage element using a ferroelectric capacitor is comparable to a DRAM in both reading and writing, and is a non-volatile memory that can be expected to operate at high speed. In general, the device structure forms one cell with one select transistor and one ferroelectric capacitor, or one cell with two select transistors and two ferroelectric capacitors.

As a ferroelectric material used for a ferroelectric capacitor, SrBi ₂ Ta ₂ O _9, which has better fatigue characteristics and can be driven at a lower voltage than PZT which has been studied so far, has attracted attention and is being actively studied. ing.

This material is different from a ferroelectric material such as PZT or the like, and can be formed by any method such as a MOD method, a sol-gel method, a MOCVD method, and a sputtering method. As disclosed in JP-A-36309, the ferroelectric is crystallized by a heat treatment in an oxidizing atmosphere at a high temperature of usually about 700 to 800 ° C.

[0005]

However, the above-mentioned heat treatment in a high-temperature oxidizing atmosphere is not so problematic for a ferroelectric capacitor having a relatively low integration in a planar structure. In a stack type structure that is indispensable for high integration, a polysilicon plug used for contact with the lower electrode and a barrier metal such as TiN or TaSiN for preventing diffusion between the plug and the lower platinum electrode are subjected to a high-temperature process. Oxidation occurs.

[0006] When such oxidation of the polysilicon plug or the barrier metal occurs, there arises a problem that the conduction between the plug and the lower electrode is stopped or the barrier metal expands and peels off.

[0007]

A method for forming a ferroelectric capacitor according to the present invention according to claim 1. Forming a ferroelectric film on the lower electrode, crystallizing the ferroelectric film by heat treatment in an inert gas atmosphere, and forming an upper electrode on the ferroelectric film. It is characterized by having.

According to a second aspect of the present invention, in the method of manufacturing a ferroelectric capacitor according to the present invention, after the crystallization step, the ferroelectric film is formed in an oxygen atmosphere at a temperature at which a base of the lower electrode is not oxidized. 2. The method for manufacturing a ferroelectric capacitor according to claim 1, further comprising a step of performing a heat treatment for supplementing oxygen deficiency.

According to a third aspect of the present invention, in the method of manufacturing a ferroelectric capacitor according to the present invention, the step of forming the ferroelectric film on the lower electrode includes the step of forming the ferroelectric film using a coating film forming method. 3. The ferroelectric film according to claim 1, wherein a step of applying the film material to a predetermined film thickness and then drying is repeated to form a ferroelectric film having a desired film thickness. This is a method for forming a dielectric capacitor.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a ferroelectric capacitor according to the present invention, wherein a ferroelectric film having a predetermined thickness is formed on a lower electrode and then heat-treated in an inert gas atmosphere. Repeat the step of crystallizing the ferroelectric film,
The method is characterized by including a step of forming a ferroelectric film having a desired film thickness and a step of forming an upper electrode on the ferroelectric film.

According to a fifth aspect of the present invention, in the method of manufacturing a ferroelectric capacitor according to the present invention, after forming the ferroelectric film having the desired thickness, the underlayer of the lower electrode is oxidized in an oxygen atmosphere. 5. The method for forming a ferroelectric capacitor according to claim 4, further comprising a step of performing a heat treatment for replenishing oxygen deficiency of the ferroelectric film at a temperature not performed.

The method of manufacturing a ferroelectric capacitor according to the present invention described in claim 6 is characterized in that the ferroelectric film is formed by a coating method. This is a method for forming a ferroelectric capacitor.

In the method of manufacturing a ferroelectric capacitor according to a seventh aspect of the present invention, the heat treatment for supplementing the oxygen deficiency is performed after the formation of the upper electrode. 3. A method for forming a ferroelectric capacitor according to any one of claims 5 and 6.

According to a eighth aspect of the present invention, in the method of manufacturing a ferroelectric capacitor according to the present invention, the ferroelectric film is a bismuth-based layered structure compound. Or a method for forming a ferroelectric capacitor.

According to a ninth aspect of the present invention, in the method of manufacturing a ferroelectric capacitor according to the present invention, the bismuth-based layer structure compound is SrBi ₂ (Ta _1-x Nb _x ) ₂ O ₉ (0 ≦ x ≦ 1). The method for forming a ferroelectric capacitor according to claim 8, wherein

According to a tenth aspect of the present invention, in the method of manufacturing a ferroelectric capacitor according to the present invention, the heat treatment for crystallizing the ferroelectric film is performed at a temperature of 650 ° C. to 800 ° C. A method for forming a ferroelectric capacitor according to any one of claims 1 to 9.

Further, according to a method of manufacturing a nonvolatile semiconductor memory device according to the present invention, a select transistor is formed on a semiconductor substrate, and an interlayer insulating film is formed on the select transistor. Forming a conductive plug or the conductive plug and the conductive barrier layer so as to be electrically connected to the semiconductor substrate in the contact hole formed in the conductive plug or the conductive plug and the conductive plug and the conductive barrier layer; After the lower electrode is formed so as to be electrically connected, a ferroelectric capacitor is formed by the steps described in the first to tenth aspects.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail based on embodiments.

The substrate used for the non-volatile semiconductor memory device having a ferroelectric capacitor in the present invention is not particularly limited as long as it can be used as a substrate for ordinary semiconductor devices and integrated circuits. A silicon substrate is preferred.

In the present invention, the ferroelectric film is made of a bismuth-based layered structure compound, for example, Bi ₄ Ti ₃ O ₁₂ , SrBi.
₂ Ta ₂ O ₉ , SrBi ₂ Nb ₂ O ₉ , SrBi ₂ (Ta _1-x N
b _x ) ₂ O ₉ , BaBi ₂ Nb ₂ O ₉ , BaBi ₂ Ta ₂ O ₉ ,
PbBi ₂ Nb ₂ O ₉ , PbBi ₂ Ta ₂ O ₉ , PbBi ₄ T
i ₄ O ₁₅ , SrBi ₄ Ti ₄ O ₁₅ , BaBi ₄ Ti ₄ O ₁₅ ,
Sr ₂ Bi ₄ Ti ₅ O ₁₈ , Ba ₂ Bi ₄ Ti ₅ O ₁₈ , Pb ₂ B
i ₄ Ti ₅ O ₁₈ , Na _0.5 Bi _4.5 Ti ₄ O ₁₅ , K _0.5 Bi
_4.5 Ti ₄ O _{15 and the} like, among which SrBi ₂ Ta ₂
O ₉ and SrBi ₂ (Ta _1-x Nb _x ) ₂ O ₉ (0 <x ≦ 1) are preferred.

These ferroelectric films are formed on the above substrate by a sol-gel method or MOD (Metal Organic Deco).
coating) method such as deposition method and MOCVD
It is formed by a method, a sputtering method or the like.

In the coating film forming method, an organic solvent containing a salt or a metal alkoxide of some of the elements constituting the thin film is mixed with an organic solvent containing a salt or a metal alkoxide of another element. , A raw material solution is prepared, and the raw material solution is coated by spin coating or the like in a single application.
It is applied with a thickness of about 100 nm and a drying step of about 100-300 ° C. is performed.

An example of a method for preparing a raw material solution used in the MOD method in the coating film forming method will be described below.

First, tantalum ethoxide (Ta (OC ₂ H ₅ ) ₅ ), bismuth 2-ethylhexanoate (Bi (OCOC ₇ H ₁₅ ) ₂ ), and 2-
Strontium ethylhexanoate (Sr (OCOC ₇ H
₁₅ ) ₂ ) was used. Weigh tantalum ethoxide, 2
In order to accelerate the reaction by dissolving in -ethylhexanoic acid, the mixture was stirred while heating from 100 ° C to a maximum temperature of 120 ° C, and reacted for 30 minutes. Thereafter, ethanol and water generated by the reaction at 120 ° C. were removed. An appropriate amount of strontium 2-ethylhexanoate dissolved in 20 to 30 ml of xylene is added to this solution so that Sr / Ta = 8/20, and the maximum temperature is increased from 125 ° C. to 140 ° C.
For 30 minutes. Then add 10 ml to this solution
Bismuth 2-ethylhexanoate dissolved in xylene was added in an appropriate amount so that Sr / Bi / Ta = 8/24/20, and the mixture was heated with stirring at 130 ° C. to a maximum temperature of 150 ° C. for 10 hours.

Next, in order to remove the low-molecular-weight alcohol, water and xylene used as a solvent from the solution, the solution was distilled at a temperature of 130 to 150 ° C. for 5 hours. Thereafter, the concentration of SrBi ₂ Ta ₂ O _{9 in} the solution was adjusted to 0.1 mol / l, and this was used as a precursor solution. Incidentally, these starting materials are not limited to those described above,
Any organic metal containing oxygen in the raw material may be used. The solvent may be any one as long as the starting material can be sufficiently dissolved.

In the conventional coating film forming method, the following 500 to
Pre-baking heat treatment at about 600 ° C., heat treatment at about 650-800 ° C. for crystallization of the ferroelectric thin film, formation of an upper electrode, and 50 for suppressing leakage current of the film after processing.
All heat treatments at 0 to 700 ° C. have been performed in an oxidizing atmosphere.

On the other hand, the present invention is characterized in that the crystallization heat treatment requiring the highest temperature heat treatment is performed in an inert atmosphere such as nitrogen or argon. The crystallization heat treatment in this inert atmosphere is performed at 650 to 80 as shown in FIG.
It is desirable to carry out at about 0 ° C. The data in FIG. 17 is obtained by performing a batch crystallization anneal, and Pt / T
iO ₂ / SiO ₂ / Si a MOD solution was applied to a four-layer substrate, 60 minutes crystallization in a nitrogen atmosphere, 550 ° C. in an oxygen atmosphere after forming the upper electrode, which was using a sample subjected to heat treatment for 60 minutes is there.

At this time, crystallization may be performed at once after depositing a film to a desired thickness by repeating coating and drying, or crystallization at each coating and drying step. Also,
The heat treatment time is not particularly limited, and is set to a time capable of sufficient crystallization by heat treatment for several minutes to several hours by a diffusion furnace or heat treatment for several tens seconds to several minutes by RTA.

Normally, the heat treatment for crystallization of the oxide must be performed in an oxidizing atmosphere because oxygen needs to be supplied sufficiently. However, the sol-gel method and MO
In the method D or the like, a large amount of oxygen is contained in a raw material such as a metal alkoxide or a salt, and crystallization is possible even in an inert atmosphere such as nitrogen or argon. However, in order to further improve the ferroelectric characteristics and suppress the leakage current, a heat treatment at about 400 to 650 ° C. is performed after the upper electrode is formed.

In the formation of a ferroelectric thin film by the MOCVD method, a film is deposited at a relatively low substrate temperature of 650 ° C. or less in an oxygen-containing atmosphere to be in an amorphous or weakly crystalline state. The film forming conditions such as the source material used, the flow rate of the carrier gas, the oxygen concentration, and the pressure are such that oxygen is sufficiently taken into the film and sufficient crystallization can be achieved by post-annealing.

Thereafter, post-annealing is performed at about 650 to 800 ° C. in an inert atmosphere such as nitrogen or argon to crystallize the ferroelectric film. The step of depositing and post-annealing such a film may be batch post-annealing after depositing to a desired film thickness, or a method of repeating film deposition and post-annealing several times to obtain a desired film thickness. . After the formation of the upper electrode, a heat treatment at about 400 to 650 ° C. is performed for the purpose of suppressing leak current and replenishing oxygen vacancies.

Also, in the formation of a ferroelectric thin film by a sputtering method, a film is deposited at a relatively low substrate temperature of 650 ° C. or less in an oxygen-containing atmosphere to form an amorphous or weakly crystalline state, as in the MOCVD method. I do.
The film forming conditions such as the source material used, the flow rate of the carrier gas, the oxygen concentration, and the pressure are such that oxygen is sufficiently taken into the film and sufficient crystallization can be achieved by post-annealing.

Thereafter, post annealing is performed at about 650 to 800 ° C. in an inert atmosphere such as nitrogen or argon to crystallize the ferroelectric film. The step of depositing and post-annealing such a film may be batch post-annealing after depositing to a desired film thickness, or a method of repeating film deposition and post-annealing several times to obtain a desired film thickness. . After forming the upper electrode, a heat treatment at about 400 to 650 ° C. is performed for the purpose of suppressing leak current and replenishing oxygen vacancies.

If the above-mentioned method is used, the crystallization heat treatment step of the ferroelectric thin film, which usually requires the highest temperature, is performed in an inert atmosphere such as nitrogen or argon, so that oxidation in the high temperature process is problematic. It is possible to sufficiently suppress damage to the stacked ferroelectric memory element.

(First Embodiment) A manufacturing process of a ferroelectric memory element according to a first embodiment of the present invention will be described below with reference to FIGS.

First, a thermal oxide film (SiO ₂₎ having a thickness of 200 nm is formed on the silicon substrate 1 by performing a heat treatment at 1050 ° C. for 20 minutes in an oxygen atmosphere containing water vapor.
(Film) 2 is formed. Thereafter, Ti is sputtered on the silicon substrate 1 under the conditions of a DC power of 2 kW and a substrate temperature of 400 ° C. to form a 20 nm thick Ti film, and the Ti film is thermally oxidized to form a 40 nm thick TiO 2 film. _{2 An} adhesion layer 3 was formed. Then, Pt was changed to DC power of 2 kW,
Sputtering is performed at a substrate temperature of 500 ° C. to form a lower Pt electrode 4 having a thickness of 200 nm, and Pt / TiO ₂
A / SiO ₂ / Si substrate was prepared (FIG. 2A).

Next, the Pt / TiO ₂ / SiO ₂ / Si
One layer of a MOD solution of ferroelectric SrBi ₂ Ta ₂ O ₉ (composition ratio Sr / Bi / Ta = 8/24/20) formed on the substrate by the above-described method for preparing a raw material solution has a thickness of 50 nm.
After drying at 250 ° C. for 5 minutes, the substrate temperature is reduced to 5 in an atmospheric oxygen atmosphere.
Preliminary calcination was performed at 00 ° C. for 30 minutes. Further, heat treatment at 700 ° C. for 60 minutes in a nitrogen atmosphere at normal pressure allows SrB
The i ₂ Ta ₂ O ₉ film 7 was crystallized (FIG. 2B).

A series of steps from the application to the heat treatment in a nitrogen atmosphere are repeated for each application, and a film thickness of 2
It was about 00 nm (FIG. 2C).

On the SrBi ₂ Ta ₂ O ₉ film 5, P
t was formed by sputtering under the conditions of a DC power of 2 kW and a substrate temperature of 500 ° C., and further processed by a known dry etching method to form an upper Pt electrode 6 (FIG. 2).
(D)). An ECR etcher was used for dry etching, and the gas used was a mixed gas of C ₂ F ₆ , CHF ₃ and Cl ₂ .

Thereafter, in order to suppress the leakage current, heat treatment is performed in a normal pressure nitrogen atmosphere at a substrate temperature of 550 ° C. for 60 minutes.

The area of the upper electrode of the ferroelectric capacitor element manufactured by the above method was 1 × 10 ⁻⁴ cm ² .

FIGS. 3 and 4 show the hysteresis characteristics (when ± 3 V is applied) and the leakage current characteristics of the ferroelectric capacitor element, respectively. The ferroelectric property is Pr = 4.9 μC /
cm ² , Vc = 0.48 V (or Ec = 24 kV /
cm), and the leak current density when +3 V is applied is 3 × 1
0 ^-8 A / cm ² , and the withstand voltage was 20 V or more. Thus, although the device in the first embodiment has a smaller Pr compared to the third embodiment in which only the heat treatment atmosphere after the formation of the upper Pt electrode is different from the third embodiment, the leakage current density,
It can be seen that the dielectric strength is good.

Further, in the first embodiment, the inert atmosphere in the heat treatment for crystallization of the ferroelectric thin film was a nitrogen atmosphere, but the same result was obtained when the inert atmosphere was replaced with an argon atmosphere.

The ferroelectric thin film is made of SrBi ₂ Ta ₂
Although using O _9, by replacing part of Ta to Nb Sr
When Bi ₂ (Ta _1-x Nb _x ) ₂ O ₉ (x = 0.4) is used, Pr = 6 μC / cm ² , Vc = 0.72 V (or Ec = 35 kV / cm), and +3 V applied Had a leakage current density of 8 × 10 ⁻⁸ A / cm ² and a withstand voltage of 20 V or more. Thus, SrBi ₂ (Ta _1-x Nb _x ) ₂ O
₉ (x = 0.4), it can be seen that good ferroelectric characteristics can be obtained by the manufacturing method used in this example. In addition, good ferroelectric properties were obtained in the range of 0 <x ≦ 1 even when the concentration of Nb was further increased.

(Second Embodiment) A manufacturing process of a ferroelectric memory element according to a second embodiment of the present invention will be described below with reference to FIGS.

First, a thermal oxide film (SiO ₂₎ having a thickness of 200 nm is formed on the silicon substrate 1 by performing a heat treatment at 1050 ° C. for 20 minutes in an oxygen atmosphere containing water vapor.
(Film) 2 is formed. Thereafter, Ti is sputtered on the silicon substrate 1 under the conditions of a DC power of 2 kW and a substrate temperature of 400 ° C. to form a 20 nm thick Ti film, and the Ti film is thermally oxidized to form a 40 nm thick TiO 2 film. _{2 An} adhesion layer 3 was formed. Then, Pt was changed to DC power of 2 kW,
Sputtering is performed at a substrate temperature of 500 ° C. to form a lower Pt electrode 4 having a thickness of 200 nm, and Pt / TiO ₂
A / SiO ₂ / Si substrate was prepared (FIG. 6A).

Next, the Pt / TiO ₂ / SiO ₂ / Si
On a substrate, a MOD solution (composition ratio Sr / B) of ferroelectric SrBi ₂ Ta ₂ O ₉ prepared in the same manner as in the first embodiment.
i / Ta = 8/24/20) is applied so that one layer has a thickness of about 50 nm, and a drying process at 250 ° C. for 5 minutes is repeated four times to obtain a desired film thickness of about 200 nm. Then, calcination was performed to decompose residual organic matter in the film by heat treatment at a substrate temperature of 500 ° C. for 30 minutes (FIG. 6B).

Thereafter, in a nitrogen atmosphere at normal pressure, a heat treatment was performed at a substrate temperature of 700 ° C. for 60 minutes to obtain SrBi ₂
The Ta ₂ O ₉ film 5 was crystallized. In addition, this SrBi ₂ T
a ₂ O ₉ film 5 with Pt DC power 2 kW, substrate temperature 50
The upper Pt electrode 6 was formed by sputtering at 0 ° C. and further processed by a known dry etching method. An ECR etcher was used for dry etching, and the gas used was a mixed gas of C ₂ F ₆ , CHF ₃ and Cl ₂ . Thereafter, a heat treatment was performed at a substrate temperature of 550 ° C. for 30 minutes in a normal pressure oxygen atmosphere for the purpose of suppressing leakage current and stabilizing ferroelectric characteristics by supplementing oxygen vacancies (FIG. 6C). In FIG. 6C, reference numeral 5a denotes SrBi ₂ Ta ₂ O that has been annealed in an oxygen atmosphere.
_{Shows 9} membranes.

The area of the upper electrode of the ferroelectric capacitor element manufactured by the above method was 1 × 10 ⁻⁴ cm ² . FIG. 7 shows an XRD pattern of the ferroelectric thin film manufactured in this step. According to FIG. 7, (105) of SrBi ₂ Ta ₂ O ₉
Strong peaks for reflection on the (110) plane, (200) plane, and the like are seen, indicating that SrBi ₂ Ta ₂ O ₉ is sufficiently crystallized.

FIGS. 8 and 9 show a hysteresis characteristic (when ± 3 V is applied) and a leakage current characteristic of the ferroelectric capacitor element, respectively. Ferroelectric property: Pr = 10.2μC
/ Cm ² , Vc = 0.68 V (or Ec = 34.2)
kV / cm), the leak current density when +3 V was applied was 5 × 10 ⁻⁸ A / cm ² , and the withstand voltage was about 16 V.
This indicates that the device according to the second embodiment has good hysteresis characteristics, leak current density, and dielectric strength.

In the second embodiment, the inert atmosphere in the heat treatment for crystallization of the ferroelectric thin film was a nitrogen atmosphere, but the same result was obtained when the atmosphere was changed to an argon atmosphere.

The ferroelectric thin film is made of SrBi ₂ Ta ₂
Although using O _9, by replacing part of Ta to Nb Sr
When Bi ₂ (Ta _1-x Nb _x ) ₂ O ₉ (x = 0.4) is used, Pr = 13.5 μC / cm ² and Vc = 0.83 V
(Or Ec = 41.7 kV / cm), the leak current density when +3 V was applied was 8 × 10 ⁻⁸ A / cm ² , and the withstand voltage was about 15 V. Thus, SrBi ₂ (Ta _1-x
As for Nb _x ) ₂ O ₉ (x = 0.4), it can be seen that good ferroelectric properties can be obtained by the manufacturing method used in this example. In addition, even if the concentration of Nb is further increased,
Good ferroelectric properties were obtained in the range of <x ≦ 1.

Third Embodiment Hereinafter, FIGS. 10 and 11 will be described.
The manufacturing process of the ferroelectric memory element according to the third embodiment of the present invention will be described with reference to FIGS.

First, in the same manner as in the first embodiment, Pt
/ TiO ₂ / SiO ₂ / Si substrate was prepared (FIG. 11).
(A)).

Next, the Pt / TiO ₂ / SiO ₂ / Si
On a substrate, a MOD solution (composition ratio Sr / B) of ferroelectric SrBi ₂ Ta ₂ O ₉ prepared in the same manner as in the first embodiment.
i / Ta = 8/24/20) so that one layer has a thickness of about 50 nm. After a drying step at 250 ° C. for 5 minutes, the substrate temperature is set to 500 ° C. for 30 hours in an atmospheric oxygen atmosphere.
Preliminary baking was performed to decompose residual organic matter in the film by heat treatment for one minute. Then, in a normal pressure nitrogen atmosphere,
SrB by heat treatment at a substrate temperature of 700 ° C. for 60 minutes
The i ₂ Ta ₂ O ₉ film 7 was crystallized (FIG. 11B). A series of steps from the application to the heat treatment in a nitrogen atmosphere was repeated for each application, and the film thickness was 200 nm by four applications (FIG. 11C).

The Pr on the SrBi ₂ Ta ₂ O ₉ film 7
t was formed by sputtering under the conditions of a DC power of 2 kW and a substrate temperature of 500 ° C., and further processed by a known dry etching method to form an upper Pt electrode 6. ECR etcher is used for dry etching, gas used is C ₂ F ₆ ,
A mixed gas of CHF ₃ and Cl ₂ was used. Thereafter, a substrate temperature of 550 in a normal pressure oxygen atmosphere for the purpose of suppressing leakage current and stabilizing ferroelectric characteristics by supplementing oxygen vacancies.
Heat treatment was performed at 30 ° C. for 30 minutes (FIG. 11D).
In FIG. 11D, reference numeral 7a denotes an SrBi ₂ Ta ₂ O ₉ film that has been annealed in an oxygen atmosphere.

The upper electrode area of the ferroelectric capacitor element manufactured by the above method was set to 1 × 10 ⁻⁴ cm ² . The XRD pattern of the ferroelectric thin film manufactured in this step is shown in FIG.
Shown in FIG. 12 shows that (10) of SrBi ₂ Ta ₂ O ₉
Strong peaks for reflection on the 5) plane, the (110) plane, the (200) plane, and the like are observed, and SrBi ₂ as in the second embodiment.
It can be seen that Ta ₂ O ₉ is sufficiently crystallized.

FIGS. 13 and 14 show the hysteresis characteristics (when ± 3 V is applied) and the leakage current characteristics of the ferroelectric capacitor element, respectively. The ferroelectric property is Pr = 8.
6 μC / cm ² , Vc = 0.69 V (or Ec = 3
(4.6 kV / cm), the leak current density when +3 V was applied was 5 × 10 ⁻⁸ A / cm ² , and the withstand voltage was 20 V or more. This indicates that the device of the third embodiment has good hysteresis characteristics, leak current density, and dielectric strength. In particular, the withstand voltage of about 16 V in the second embodiment is 20 V or more in the third embodiment, and it can be seen that a film having excellent withstand voltage can be obtained. Further, in the third embodiment, the inert atmosphere in the heat treatment for crystallization of the ferroelectric thin film was a nitrogen atmosphere, but the same result was obtained when the atmosphere was changed to an argon atmosphere.

The above ferroelectric thin film is made of SrBi ₂ Ta ₂
Although using O _9, by replacing part of Ta to Nb Sr
When Bi ₂ (Ta _1-x Nb _x ) ₂ O ₉ (x = 0.4) is used, Pr = 10.2 μC / cm ² and Vc = 0.85 V
(Or Ec = 42.8 kV / cm), the leak current density when applying +3 V was 8 × 10 ⁻⁸ A / cm ² , and the dielectric strength was 20 V or more. Thus, SrBi ₂ (Ta
_{As for 1-x} Nb _x ) ₂ O ₉ (x = 0.4), it can be seen that good ferroelectric characteristics can be obtained by the manufacturing method used in this example. In addition, good ferroelectric properties were obtained in the range of 0 <x ≦ 1 even when the concentration of Nb was further increased.

(Fourth Embodiment) Hereinafter, FIGS. 15 and 16 will be described.
The manufacturing process of the ferroelectric memory element according to the fourth embodiment of the present invention will be described with reference to FIG.

First, as shown in FIG. 15A, a switching transistor is formed by a well-known MOSFET forming process, and is covered with an interlayer insulating film. Then, only the portion where the bit line contacts the impurity diffusion region 11 of the substrate is formed. A contact hole 27 is formed by using a known photolithography method and a dry etching method, and polysilicon, in which impurities are diffused, is embedded. Then, a known CMP (Chemical Me
As shown in FIG. 15B, the surfaces of the interlayer insulating film 14 and the polysilicon plug 15 were flattened by a mechanical polishing method. Next, as shown in FIG. 15C, a TaSiN barrier metal layer 16 is deposited by a known sputtering method to a thickness of 2000.degree.
An IrO ₂ film 18 and a Pt film 19 are deposited at 500 °, 1000 °, and 500 ° by a known sputtering method, respectively.
A multilayer lower electrode of t / IrO ₂ / Ir / TaSiN was formed. Here, Ir and IrO ₂ are provided in order to prevent oxidation of the barrier metal due to heat treatment in a high-temperature oxygen atmosphere. Sr on the lower electrode as a ferroelectric film.
The Bi ₂ Ta ₂ O ₉ film 20 is formed. As in the third embodiment, the ferroelectric film was crystallized each time the MOD solution was applied, as in the third embodiment. That is, a MOD solution (composition ratio Sr / Bi / T) prepared in the same manner as in the first embodiment.
a = 8/24/20) is applied so that one layer has a thickness of about 50 nm, and after a drying step at 250 ° C. for 5 minutes, a heat treatment is performed in a normal pressure oxygen atmosphere at a substrate temperature of 500 ° C. for 30 minutes. Calcination for decomposing the residual organic matter in the film. Thereafter, in a nitrogen atmosphere at normal pressure, a heat treatment is performed for 60 minutes at a substrate temperature of 700 ° C. for SrBi ₂ T.
The a ₂ O ₉ film 7 was crystallized. A series of steps from the application to the heat treatment in a nitrogen atmosphere was repeated for each application, and the film thickness was 200 nm in four applications.

Next, an upper Pt electrode 21 having a thickness of 1000 °
Was formed and processed into a size of 1.7 μm square using known photolithography and dry etching.
Thereafter, a heat treatment was performed at a substrate temperature of 550 ° C. for 30 minutes in a normal pressure oxygen atmosphere for the purpose of suppressing leakage current and stabilizing ferroelectric characteristics by supplementing oxygen vacancies.

Next, the SrBi ₂ Ta ₂ O ₉ film 20, the Pt film 19, the IrO ₂ film 18, the Ir film 17, and the TaSiN barrier metal layer 16 were formed into a 2.0 μm square by a known photolithography method and a dry etching method. 15 (c) to obtain a shape as shown in FIG. ECR etcher is used for dry etching, and gas used is SrB
For the i ₂ Ta ₂ O ₉ film 20, a mixed gas of Ar, Cl ₂ and CF ₄ , a Pt film 19, an IrO ₂ film 18 and an Ir film 17
For mixed gas of C ₂ F ₆ , CHF ₃ and Cl ₂ , Ta
Cl ₂ was used for the SiN barrier metal layer 16.

Next, as shown in FIG.
A TiO ₂ barrier insulating film 22 having a thickness of 100 ° is deposited by using a known sputtering method.
A silicon oxide film 23 of 0 ° is deposited by a known CVD method, and then is formed on the SrBi ₂ Ta ₂ O ₉ film by a known photolithography method and a dry etching method.
A μm square contact hole 28 was formed.

Next, as shown in FIG.
After forming an Al electrode 24 having a thickness of 2,000 ° and processing it using a known photolithography method and a dry etching method to form a plate line, the plate electrode is formed at a temperature of 400 ° C. in a normal pressure nitrogen atmosphere at 400 ° C.
The heat treatment was performed for 2 minutes to stabilize the electrode interface. afterwards,
As shown in FIG. 16B, by a known flattening technique,
An interlayer insulating film 25 is deposited using a CVD method, planarized, and a contact hole 29 to the other impurity diffusion layer of the switching transistor is formed using a known photolithography method and a dry etching method. FIG.
As shown in (c), the bit line 26 was formed by using a known Al wiring technique to complete a ferroelectric memory element.

When the ferroelectric characteristics (shown in FIGS. 17 and 18) of the nonvolatile semiconductor memory device thus manufactured were measured, Pr = 7.5 μC / c at an applied voltage of ± 3 V.
The values of m ² and Ec = 35.8 kV / cm were obtained, and sufficient operation as a ferroelectric capacitor was confirmed. Next, the leak current density of the ferroelectric memory element was measured. The leak current density at an applied current of +3 V is 5 × 10 ⁻⁸
A / cm ² , and dielectric breakdown did not occur even at an applied voltage of 10 V, confirming sufficient characteristics as a ferroelectric capacitor.

[0067] multilayer lower electrode of a ferroelectric capacitor prepared above _has been a Pt / IrO 2 / Ir / TaSiN , not limited _{thereto, Ir / IrO 2 / Ir /} TaSi
N, IrO ₂ / Ir / TaSiN, or Pt / RuO ₂
/ Ru / TaSiN, Ru / RuO ₂ / Ru / TaSi
N, RuO ₂ / Ru / TaSiN, Pt / IrO ₂ / Ir
/ TiN, Ir / IrO ₂ / Ir / TiN, IrO ₂ / I
r / TiN, Pt / RuO ₂ / Ru / TiN, Ru / R
uO ₂ / Ru / TiN, RuO ₂ / Ru / TiN, and Ir / TaSiN, Ir / TiN, Ru / TaSi
Any kind of multilayer electrode having excellent heat resistance, such as N or Ru / TiN, may be used.

In the present embodiment, the inert atmosphere in the heat treatment for crystallization of the ferroelectric film was a nitrogen atmosphere, but the same result was obtained when the atmosphere was changed to an argon atmosphere. Although the above ferroelectric uses SrBiTaO, SrBi ₂ (T
The same effect was obtained with a _1-x Nb _x ) ₂ O ₉ (0 <x ≦ 1).

As a comparative example of the fourth embodiment, SrBi ₂ Ta _{2 was used} in the ferroelectric memory element manufacturing process.
The crystallization heat treatment step for forming the O ₉ film was changed from a heat treatment in a normal pressure nitrogen atmosphere to a heat treatment in a normal pressure oxygen atmosphere. First,
When the crystallization heat treatment step of SrBi ₂ Ta ₂ O ₉ was performed at 650 ° C. for 60 minutes in an oxygen atmosphere, peeling occurred at each portion in the wafer surface due to film expansion due to oxidation of TaSiN.

When the crystallization heat treatment step of SrBi ₂ Ta ₂ O ₉ was performed at 650 ° C. for 60 minutes in a nitrogen atmosphere, no delamination occurred, but crystallization of SrBi ₂ Ta ₂ O ₉ did not occur. Even when the ferroelectric characteristics of the manufactured ferroelectric memory element were measured, no hysteresis characteristics were obtained. When the crystallization step of SrBi ₂ Ta ₂ O ₉ is performed in an oxygen atmosphere, peeling occurs around a heat treatment temperature at which hysteresis characteristics can be obtained, and ferroelectric memory having good ferroelectric characteristics. The device could not be manufactured.

[0071]

As described in detail above, by using the present invention, the ferroelectric film can be crystallized without oxidizing the underlayer of the lower electrode, so that the ferroelectric characteristics are excellent. A ferroelectric capacitor and a nonvolatile semiconductor memory element having a stacked structure including the ferroelectric capacitor can be manufactured with high yield.

Further, by using the present invention according to claims 2 and 5, oxygen vacancies in the ferroelectric film can be supplemented, so that the ferroelectric characteristics can be further improved.

Further, by using the present invention described in claim 3, a ferroelectric film can be formed with good control even when the desired thickness is large.

Further, by using the present invention described in claim 4 and claim 6, the morphology is improved, and the withstand voltage can be further improved.

Further, according to the present invention, annealing for supplementing oxygen deficiency of the ferroelectric film is performed by annealing for suppressing leakage current at the interface between the ferroelectric film and the upper electrode. The ferroelectric properties can be improved without increasing the number of steps because they can be used for both purposes.

Further, by using the present invention described in claim 8, it is possible to obtain a ferroelectric capacitor which has good fatigue characteristics and can be driven at a low voltage.

Further, by using the present invention described in claim 9, a ferroelectric capacitor which has better fatigue characteristics and can be driven at a low voltage can be obtained.

Further, by using the present invention according to claim 10, when TaSiN is used for the barrier metal layer, the ferroelectric characteristics can be improved without particularly oxidizing the barrier metal layer.

[Brief description of the drawings]

FIG. 1 is a flowchart showing a manufacturing process flow of a ferroelectric capacitor according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing a manufacturing process of the ferroelectric capacitor according to the first embodiment of the present invention.

FIG. 3 is a diagram showing hysteresis characteristics of the ferroelectric capacitor according to the first embodiment of the present invention.

FIG. 4 is a diagram showing a leakage current characteristic of the ferroelectric capacitor according to the first embodiment of the present invention.

FIG. 5 is a flowchart showing a manufacturing process flow of a ferroelectric capacitor according to a second embodiment of the present invention.

FIG. 6 is a cross-sectional view illustrating a manufacturing process of a ferroelectric capacitor according to a second embodiment of the present invention.

FIG. 7 shows the X of the ferroelectric film according to the second embodiment of the present invention.
It is a figure showing an RD pattern.

FIG. 8 is a diagram showing a hysteresis characteristic of the ferroelectric capacitor according to the second embodiment of the present invention.

FIG. 9 is a diagram showing a leakage current characteristic of a ferroelectric capacitor according to a second embodiment of the present invention.

FIG. 10 is a flowchart illustrating a manufacturing process flow of a ferroelectric capacitor according to a third embodiment of the present invention.

FIG. 11 is a sectional view showing a manufacturing process of a ferroelectric capacitor according to a third embodiment of the present invention.

FIG. 12 is a view showing an XRD pattern of a ferroelectric film according to a third embodiment of the present invention.

FIG. 13 is a diagram showing a hysteresis characteristic of a ferroelectric capacitor according to a third embodiment of the present invention.

FIG. 14 is a diagram showing a leakage current characteristic of a ferroelectric capacitor according to a third embodiment of the present invention.

FIG. 15 is a diagram showing the first half of the manufacturing process of the nonvolatile semiconductor memory element according to the fourth embodiment of the present invention.

FIG. 16 is a diagram illustrating a second half of the manufacturing process of the nonvolatile semiconductor memory element according to the fourth embodiment of the present invention;

FIG. 17 is a diagram illustrating a hysteresis characteristic of a ferroelectric capacitor according to a fourth embodiment of the present invention.

FIG. 18 is a diagram showing a leakage current characteristic of a ferroelectric capacitor according to a fourth embodiment of the present invention.

FIG. 19 is a diagram showing a relationship between a crystallization heat treatment temperature and a leak current density.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 silicon substrate 2 thermal oxide film 3 TiO ₂ adhesion layer 4 lower Pt electrode 5 SrBi ₂ Ta ₂ O ₉ film in crystallized state after repeated coating and drying a plurality of times 6, _8, 21 upper Pt electrode 7 once SrB in a crystallized state after coating and drying
i ₂ Ta ₂ O ₉ film 9 channel portion of switching transistor 10 element isolation region 11, 12 impurity diffusion region of switching transistor 13 gate portion of switching transistor 14, 23, 25 interlayer insulating film 15 polysilicon plug 16 TaSiN barrier Metal layer 17 Ir layer 18 IrO ₂ layer 19 Pt layer 20 SrBi ₂ Ta ₂ O ₉ film 22 TiO ₂ barrier insulating layer 24 Plate line (Al wiring) 26 Bit line (Al wiring) 27 Contact hole for polysilicon plug 28 Plate line Contact hole for bit 29 Contact hole for bit line

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code FI H01L 21/8247 29/788 29/792

Claims (11)

[Claims] A step of forming a ferroelectric film on a lower electrode, a step of crystallizing the ferroelectric film by heat treatment in an inert gas atmosphere, and a step of forming an upper electrode on the ferroelectric film. Forming a ferroelectric capacitor. 2. After the crystallization step, in an oxygen atmosphere,
2. The method according to claim 1, further comprising a step of performing a heat treatment for replenishing oxygen deficiency in the ferroelectric film at a temperature at which a base of the lower electrode is not oxidized. 3. The step of forming the ferroelectric film on the lower electrode includes repeating a step of applying a ferroelectric film material to a predetermined film thickness using a coating film forming method and then drying the material.
The method for forming a ferroelectric capacitor according to claim 1, wherein the method is a step of forming a ferroelectric film having a desired film thickness. 4. A step of forming a ferroelectric film having a predetermined thickness on the lower electrode and then performing a heat treatment in an inert gas atmosphere to crystallize the ferroelectric film, thereby obtaining a desired film thickness. Forming a ferroelectric film, and forming an upper electrode on the ferroelectric film. 5. After forming the ferroelectric film having the desired thickness, a heat treatment for replenishing oxygen deficiency of the ferroelectric film is performed in an oxygen atmosphere at a temperature at which a base of the lower electrode is not oxidized. The method for forming a ferroelectric capacitor according to claim 4, comprising a step. 6. The method for forming a ferroelectric capacitor according to claim 4, wherein the ferroelectric film is formed by a coating method. 7. The ferroelectric according to claim 2, wherein the heat treatment for supplementing the oxygen deficiency is performed after the formation of the upper electrode. A method for forming a capacitor. 8. The method according to claim 1, wherein the ferroelectric film is a bismuth-based layered compound. 9. The bismuth-based layered structure compound is SrB
_{9. The} method according to claim 8, wherein i ₂ (Ta _1-x Nb _x ) ₂ O ₉ (0 ≦ x ≦ 1). 10. The ferroelectric capacitor according to claim 1, wherein the heat treatment for crystallization of the ferroelectric film is performed at a temperature of 650 ° C. to 800 ° C. Formation method. 11. After forming a select transistor on a semiconductor substrate and forming an interlayer insulating film on the select transistor,
A conductive plug or the conductive plug and a conductive barrier layer are formed so as to be electrically connected to the semiconductor substrate in a contact hole formed in the interlayer insulating film, and the conductive plug or the conductive plug and the conductive plug are formed. After forming the lower electrode so as to be electrically connected to the conductive barrier layer,
11. A method for manufacturing a nonvolatile semiconductor memory device, comprising forming a ferroelectric capacitor by the steps according to claim 1.