JPH11186224A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device, which can raise significantly the selection of etching of a silicon oxide film to a silicon nitride film and can effectively etch the flat silicon film formed on the silicon nitride film having steps and by a simple method. SOLUTION: A method of manufacturing a semiconductor device, which is constituted by such a method that the surface of a semiconductor substrate 10 is treated by a reactive ion etching, consists of a first process of etching selectively a silicon oxide film on the upper flat surface of a silicon nitride film 30 having steps using first treatment gas containing fluorocarbon gas not having a hydrogen bond and a second process of etching selectively the remnant of the silicon oxide film and the lower flat surface of the film 30 having the steps on the sidewalls of the film 30, which is not etched in the first process and has the steps, using second treatment gas containing fluorocarbon gas having a hydrogen bond and CO gas.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device in which the surface of a semiconductor substrate is treated by, for example, reactive ion etching using a fluorocarbon-based gas.
This is used when a contact hole such as a bit line contact in a DRAM is formed by using an aligned contact hole etching process.

[0002]

2. Description of the Related Art Generally, a semiconductor device having an integrated circuit such as a DRAM has a contact penetrating an insulating film located between gates of adjacent field effect transistors and electrically connected to a drain diffusion region. ing. The contact plays a role of extracting an electrode from the drain diffusion region to connect the drain diffusion region to the metal wiring layer.

In manufacturing such a semiconductor device, in order to achieve high integration by minimizing the distance between adjacent gates and the like and minimizing the area of contact holes formed in an insulating film located between the gates. SAC etching is used.

As etching, reactive ion etching (RIE) using a fluorocarbon-based gas is mainly used. Silicon nitride film as base stopper
When etching a silicon oxide film thereon, a high etching selectivity with respect to the underlying silicon nitride film is required.

[0005] In the above-mentioned RIE, for example, a fluorocarbon-based CHF ₃ generally used conventionally.
The etching selectivity of the silicon oxide film to the silicon nitride film in the plasma discharge of the mixed gas of CO and CO is about 0.5.
The etching selectivity in the case of using a mixed gas of C ₄ F ₈ / CO / Ar was about 12.

The SAC has a problem that a short circuit between a metal wiring layer having a high step and a gate electrode is induced due to a critical area deviation of a mask, a misalignment tolerance, a lens distortion and a thick insulating layer. .

FIG. 1 shows four bit line regions (B) arranged between active regions (A) having a predetermined width, and adjacent bit line regions, etc., so that the upper and lower corners of the bit lines overlap with each other. 1 shows a semiconductor device having a contact region (C) and the like arranged in FIG.

FIGS. 2 to 5 are sectional views taken along the line aa 'of FIG. With reference to these drawings, a conventional SAC manufacturing process will be described.

FIG. 2 shows a semiconductor substrate including a substrate 10 on which an impurity diffusion region 11 is formed. The impurity diffusion region 11 is located in the active region shown in FIG. 1, and is further separated by a field oxide film (not shown) formed in a field region (not shown). On a substrate 10, a first insulating layer 12, a first conductive layer 13, and a second insulating layer 14 are sequentially formed.

As shown in FIG. 3, the first insulating layer 12, the first conductive layer 13 and the second insulating layer 14 are composed of a first insulating layer pattern 12A, a first conductive layer pattern 13A and a second Are separated to form the insulating layer pattern 14A. The first insulating layer pattern 12A, the first conductive layer pattern 13A, and the second insulating layer pattern 14A are formed on the first insulating layer 12, the first insulating layer 12 located on the impurity diffusion region by using a bit line mask. Conductive layer 13 and second
Is formed by etching the insulating layer 14 of FIG.
The first conductive layer pattern 13A is used for a bit line. A third insulating layer 15 is formed on the surface of the substrate 10 on which the first insulating layer pattern 12A, the first conductive layer pattern 13A, and the second insulating layer pattern 14A are formed. A photosensitive film pattern 16 for a contact mask is formed on 15.

The third exposed between the photosensitive film patterns 16
Contact hole 20 formed by etching insulating layer 15 so that the upper part of second insulating layer pattern 14A and the surface of impurity diffusion region 11 are exposed.
FIG. 4 shows a spacer 15A formed of a part of the third insulating layer. The photoresist pattern 16 shown in FIG. 3 is removed after the etching process. The spacer 15A is located on the side wall of the first insulating layer pattern 12A, the first conductive layer pattern 13A, and the second insulating layer pattern 14A.

Further, a metal material is deposited in the contact hole 20 to form a second conductive layer 17, and the photosensitive film pattern 1 for a storage electrode mask is formed on the second conductive layer 17.
8 is formed.

As shown in FIG. 5, the second conductive layer pattern 17A is formed by selectively etching the second conductive layer pattern 17A exposed between the photosensitive film patterns 18 shown in FIG. Is done. The photosensitive film pattern 18
The second conductive layer 17 is removed after the etching step. Furthermore, the residue 17 </ b> B of the third conductive layer that is not removed during the etching step of the second conductive layer 17 and remains at the step portion of the third insulating layer 15 is formed on the surface of the third insulating layer 15. It is formed in a relatively large step. The residue 17B of the second conductive layer short-circuits other wiring lines and the like formed in the step subsequent to the contact forming step and causes a failure of the semiconductor device.

As described above, according to the conventional method of manufacturing a semiconductor device, a good contact hole cannot be formed particularly in the case of a structure having a step.

[0015]

As described above, the structure of a silicon nitride film having a step has been conventionally known because of its structure. It was difficult to selectively etch the lower flat surface of the film. The inventor has
This has been found to be caused not only by the etching selectivity of the silicon oxide film to the silicon nitride film but also to the low etching selectivity of the lower flat surface of the silicon nitride film to the upper flat surface and the side walls of the silicon nitride film.

According to the present invention, not only can the etching selectivity of a silicon oxide film to a silicon nitride film be greatly improved, but also a flat silicon oxide film formed on a silicon nitride film having a step, It is an object of the present invention to provide a method of manufacturing a semiconductor device capable of etching a lower flat surface effectively and simply.

[0017]

In order to achieve the above-mentioned object, a method of manufacturing a semiconductor device according to the present invention is characterized in that, when the surface of a semiconductor substrate is treated by reactive ion etching, A first step of selectively etching a silicon oxide film on an upper flat surface of a silicon nitride film having a step using a first processing gas containing a fluorocarbon-based gas having no hydrogen bond; Using a second processing gas containing a fluorocarbon-based gas and a CO gas, the silicon oxide film selectively on an upper flat surface and a side wall of a silicon nitride film having a step not etched in the first step And the second step of etching the lower flat surface of the silicon nitride film having the step.

In the method of manufacturing a semiconductor device according to the present invention, a step (upper flat surface, side wall, lower flat surface) is formed along a gate electrode formed on a surface of a silicon substrate via a gate insulating film. In the case where a silicon nitride film is formed, a flat silicon oxide film is formed on the silicon nitride film, and a contact hole is formed in the silicon oxide film in a self-aligned manner with respect to a gate electrode,
_In a mixed gas plasma of ₄ F ₈ / Ar or C ₄ F ₈ / CO / Ar, the silicon oxide film is selectively etched with respect to the upper flat surface of the silicon nitride film. After exposure to plasma, CHF ₃ /
In a mixed gas plasma of CO, the remaining flat portion and the lower flat surface of the silicon oxide film are selectively etched with respect to the upper flat surface and the side wall of the silicon nitride film.

According to the method of manufacturing a semiconductor device of the present invention, the etching rate can be suppressed depending on the portion of the silicon nitride film as well as the etching of the silicon nitride film with a high selectivity relative to the silicon oxide film. Thus, it is possible to sufficiently secure an etching selectivity of the lower flat surface of the silicon nitride film with respect to the upper flat surface and the side wall of the silicon nitride film.

[0020]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 6 shows an embodiment of the present invention.
DRA by RIE using fluorocarbon-based gas
5 shows a process for forming a contact hole such as a bit line contact in M.

After an impurity diffusion layer 11 serving as a source / drain region is formed on a silicon substrate 10, a first insulating layer 12 and a first conductive layer 13A are sequentially formed. Next, the portion of the first conductive layer 13A located on the impurity diffusion layer 11 is etched using the bit line mask. A nitride film 30 is formed on the first conductive layer 13A,
A second insulating layer 14 made of, for example, a silicon oxide film having good flatness such as G, SOG, and APL is formed. However,
Even if the film has poor flatness, the film can be used as the second insulating layer 14 by performing a flattening process by resist etch back or CMP.

As shown in FIG. 7, using a photosensitive film pattern 16 for a contact mask formed on the second insulating layer 14 as a mask, a gas system mainly composed of C ₄ F ₈ containing no hydrogen (that is, C ₄ F 8). ₈ / CO / Ar). For example, the flow rate of this gas is 10/100/200 secm, the pressure is 40 mTorr, and RF. The output is 850W. The temperature of the substrate is about 20 ° C.

When the flat nitride film 30 on the first conductive layer 13A is exposed, it functions as an etch stopper. Here, the gas is converted to a gas system mainly composed of CHF ₃ (that is, C
HF ₃ / CO), and the nitride film 30 is self-aligned.
Impurity diffusion layer 1 selectively with respect to the upper flat surface and side wall of
The lower flat surface of the nitride film 30 and the first insulating layer 12 are etched until the surface of the first insulating layer 12 is exposed. For example, the flow rate of this gas is 45/155 secm, the pressure is 40 mRorr,
RF. The output is 800 W.

Next, as shown in FIGS. 8 and 9, the photosensitive film 16 for the contact mask is removed, a metal material is deposited to form a second conductive layer 17, and the photosensitive film pattern 18 is used as a mask. After etching the metal material, the photosensitive film pattern 18 is removed, and a wiring is formed.

The timing of gas in RIE is detected relatively accurately by monitoring a change in CO, which is reduced by exposing the surface of the nitride film to plasma, as an end point by emission spectroscopy or the like. be able to.

By switching the conditions in the course of the etching, the first insulating layer is patterned with high selectivity, that is, while the amount of etching of the nitride film (etching rate) is suppressed, the first insulating layer is etched. A contact hole can be formed in self-alignment with conductive layer 12A.

As a result, the execution of the SAC etching process can be reliably performed, so that the cell size can be significantly reduced and a small and highly reliable DRAM can be obtained.

The etching selectivity of the silicon oxide film to the silicon nitride film in the method of manufacturing a semiconductor device according to the present invention is shown in Table 1 by comparing the present invention with the prior art.

[Table 1] Under the plasma conditions of the gas system of the present invention, the etching rate of the silicon nitride film on the upper flat surface and the side wall decreases extremely, while the etching rate of the silicon oxide film hardly drops. For this reason, the etching selectivity with respect to the silicon nitride film can be significantly improved as compared with the prior art.

Here, C ₄ F in the present invention described above is used.
_During etching with a mixed gas of ₈ / CO / Ar, C
The reason why patterning of the silicon nitride film can be performed with high selectivity by switching to etching with a mixed gas of HF ₃ / CO will be considered.

Table 2 shows the results of ESCA analysis of the composition of the reaction product film on the silicon nitride film under the plasma conditions of each gas system.

[0032]

[Table 2] In the result of this analysis, a large value of Si or N means that the underlying silicon nitride film is easy to see and the thickness of the reaction product film deposited on the silicon nitride film is small.

Further, a large C / F ratio means that the degree of bonding as an organic film is high, and that the reaction product film is strong.

From the above, under the plasma conditions of the gas system of C ₄ F ₈ / CO / Ar, the reaction product film growing on the silicon nitride film is thick, but the film is weak and the CHF ₃ / CO Under the plasma conditions of the gas system, the reaction product film is thin but strong.

Therefore, etching is performed using a mixed gas of C ₄ F ₈ / CO / Ar, and thereafter, CHF ₃ / C
Under plasma conditions using the gas system of the present invention in which etching is performed using a mixed gas of O, theoretically, a thick but weak (low C / F ratio) reaction product film and a thin but strong reaction film are formed on a silicon nitride film. The reaction product film (having a large C / F ratio) is formed continuously.

This is equivalent to forming a considerably thick and strong reaction product film on the silicon nitride film, and thus, the silicon nitride film can be sufficiently protected from ion bombardment. It is considered that the etching rate decreases.

That is, under the plasma conditions of the gas system of the present invention, first, etching is performed using a mixed gas of C ₄ F ₈ / CO / Ar to form a thick reaction product film on the silicon nitride film. , On which CHF ₃ / CO
By performing etching while growing a strong reaction product film using a mixed gas of the above, the impact of ions on the silicon nitride film is reduced, thereby suppressing the etching rate of the silicon nitride film and excessively increasing the silicon nitride film. This makes it possible to prevent etching.

In addition, since the etching selectivity with respect to the silicon nitride film having a step is improved, the silicon oxide film can be patterned with high selectivity. Can be formed.

As described above, it becomes possible to suppress the etching rate of the silicon nitride film.
The SAC etching process can be performed with high accuracy.

In the embodiment of the present invention, a mixed gas of C ₄ F ₈ / CO / Ar is used as the first processing gas, and a mixed gas of CHF ₃ / CO is used as the second processing gas. has been described the case of using, not limited _{thereto, C 4 F 8 / Ar,} C 3 , for example, as a first process gas
Mixed gas such as F ₆ / Ar, CH 2
₃ F / CO, CH ₂ F ₂ / CO, CHF ₂ CF ₃ / CO
The same effect can be expected by using a mixed gas such as. Also, CO is essential as a component of the second processing gas.

The present invention is not limited to DRAMs, but can be applied to the manufacture of various semiconductor devices.

Of course, various modifications can be made without departing from the scope of the present invention.

[0043]

As described above in detail, according to the present invention, not only the etching selectivity of the silicon oxide film to the silicon nitride film but also the lower flat surface of the silicon nitride film to the upper flat surface and the side wall of the silicon nitride film. The etching selectivity can be greatly improved. That is, since the selectivity depending on the portion of the nitride film can be extremely increased only by changing the composition of the gas, a semiconductor device capable of realizing self-aligned etching, particularly, in a silicon nitride film having a stepped structure. A manufacturing method can be provided.

[Brief description of the drawings]

FIG. 1 is a plan view showing a layout of a contact region and a bit line of a semiconductor device.

FIG. 2 is a sectional view showing steps of a conventional method for forming a contact of a semiconductor device.

FIG. 3 is a sectional view showing steps of a conventional method for forming a contact in a semiconductor device.

FIG. 4 is a sectional view showing steps of a conventional method for forming a contact of a semiconductor device.

FIG. 5 is a cross-sectional view showing steps of a conventional method for forming a contact in a semiconductor device.

FIG. 6 is a sectional view showing a step of a method for forming a contact of a semiconductor device of the present invention.

FIG. 7 is a sectional view showing a step of a method for forming a contact of a semiconductor device of the present invention.

FIG. 8 is a cross-sectional view showing the steps of the method for forming a contact in a semiconductor device of the present invention.

FIG. 9 is a cross-sectional view showing the steps of the method for forming a contact in a semiconductor device of the present invention.

[Description of Signs] 10 ... substrate, 11 ... impurity diffusion layer, 12 ... first insulating layer, 13 ... first conductive layer, 14 ... second insulating layer, 15 ...
Third insulating layer, 15A: spacer, 16: photosensitive film pattern, 17: second conductive layer, 18: photosensitive film pattern, 20
... contact hole, 30 ... nitride film

Claims (9)

[Claims] In a method of manufacturing a semiconductor device, wherein a surface of a semiconductor substrate is processed by reactive ion etching, a step is formed by using a first processing gas containing a fluorocarbon-based gas having no hydrogen bond. A first step of selectively etching a silicon oxide film with respect to an upper flat surface of a silicon nitride film; and a first process using a second processing gas containing a fluorocarbon-based gas having a hydrogen bond and a CO gas. A second step of selectively etching the remaining portion of the silicon oxide film and the lower flat surface of the silicon nitride film having the step with respect to the upper flat surface and the side wall of the silicon nitride film having the step which have not been etched in the step. A method for manufacturing a semiconductor device, comprising: 2. The method of manufacturing a semiconductor device according to claim 1, wherein said fluorocarbon-based gas having no hydrogen bond can generate a large amount of CF ₂ ⁺ ions in plasma. 3. The method according to claim _2, wherein the fluorocarbon-based gas capable of generating a large amount of CF ₂ ⁺ ions in the plasma is C ₄ F ₈ . 4. The method according to claim 1, wherein the first processing gas is a mixed gas of C ₄ F ₈ and Ar. 5. The method according to claim 1, wherein the first processing gas is a mixed gas of C ₄ F ₈ , CO and Ar. 6. The method according to claim 1, wherein the fluorocarbon-based gas having a hydrogen bond is CHF ₃ . 7. The method according to claim 1, wherein the fluorocarbon-based gas having a hydrogen bond is CH ₃ F. 8. The method according to claim 1, wherein an upper flat surface of the silicon nitride film having a step functions as an etching stop layer. 9. A gate electrode is formed on a surface of a silicon substrate via a gate insulating film, a silicon nitride film having a step is formed along the gate insulating film and the gate electrode, and a silicon nitride film having the step is formed. Forming a contact hole in the silicon oxide film in a self-aligned manner with respect to the gate electrode after the formation of a flat silicon oxide film on the semiconductor device, comprising: C ₄ F ₈ / Ar or C ₄ F _In a mixed gas plasma of ₈ / CO / Ar, the silicon oxide film is selectively etched with respect to the upper flat surface of the silicon nitride film having the step, and in a mixed gas plasma of CHF ₃ / CO, The remaining portion of the silicon oxide film and the silicon nitride film having the step are selectively formed on the upper flat surface and the side wall of the silicon nitride film having the step. Method of manufacturing a semiconductor device is characterized in that the parts flat surface so as to etching.