JPH1117160A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a means, in a semiconductor device, in which generation of defects, such as deterioration of characteristics, generation of clear flaws and the like, is suppressed in the condition of ordinary daily radioactive ray level. SOLUTION: This semiconductor device comprising a semiconductor substrate (an n-type substrate 21) has a structure wherein an input pad 11 is connected to one end (a p<+> -type region 22) of a p-type semiconductor layer, the other end (a p<+> -type region 23) of the p-type semiconductor layer is connected to a ground lug 15, the p-type semiconductor layer (a p-type region 24) is surrounded by an n-type semiconductor layer (an n-type substrate 21 and an n<+> -type region 25), and the n-type semiconductor layer is connected to a source terminal (VDD) 16. Further, in the structure, a DC voltage is impressed on the source terminal 16, which put the p-type semiconductor layer and the n-type semiconductor layer into a reverse bias condition during operation of the semiconductor device. When none of the terminals of this device is electrically connected to the outside, the input pad 11 is brought into electrical connection with the ground lug 15 of this device, and when this device is operated, the input pad 11 is electrically disconnected from the ground lug 15.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device (CM)
In particular, the present invention relates to a semiconductor device capable of coping with use in an environment where a small amount of radiation may be exposed.

[0002]

2. Description of the Related Art Semiconductor devices are generally susceptible to radiation. D
2. Description of the Related Art In a memory element such as a RAM, a soft error occurs in which some data temporarily becomes an incorrect value due to an excessively large charge generated instantaneously due to radiation irradiation. But,
A more serious problem is that the radiation damages the semiconductor device that remains.

When radiation enters a semiconductor device, it has two kinds of effects, ion damage and bulk damage. Ion damage is caused by holes trapped inside the oxide film among electron-hole pairs generated inside the oxide film by radiation.
In a MOS structure composed of an electrode, an oxide film, and a semiconductor, the threshold voltage is shifted so as to deviate from the original driving voltage range of the semiconductor device. Ion damage also affects semiconductor /
The interface state at the oxide film boundary is increased. This is the MO
In the S structure, a channel formed at the interface between the semiconductor and the oxide film is adversely affected, and the device performance is significantly deteriorated.

[0004] Bulk damage is caused by the interaction of radiation with semiconductor crystal atoms. If the radiation has a sufficiently high energy, the atoms are ejected from the crystal lattice sites, creating vacancies and interstitial atoms. These become crystal defects and cause deterioration of characteristics of the semiconductor device.

When the semiconductor device is a solid-state image pickup device using a charge-coupled device (CCD) or the like, the influence of the radiation is particularly significant. In ion damage, the shift of the threshold voltage deviates from the original driving voltage range of the solid-state imaging device, and the increase in the interface state at the boundary between the semiconductor and the oxide film causes an increase in dark current. It becomes a signal and degrades the image quality. In the case of bulk damage, crystal defects cause an increase in dark current, resulting in white flaws in the dark, and in CCDs, the crystal defects cause charge traps in a transfer channel, resulting in deterioration of transfer characteristics. The transfer characteristic deterioration results in blurring of the image,
Reduce image quality.

[0006] The problem of radiation damage described above has hitherto been
Apart from being used in high radiation environments such as nuclear facilities and outer space, it was regarded as a negligible level in everyday environments and no particular measures were taken.

[0007]

However, as semiconductor devices and solid-state imaging devices become more sophisticated, radiation damage cannot be ignored even in everyday environments.
In particular, in the solid-state imaging device using a CCD, the level of noise in the dark and white spots in the dark have been remarkably improved, and the output gain has been greatly increased. As a result, extremely high sensitivity has been achieved, but slight white spots have been generated. Is no longer allowed. Therefore, the occurrence of acquired scratches due to radiation damage or the like becomes a serious problem.

[0008] Radiation that damages a semiconductor in a daily environment may be a radioactive element such as uranium, thorium, or polonium contained in a very small amount in a sealing material of a semiconductor device. Then there are cosmic rays, albeit in traces.

Regarding radiation from a sealing material of a semiconductor device, these are mainly α-rays and can be easily shielded by a resin layer of about several tens of μm. ing. In the case of a solid-state imaging device, a method for reducing the content of a radioactive element in a sealing material shown in FIG. 4 (Japanese Patent Application Laid-Open No. 1-173639).
Is known. In the drawing, reference numeral 91 denotes a package base portion made of ceramic or plastic, and 92 denotes a CC
D is a solid-state image sensor, 93 is a transparent lid made of glass, and 94 is a lead pin. By using a high-purity quartz glass as the glass member that is a constituent material of the lid 93, the content of radioactive elements such as uranium and thorium can be reduced, and α-ray emission from the lid can be suppressed.

As another method in the solid-state imaging device,
A method of covering with a shielding layer shown in FIG.
No. 0) is known. In the figure, reference numeral 95 denotes a package base made of ceramic or plastic;
6 is a solid-state imaging device such as a CCD, 97 is a transparent lid made of glass, and 98 is a lead pin. The transparent lid 97 is an ordinary glass lid that is not particularly subjected to α ray reduction. Reference numeral 99 denotes an α-ray absorbing member. Thereby, the α-ray radiated from the ordinary glass lid 97 is
The light is blocked by the α-ray absorbing member 99 and does not reach the solid-state imaging device 96.

However, in the case of cosmic rays, it is extremely difficult to shield the cosmic rays. Even concrete with a thickness of 50 cm can reduce only 40%. Also,
The degree of flight is about one per second for an area of about 100 cm ^{2 on} the ground. Assuming that the area of the active portion of the semiconductor device is 1 cm ² , 300,000 irradiations are received annually, and the effect cannot be ignored. Unfortunately, however, there is currently no measure against cosmic rays.

The present invention has been devised in view of the above problems, and provides a technique for realizing a semiconductor device having resistance to radiation in a daily environment, particularly a solid-state imaging device.

[0013]

According to the present invention, there is provided a semiconductor device comprising:
In a semiconductor device having a semiconductor substrate, when all terminals of the device are not electrically connected to the outside, a terminal corresponding to a specific electrode is electrically connected to a reference terminal of the device. In addition, in the operation state of the device, the terminal corresponding to the specific electrode is configured to be electrically disconnected from the reference terminal of the device.

Further, the reference terminal is a ground terminal in an operation state of the semiconductor device.

Further, the terminal corresponding to the specific electrode is
One end of the first semiconductor layer of the first conductivity type is connected, the other end of the first semiconductor layer is connected to the reference terminal, and a second semiconductor layer of the second conductivity type is provided around the first semiconductor layer. Surround,
The second semiconductor layer is connected to a third terminal,
A DC voltage is applied to the third terminal so that the first semiconductor layer and the second semiconductor layer are in a reverse bias state in an operation state of the semiconductor device.

The following empirical facts exist for radiation in a daily environment. In other words, the effect of radiation is different between the case where the semiconductor device is left in a state where each terminal is electrically floated and the case where the semiconductor device is left in a state where all terminals are short-circuited. , The effect is significantly less than in the former case. In particular, in a CCD type solid-state imaging device,
In the latter case, the occurrence of white flaws is significantly smaller than in the former case.

One of the reasons is as follows. That is, in the case of the above ion damage, when all the terminals are short-circuited, the electric field applied to the oxide film of the MOS structure becomes 0, and even if a large amount of electron-hole pairs are generated by the radiation, only the electrons are first. Movement is suppressed.
Therefore, the generated electron-hole pairs are more likely to recombine, and the number of holes remaining in the oxide film and trapped is greatly reduced. Therefore, it is considered that the shift of the threshold value and the increase of the interface state at the semiconductor / oxide film boundary are suppressed, and the deterioration such as the generation of white scratches is reduced.

In the present invention, when all the terminals of the semiconductor device are not electrically connected to the outside, the terminal corresponding to the specific electrode is connected to the reference terminal of the device, in particular,
It is configured to be electrically connected to the ground terminal, and each terminal is electrically grounded. For this reason,
In a semiconductor device, in particular, in a CCD solid-state imaging device, when the specific electrode is an electrode on or surrounding the light receiving unit, the electric field applied to the oxide film of the MOS structure below the electrode is 0, For this reason, deterioration such as generation of white flaws in the light receiving section is reduced.

In the present invention, the terminal corresponding to the specific electrode is electrically disconnected from the reference terminal of the semiconductor device in the operating state of the semiconductor device. Has no effect.

Further, in the present invention, a terminal corresponding to the specific electrode is connected to one end of a first semiconductor layer of a first conductivity type, and the reference terminal is connected to the other end of the first semiconductor layer. The second semiconductor layer of the second conductivity type surrounds the first semiconductor layer, the second semiconductor layer is connected to a third terminal, and the third terminal includes the semiconductor device. In the operation state, a DC voltage is applied so that the first semiconductor layer and the second semiconductor layer are in a reverse bias state. Therefore, in a state in which all terminals of the semiconductor device (solid-state imaging device) are not electrically connected to the outside, the terminal corresponding to the specific electrode and the reference terminal,
Since the potential difference between the terminals is 0, the neutralization region is ensured in the first semiconductor layer, a channel is formed therebetween, and the terminal corresponding to the specific electrode and the reference terminal are electrically connected to each other. The connection state is established. In the operation state of the semiconductor device, a reverse bias voltage is applied between the terminal corresponding to the specific electrode and the reference terminal and the third terminal, and the first semiconductor layer has no neutralized region. The channel between them is turned off, and the terminal corresponding to the specific electrode and the reference terminal are electrically disconnected.

[0021]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows an embodiment in which the present invention is applied to a CMOS semiconductor device. FIG. 1A is a diagram schematically showing a main part (radiation countermeasure unit) 10 of the present invention, and FIG. )
FIG. 3 is a diagram showing a part of a main body of the semiconductor device.

FIG. 1 shows the main body of the CMOS semiconductor device.
This is typically represented by the inverter circuit 30 shown in FIG. That is, in the PMOS transistor 32, the source 34 and the N well 35 are commonly connected to the power supply _VDD . Also, NMO
In the S transistor 33, the source 37 and the P well 36 are commonly connected to the ground potential (GND symbol). The gates of the PMOS transistor 32 and the NMOS transistor 33 are commonly connected to the input 31. Further, the drains of the PMOS transistor 32 and the NMOS transistor 33 are commonly connected to each other, and serve as an output 38.

In FIG. 1A, a signal 12 from an input pad 11 is branched, and one is a signal 13 guided to a main part 10 of the present invention, and the other is a signal 13 guided to a main body of a semiconductor device. Become. The main part 10 includes an N-type semiconductor substrate 2
1, high-concentration P ⁺ -type regions 22 and 23 are formed by being connected by a relatively low-concentration P-type region 24. Here, the region 22 is connected to the signal 13, and the region 23 is connected to the ground terminal 15. Also, the P-type region 24
A high concentration N ⁺ -type region 25 is formed on the surface side.
Further, a high-concentration N ⁺ -type region 26 is formed on the N-type substrate 21, and the regions 25 and 26 are connected to a power (V _DD ) terminal 1.
6 is connected. When all terminals of the semiconductor device are in the open state, there is no potential difference between the P-type region 24 and the N-type substrate 21 and the N ⁺ -type region 25 surrounding the P-type region 24. The oxidized area remains sufficiently. Therefore, P ⁺ -type regions 22 and 23 are connected.

Assuming that the signal to the input gate 31 of the inverter circuit 30 is the signal 14 of the main part 10, the input gate 31 is connected to the ground terminal when all terminals of the semiconductor device are open. Therefore, the electric field applied to the oxide film at each gate of the PMOS transistor 32 and the NMOS transistor 33 becomes 0, and even when the inverter circuit 30 is irradiated with the radiation, the threshold value shifts due to ion damage and the boundary between the semiconductor and the oxide film is lost. An increase in the interface state is suppressed.

When the semiconductor device is in an operating state,
Since a positive voltage is applied to the power supply (V _DD ) terminal 16 of
The P-type region 24 is in a reverse bias state between the N-type substrate 21 and the N ⁺ -type region 25, and is completely depleted. That is, the P ⁺ -type regions 22 and 23 are disconnected, and the signal 14 from the input pad 11 is independent of the ground terminal.

FIG. 2 shows an embodiment in which the present invention is applied to a CCD solid-state imaging device. FIG. 2A is a diagram schematically showing a main part (radiation countermeasure unit) 40 of the present invention. b)
FIG. 3 is a diagram illustrating a part of a main body of the solid-state imaging device.

The main body of the CCD type solid-state imaging device is shown in FIG.
Pixel part 5 of interline transfer type CCD shown in (b)
It is typically represented by 0. That is, a low-concentration P-type well 51 is formed on the N-type substrate 47, and on the well 51,
A light receiving unit N layer 54 for performing photoelectric conversion and accumulation, and a CCD unit N layer 56 for transferring signal charges are formed. A high-concentration P ⁺ layer 55 is formed on the front surface side of the light receiving section N layer 54, and is connected to the channel stop section 52. The CCD section N layer 5
6, a relatively high concentration P layer 53 is formed.
An electrode 58 is formed on the CCD section N layer 56 via an oxide film, and a clock 59 for controlling charge transfer in the CCD is provided.
Is applied. The light receiving section N layer 54 and the CCD section N layer 5
A transfer gate portion 57 for controlling charge transfer from the former to the latter is formed between the former and the latter.

In FIG. 2A, the signal 12 from the input pad 11 is branched, one is a signal 13 guided to the main part 40 of the present invention, and the other is a signal 14 guided to the main body of the solid-state imaging device. Becomes In the main part 40, a P-type well 41 is formed on an N-type semiconductor substrate 47, and high-concentration N ⁺ -type regions 42 and 43 are formed on the well 41 by a relatively low-concentration N-type region 44. It is tied and formed. Here, area 4
2 is the signal 13, and the area 43 is the ground terminal 15.
, Respectively. On the surface side of the N-type region 44, a high-concentration P ⁺ -type region 45 is formed. Further, a high-concentration P ⁺ type region 46 is formed on the P-type well 41, and the regions 45 and 46 are connected to the power (V _PW ) terminal 1.
6 is connected. When all the terminals of the solid-state imaging device are open, there is no potential difference between the N-type region 44 and the P-type well 41 and the P ⁺ -type region 45 surrounding the N-type region. The oxidized area remains sufficiently. Therefore, N ⁺ -type regions 42 and 43 are connected.

Pixel unit 50 of interline transfer type CCD
When the signal to the clock 59 of the above is the signal 14 of the main part 40, when all the terminals of the solid-state imaging device are in the open state,
The clock 59 is connected to the ground terminal. Therefore, the electric field applied to the oxide film between the electrode 58, the CCD section N layer 56 and the transfer gate section 57, and the channel stop section 52 becomes 0, and the CCD pixel section 50 emits radiation. Even in the case of receiving, the shift of the threshold value and the increase of the interface state at the semiconductor / oxide film boundary due to the ion damage are suppressed.

When the solid-state image pickup device is in an operating state, the above-described main part 4
Since a negative voltage is applied to the power supply (V _PW ) terminal 16 at 0, the N-type region 44 includes a P-type well 41 and a P ⁺ -type region 4.
5, a reverse bias state occurs, and the depletion occurs completely.
That is, the N ⁺ -type regions 42 and 43 are disconnected, and the signal 14 from the input pad 11 is independent of the ground terminal.

FIG. 3 shows the operation of the main part 40 of the present invention shown in FIG. Here, FIG. 3A shows the concentration distribution in the depth direction, where N ₁ is the P ⁺ type region 45, N ₂ is the N type region 44, and N ₃ is the P type well 41.
Shows the respective concentrations. Here, the thickness of the N-type region 44 is d ₀ . On the other hand, FIG. 3B shows the potential distribution in the depth direction. FIG. 3A shows a case where all the terminals of the solid-state imaging device are in an open state, and FIG. 3B shows a case where the solid-state imaging device is in an operating state. Show. Where φ _c is the conduction band,
φ _v represents the potential of the valence band, and φ _f represents the potential of the Fermi level.

When all the terminals of the solid-state imaging device are in the open state, the N-type region 44 and the P-type well
Since there is no potential difference between 1 and the P ⁺ type region 45,
The Fermi level becomes flat, and (1) in FIG.
As shown in FIG. 5, a neutralized region having a thickness d ₁ is formed in the N-type region 44. On the other hand, when the solid-state imaging device is operating,
Since a negative voltage is applied to the power supply V _PW , the N-type region 44
Is in a reverse bias state between the P-type well 41 and the P ⁺ -type region 45, and as shown in (2) of FIG. 3 (b), the flat neutralized region is eliminated and the region is completely depleted.

To discuss the above quantitatively, consider the following condition.

[Condition 1] Concentration N ₁ = 2 × 10 ¹⁹ cm ⁻³ Concentration N ₂ = 4 × 10 ¹⁶ cm ⁻³ Concentration N ₃ = 2 × 10 ¹⁵ cm ⁻³ Thickness d ₀ = 4.5 × 10 ^-5 cm Voltage V _PW = −5 V First, when all the terminals of the solid-state imaging device are in the open state, the thickness of the neutralized region of the N-type region 44 is d ₁ = 2.3 × 10 ⁻⁵ cm. Become. The sheet resistance in this case is ρ = 8.3 kΩ / □. Therefore, the planar shape of the N-type region 44 is set to the width /
If the length is about 8, all terminals of the solid-state imaging device are in an open state, and the distance between the line of the signal 14 and the ground terminal is 1 k.
It will be connected with about Ω.

Next, in the operating state of the solid-state imaging device, when V _PW ≦ −3.3 V, the neutral region of the N-type region 44 disappears and the N-type region 44 is completely depleted. That is, when the solid-state imaging device is operating,
The line between the signal 14 and the ground terminal is not connected.

The operation of the main part 10 of the present invention shown in FIG. 1A in the AA portion can be similarly discussed only by reversing the polarity in FIG. Also, the quantitative discussion can be applied as it is if the polarity is inverted in the above [Condition 1]. However, since the intermediate region 24 is P-type, the sheet resistance becomes ρ = 22 kΩ / □ when all the terminals of the semiconductor device are in the open state. Therefore, the planar shape of the P-type region 24 is defined by the width /
If the length is set to about 22, all terminals of the semiconductor device are in an open state, and the distance between the line of the signal 14 and the ground terminal is 1 k.
It will be connected with about Ω.

[0038]

As described above in detail, according to the semiconductor device of the present invention, when the semiconductor device is left in a state where each terminal is left open, the characteristic deterioration or the deterioration due to the radiation which exists in the daily environment such as cosmic rays. The occurrence of defects such as white flaws is greatly suppressed. Further, even if the measures according to the present invention are taken, there is no effect on the operation state of the semiconductor device.

Further, according to the present invention, when the semiconductor device is not operating, each terminal is connected to the ground terminal, so that charge-up due to static electricity is suppressed, which is also a countermeasure against static electricity.

As described above, the practical effect of the present invention is remarkable.

[Brief description of the drawings]

FIGS. 1A and 1B are diagrams showing an embodiment in which a countermeasure against radiation according to the present invention is applied to a CMOS semiconductor device, wherein FIG. 1A schematically shows a main part of the present invention, and FIG. FIG. 3 is a view showing a part of the main body of the first embodiment.

FIGS. 2A and 2B are diagrams showing an embodiment in which a radiation countermeasure according to the present invention is applied to a solid-state imaging device, wherein FIG. 2A is a diagram schematically showing a main part of the present invention, and FIG. FIG. 3 is a view showing a part of the main body of the first embodiment.

3A and 3B are diagrams showing an operation of a main part in FIGS. 1 and 2, wherein FIG. 3A is a diagram showing a concentration distribution in a depth direction, and FIG. 3B is a diagram showing a potential distribution in a depth direction. It is.

FIG. 4 is a diagram showing an example of a conventional radiation measure.

FIG. 5 is a diagram showing another example of a conventional radiation measure.

[Explanation of symbols]

REFERENCE SIGNS LIST 10 Radiation control section of semiconductor device 11 Input pad 15 Ground terminal 16 Power supply terminal 21 N-type substrate 22 P ⁺ type area 23 P ⁺ type area 24 P type area 25 N ⁺ type area 40 Radiation control section 41 of solid-state imaging device 41 P type Well 42 N ⁺ region 43 N ⁺ region 44 N region 45 P ⁺ region

Claims (3)

[Claims] In a semiconductor device having a semiconductor substrate, when all terminals of the device are not electrically connected to the outside, a terminal corresponding to a specific electrode is electrically connected to a reference terminal of the device. And a terminal corresponding to the specific electrode is electrically disconnected from the reference terminal of the device in an operating state of the device. Semiconductor device. 2. The semiconductor device according to claim 1, wherein the reference terminal is a ground terminal in an operation state of the semiconductor device. 3. A terminal corresponding to the specific electrode is a first terminal.
One end of a first semiconductor layer of conductivity type, the other end of the first semiconductor layer is connected to the reference terminal, and a second semiconductor layer of second conductivity type surrounds the first semiconductor layer; The second semiconductor layer is connected to a third terminal, and the third terminal is connected to a reverse bias state between the first semiconductor layer and the second semiconductor layer in an operation state of the semiconductor device. The semiconductor device according to claim 1, wherein a DC voltage is applied.