JPH1117055A - Wiring board and manufacture thereof - Google Patents

Wiring board and manufacture thereof

Info

Publication number
JPH1117055A
JPH1117055A JP16931797A JP16931797A JPH1117055A JP H1117055 A JPH1117055 A JP H1117055A JP 16931797 A JP16931797 A JP 16931797A JP 16931797 A JP16931797 A JP 16931797A JP H1117055 A JPH1117055 A JP H1117055A
Authority
JP
Japan
Prior art keywords
wiring board
cavity
bottom member
ceramic
frame member
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16931797A
Other languages
Japanese (ja)
Inventor
Kaichirou Satou
嘉一朗 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niterra Co Ltd
Original Assignee
NGK Spark Plug Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Spark Plug Co Ltd filed Critical NGK Spark Plug Co Ltd
Priority to JP16931797A priority Critical patent/JPH1117055A/en
Publication of JPH1117055A publication Critical patent/JPH1117055A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance

Landscapes

  • Die Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a ceramic wiring board in which an electronic-part mounting surface can have a high flatness with less warpage of the board. SOLUTION: A wiring board 1 includes a rectangular frame member 2 of ceramic having a rectangular cavity 6 thereinside and also includes a bottom member 20 of ceramic which forms a bottom of the cavity 6 and has a flat upper face 26 previously polished. The upper face (mounting face) 26 of the bottom member 20 for mounting an IC chip or the like thereon is positioned within an opening 10 in the bottom of the cavity 6. The bottom member 20 is fixedly mounted on the frame member 2 with brazing material disposed therebetween at a periphery 27 of a main body 22 of the bottom member via a brazing material 28. Since the frame 2 and the bottom members 20 have thermal expansion coefficients which are identical or close each other, such a deformation as a warpage in the entire wiring board 1 can be prevented.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、ICチップ等の電
子部品の搭載面が高度な平坦性を求められるセラミック
製の配線基板とその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic wiring board which requires a high level of flatness on a mounting surface of an electronic component such as an IC chip, and a method of manufacturing the same.

【0002】[0002]

【従来の技術】一般にセラミック多層配線基板150
は、図6に示すように、図示しない複数の配線パターン
を内蔵する矩形状のセラミックからなる本体152と、
この本体152の内側に形成されたキャビティ154
と、このキャビティ154に沿って形成された段部15
6を有する。各段部156上には、内部の配線パターン
と導通する端子158が設けられ、且つキャビティ15
4の底面155上に搭載されるICチップC等とワイヤ
Wを介して導通されている。
2. Description of the Related Art Generally, a ceramic multilayer wiring board 150 is used.
6, a main body 152 made of a rectangular ceramic having a plurality of wiring patterns (not shown) built therein,
A cavity 154 formed inside the main body 152
And the step 15 formed along the cavity 154
6. On each step portion 156, a terminal 158 that is electrically connected to the internal wiring pattern is provided, and
4 are connected to the IC chip C and the like mounted on the bottom surface 155 via wires W.

【0003】ところで、上記チップCが光を電気に変換
するチップCで且つ多数のチップCが搭載される場合、
上記キャビティ154を密封するガラス製の蓋159を
通じて外部から光が各チップC毎に照射される。係るチ
ップCは外部の発光手段からの光を受けるため、それぞ
れキャビティ154の底面155における所定の位置に
正確に配置される必要がある。このため、キャビティ1
54の底面155には、例えば表面粗さがRmaxで、約1
0μm以下という高度な平坦性が求められる。係る平坦
な底面155を得るためにラッピング等の研磨を施す方
法もあるが、該底面155に沿う段部156が一体に存
在するため、十分な研磨を行うことができず、上記の平
坦性が得られていない。また、多数のチップCから発生
する熱を係る底面155を介して基板150の外部に放
出することも不十分である。
When the chip C is a chip C for converting light into electricity and a large number of chips C are mounted,
Light is applied to each chip C from outside through a glass lid 159 that seals the cavity 154. Since such a chip C receives light from an external light emitting means, it must be accurately arranged at a predetermined position on the bottom surface 155 of the cavity 154. Therefore, cavity 1
For example, the bottom surface 155 has a surface roughness Rmax of about 1
High flatness of 0 μm or less is required. In order to obtain such a flat bottom surface 155, there is a method of performing polishing such as lapping. However, since the step portion 156 along the bottom surface 155 exists integrally, sufficient polishing cannot be performed, and the flatness described above is not achieved. Not obtained. In addition, it is also insufficient to release heat generated from a large number of chips C to the outside of the substrate 150 via the bottom surface 155.

【0004】[0004]

【発明が解決すべき課題】本発明は、以上の従来の技術
における問題点を解決し、ICチップ等の電子部品を搭
載する面を平坦にしつつ、且つ反り等の変形を生じにく
くした配線基板とその製造方法を提供することを目的と
する。
SUMMARY OF THE INVENTION The present invention solves the above-mentioned problems in the prior art, and makes the surface on which electronic components such as IC chips are mounted flat and hardly deforms such as warpage. And a method for manufacturing the same.

【0005】[0005]

【課題を解決するための手段】本発明は、上記課題を解
決するため、配線基板をセラミック製の枠部材と底部材
の2つの構成体から形成することに着目して成されたも
のである。即ち、本発明の配線基板は、内側に電子部品
を収納するためのキャビティを有し、且つこのキャビテ
ィを囲むセラミック製の枠部材と、上記キャビティ内の
底面を形成し、且つ上記電子部品を搭載する搭載面を有
するセラミック製の底部材と、を備えた配線基板であっ
て、上記電子部品を搭載する面が、予め研磨された平坦
面であることを特徴とする。
In order to solve the above-mentioned problems, the present invention has been made by paying attention to forming a wiring board from two components of a ceramic frame member and a bottom member. . In other words, the wiring board of the present invention has a cavity for accommodating an electronic component inside, and forms a ceramic frame member surrounding the cavity, a bottom surface in the cavity, and mounts the electronic component. And a ceramic bottom member having a mounting surface for mounting the electronic component, wherein the surface on which the electronic component is mounted is a flat surface polished in advance.

【0006】これによれば、底部材の搭載面(上面)が予
め研磨された平坦面にされていると共に、枠部材と底部
材とがセラミック同士からなるため、互いに固着しても
熱膨張率が同様となり、配線基板全体が反る等の変形を
低減することが可能となる。従って、搭載される電子部
品の姿勢を長期に渉り正確で安定したものにし得る。ま
た、上記枠部材と底部材とは、互いに同一又は近似した
熱膨張率を有し、或いは同種の材質からなる配線基板も
含まれる。これによれば、配線基板全体の変形を無くす
か、著しく低減できる。
According to this, the mounting surface (upper surface) of the bottom member is made a flat surface which has been polished in advance, and the frame member and the bottom member are made of ceramics. And the deformation such as warpage of the entire wiring board can be reduced. Therefore, the posture of the electronic component to be mounted can be made accurate and stable for a long time. The frame member and the bottom member have the same or similar thermal expansion coefficients to each other, or include a wiring board made of the same kind of material. According to this, the deformation of the entire wiring board can be eliminated or significantly reduced.

【0007】一方、以上の配線基板を得るための配線基
板の製造方法は、グリーンシートを焼成して、内側にキ
ャビティを有し、且つこのキャビティを囲むセラミック
製の枠部材を得る工程と、グリーンシートを焼成した
後、その上面を研磨したセラミック製の底部材を得る工
程と、上記底部材の上面が、上記キャビティの底面を形
成するように、上記底部材と枠部材とを固着する工程
と、を含むことを特徴とする。
On the other hand, the above-mentioned method for manufacturing a wiring board for obtaining a wiring board includes a step of firing a green sheet to obtain a ceramic frame member having a cavity inside and surrounding the cavity. After firing the sheet, a step of obtaining a ceramic bottom member whose top surface is polished, and a step of fixing the bottom member and the frame member so that the top surface of the bottom member forms the bottom surface of the cavity. , Is included.

【0008】これによれば、予め底部材の上面(搭載面)
を確実且つ容易に平坦化でき、しかも枠・底部材を相互
間にて緊密に一体化して変形しにくくした配線基板を提
供することができる。上記固着には、銀等の金属による
ロウ付け、高融点ガラスによる溶着、ポリイミド等の樹
脂による接着等を用いることができる。尚、枠部材と底
部材を得る各工程は、全く別個に行ったり、或いは同時
並行的に行うことも含まれ、要は固着する工程の直前迄
にそれぞれ終えていれば良い。
According to this, the upper surface (mounting surface) of the bottom member is previously determined.
Can be reliably and easily flattened, and the frame and the bottom member can be tightly integrated with each other to make it difficult to deform the wiring board. For the fixing, brazing with a metal such as silver, welding with a high-melting glass, bonding with a resin such as polyimide, or the like can be used. The steps of obtaining the frame member and the bottom member may be performed completely separately or may be performed simultaneously and in parallel. In short, the steps may be completed immediately before the fixing step.

【0009】また、上記枠部材と底部材とは、互いに同
一又は近似した熱膨張率を有し、或いは同種の材質から
なるグリーンシートを焼成して形成する製造方法も含
む。これによれば、得られる枠・底部材間の熱膨張率を
同一か可及的に近似させ得るので、両者の固着後におけ
る配線基板の反りや歪み等の変形を無くすか、著しく低
減することができる。従って、研磨したセラミック製の
底部材の上面における平坦度が、固着後の反り等によっ
て低下することがない。
Further, the frame member and the bottom member may have a coefficient of thermal expansion that is the same as or similar to each other, or may be formed by firing green sheets made of the same kind of material. According to this, since the obtained coefficients of thermal expansion between the frame and the bottom member can be made the same or as close to each other as possible, it is possible to eliminate or significantly reduce the deformation such as the warpage or distortion of the wiring board after the both are fixed. Can be. Therefore, the flatness of the upper surface of the polished ceramic bottom member does not decrease due to warpage after fixing.

【0010】[0010]

【実施の形態】以下において本発明の実施に好適な形態
を図面と共に説明する。図1は本発明の一形態の配線基
板1に関し、同図(A)はその斜視図を示す。配線基板1
は、全体が矩形枠状の枠部材2と略板状の底部材20と
を有する。この枠部材2は、図1(B)にも示すように、
アルミナ等のセラミックからなり、その内側に形成され
た長方形のキャビティ6と、その四周に沿って2段に形
成された階段部8,9と、キャビティ6の底面に設けた
開口部10とを有する。また、各段部8,9上には、枠
部材2内に形成された複数層の配線パターン12の何れ
かと導通する端子14,16が設けられている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a wiring board 1 according to one embodiment of the present invention, and FIG. Wiring board 1
Has a rectangular frame-shaped frame member 2 and a substantially plate-shaped bottom member 20. This frame member 2, as shown in FIG.
It is made of ceramics such as alumina, and has a rectangular cavity 6 formed inside thereof, steps 8 and 9 formed in two steps along the four circumferences thereof, and an opening 10 provided on the bottom surface of the cavity 6. . Further, on each of the step portions 8 and 9, terminals 14 and 16 that are electrically connected to any of the wiring patterns 12 of a plurality of layers formed in the frame member 2 are provided.

【0011】更に、枠部材2の底面11にはその長手方
向に沿って上記配線パターン12の何れかと導通するピ
ンPが複数植設されている。尚、枠部材2の上面4には
ガラス製の蓋18が追って固着される。一方、上記底部
材20は、図1(B)に示すように、上記と同様のセラミ
ックからなる平板状の本体22と、その上面の中央から
突出する凸部24とからなり、この凸部24の上面(搭
載面)26は予め研磨により平坦面に仕上げられてい
る。
Further, on the bottom surface 11 of the frame member 2, a plurality of pins P which are electrically connected to one of the wiring patterns 12 are provided along the longitudinal direction. In addition, a glass lid 18 is fixed to the upper surface 4 of the frame member 2. On the other hand, as shown in FIG. 1 (B), the bottom member 20 includes a flat body 22 made of the same ceramic as described above, and a convex portion 24 protruding from the center of the upper surface thereof. The upper surface (mounting surface) 26 is previously finished to a flat surface by polishing.

【0012】そして、係る底部材20の上面26を、枠
部材2の底面11側からその開口部10内に位置させ、
且つ底部材20の周辺27と枠部材2の底面11との間
に共晶銀のロウ材28を溶融させることにより、枠・底
部材2,20を図1(B)に示すように固着する。この状
態で上面26は、キャビティ6の底面を形成する。次い
で、底部材20の平坦な上面26上に電子部品たるIC
チップCを固着して搭載し、このチップCと前記各端子
14,16とをワイヤWを介してロウ付けして導通させ
る。この状態で、枠部材2の上面4に蓋18を固着しキ
ャビティ6内を密封し、且つその底面11にピンPを植
設することで、配線基板1を得ることができる。
Then, the upper surface 26 of the bottom member 20 is positioned in the opening 10 from the bottom surface 11 of the frame member 2,
Further, by melting the eutectic silver brazing material 28 between the periphery 27 of the bottom member 20 and the bottom surface 11 of the frame member 2, the frame / bottom members 2 and 20 are fixed as shown in FIG. . In this state, the upper surface 26 forms the bottom surface of the cavity 6. Next, an IC as an electronic component is placed on the flat upper surface 26 of the bottom member 20.
The chip C is fixedly mounted, and the chip C and the terminals 14 and 16 are soldered via wires W to conduct. In this state, the wiring board 1 can be obtained by fixing the lid 18 to the upper surface 4 of the frame member 2 to seal the inside of the cavity 6 and implanting the pins P on the bottom surface 11 thereof.

【0013】係る配線基板1によれば、互いに熱膨張率
が同じか近似するセラミックからなる枠・底部材2,2
0を固着して形成したので、経年変化やICチップC等
の発熱によっても配線基板1が反ることを防止できる。
且つ、底部材20の平坦な上面26に搭載されたチップ
C等の姿勢も当初のままに正確に維持されるので、例え
ば外部の発光手段からの光をチップCが常に正確に受光
でき、該チップCと配線基板1本来の機能を果たすこと
ができる。また、底部材20の上端にその上面26を設
けたので、ラッピング等による研磨を予め施すことが容
易で、且つ精密な研磨加工を行わしめることが可能であ
る。
According to the wiring board 1, the frame / bottom members 2, 2 made of ceramics having the same or similar thermal expansion coefficients to each other.
The wiring substrate 1 can be prevented from warping due to aging or heat generation of the IC chip C or the like since it is formed by fixing 0.
In addition, since the posture of the chip C and the like mounted on the flat upper surface 26 of the bottom member 20 is accurately maintained as it was at the beginning, for example, the chip C can always accurately receive light from an external light emitting unit. The chip C and the wiring board 1 can perform their original functions. Further, since the upper surface 26 is provided at the upper end of the bottom member 20, it is easy to perform polishing by lapping or the like in advance, and it is possible to perform precise polishing.

【0014】次に、上記配線基板1の具体的な製造方法
を図2により説明する。図2(A)は、内側をプレスにて
矩形に打ち抜いた矩形枠状の複数のグリーンシート30
を用意し、最上段のシート30を除いて各シート30の
上面にメタライズペースト32を形成したところを示
す。このグリーンシート30は、アルミナ(Al23)、
シリカ(SiO2)、マグネシア(MgO)等のセラミック
粉末に、ブチラール又はセルロース等の有機結合材、及
びこれらの有機結合材の溶剤としてトリクロールエチレ
ン、プタノール、パークロールエチレン等を加えて、公
知の方法により成形したものである。上記メタライズペ
ースト32は、タングステン(W)又はモリブデン(Mo)
等の高融点金属を主に含み、スクリーン印刷により所定
のパターンを形成している。尚、予め各シート30中に
は図示しないビア形成用のメタライズインクが、シート
30を貫通する細孔内に充填されている。
Next, a specific method of manufacturing the wiring board 1 will be described with reference to FIG. FIG. 2A shows a plurality of green sheets 30 in the form of a rectangular frame punched into a rectangular shape by pressing the inside.
Are prepared, and the metallized paste 32 is formed on the upper surface of each sheet 30 except for the uppermost sheet 30. This green sheet 30 is made of alumina (Al 2 O 3 ),
Silica (SiO 2 ), ceramic powder such as magnesia (MgO), an organic binder such as butyral or cellulose, and trichlorethylene, butanol, perchlor ethylene as a solvent for these organic binders, known, It was molded by the method. The metallizing paste 32 is made of tungsten (W) or molybdenum (Mo).
Etc., and a predetermined pattern is formed by screen printing. Each sheet 30 is previously filled with a metallized ink for forming a via (not shown) in the pores penetrating the sheet 30.

【0015】次に、図2(B)に示すように、各グリーン
シート30を所定の順に積層し、図示で垂直方向に加圧
しつつ、約1500℃に加熱し所定時間保持して焼成す
ることで、各シート30を一体にしたセラミックからな
り、複数の配線パターン12と、端子14,16を有
し、キャビティ6、段部8,9、及び開口部10を形成
した枠部材2を得る。一方、図2(C)に示す断面形状を
有する板状のグリーンシートを上記と同様に焼成して、
セラミック製の底部材20を得る。この底部材20の図
示の前後端をも除く中央から突出する凸部24の上面2
6に対し、例えばカーボンランダムを用いるラッピング
によって研磨を施す。係る研磨後における該上面26の
平坦度は、例えばRmaxで10μm以下、又は仮想基準平
面に対する厚さ方向の差が10μm以下とされる。因み
に、一般的なチップCの搭載面の平坦度はRmaxで約50
μm程度である。係る上面26に高い平坦度を与えるに
は、予め底部材20の本体22の底面23を上記と同様
に研磨した後で、上面26を研磨すると一層確実且つ容
易とすることができる。
Next, as shown in FIG. 2 (B), the green sheets 30 are laminated in a predetermined order, heated to about 1500 ° C. while being pressed in the vertical direction in the drawing, and fired while holding for a predetermined time. Then, the frame member 2 which is made of ceramic in which the respective sheets 30 are integrated, has the plurality of wiring patterns 12, the terminals 14, 16 and has the cavity 6, the step 8, 9 and the opening 10 formed therein is obtained. On the other hand, a plate-like green sheet having a cross-sectional shape shown in FIG.
A ceramic bottom member 20 is obtained. The upper surface 2 of the convex portion 24 protruding from the center of the bottom member 20 excluding the front and rear ends as shown.
6 is polished by, for example, lapping using carbon random. The flatness of the upper surface 26 after such polishing is, for example, 10 μm or less in Rmax or 10 μm or less in the thickness direction with respect to the virtual reference plane. Incidentally, the flatness of the mounting surface of a general chip C is about 50 at Rmax.
It is about μm. In order to provide the upper surface 26 with a high degree of flatness, it is more reliable and easier to polish the upper surface 26 after polishing the bottom surface 23 of the main body 22 of the bottom member 20 in the same manner as described above.

【0016】そして、図2(D)に示すように、例えば底
部材20の周辺27上に共晶銀からなる厚さ約20μm
のロウ材28を載置し、約850℃に加熱した状態で、
図示のように枠部材2の底面11を押圧して枠・底部材
2,20を固着することにより配線基板1を得ることが
できる。尚、この後、前記のようにチップCの搭載、ワ
イヤWのボンディング、蓋18による封着、及びピンP
の植設が成される。この製造方法によれば、セラミック
製の底部材20の上面26を予め研磨するので、従来の
配線基板に比べて高い精度の研磨を行えると共に、枠・
底部材2,20を同じアルミナのセラミックとしている
ので、固着も容易で且つ強固に行え、更に以後の熱的変
形も同じになるため反り等を予防することもできる。
Then, as shown in FIG. 2D, for example, a eutectic silver
With the brazing material 28 placed thereon and heated to about 850 ° C.,
As shown, the wiring board 1 can be obtained by pressing the bottom surface 11 of the frame member 2 and fixing the frame / bottom members 2 and 20. Thereafter, as described above, mounting of the chip C, bonding of the wire W, sealing with the lid 18, and
Is planted. According to this manufacturing method, since the upper surface 26 of the ceramic bottom member 20 is polished in advance, it is possible to perform polishing with higher precision as compared with a conventional wiring board, and to perform frame /
Since the bottom members 2 and 20 are made of the same alumina ceramic, the fixing can be easily and firmly performed, and the subsequent thermal deformation is the same, so that warpage and the like can be prevented.

【0017】尚、底部材20も複数のグリーンシートを
積層してから焼成する方法で形成しても良く、この場
合、後述するように各シート間の全面又は一部に均一な
メタライズ層を予め形成しておくと、配線基板1とした
後で、その上面26に搭載されるICチップC等からの
放熱を促進することに寄与し得る。また、枠部材2を単
一のグリーンシートから焼成して形成し、そのキャビテ
ィ6側に段部がないものとしても良い。更に、枠部材2
の底面11と底部材20の側面とに跨って、予め部分的
に断面逆L形状のメタライズを複数形成しておくこと
で、配線基板1をプリント基板等のマザーボード上に接
続するための端子を形成することも可能である。これに
より該端子へのロウ付けされる半田等のメニスカスを目
視で容易に確認し得る。
Incidentally, the bottom member 20 may be formed by a method in which a plurality of green sheets are laminated and then fired. In this case, a uniform metallized layer is previously formed on the entire surface or a part between the sheets as described later. If it is formed, it can contribute to promoting heat radiation from the IC chip C or the like mounted on the upper surface 26 after the wiring board 1 is formed. Alternatively, the frame member 2 may be formed by firing from a single green sheet, and the cavity 6 may have no step on the side thereof. Further, the frame member 2
A plurality of metallizations having an inverted L-shaped cross section are partially formed in advance across the bottom surface 11 and the side surface of the bottom member 20 to provide terminals for connecting the wiring board 1 to a motherboard such as a printed board. It is also possible to form. Thereby, a meniscus of solder or the like brazed to the terminal can be easily visually confirmed.

【0018】図3は異なる形態の配線基板に関する概略
の断面図を示す。図3(A)は前記と同様に底部に開口部
36を有するキャビティ34と、これに沿って段部35
を有する矩形枠状の枠部材33と、平板の底部材37を
有する配線基板40を示す。枠・底部材33,37は同
種のセラミックからなり、底部材37の上面38は予め
平坦に研磨されている。この上面38の周辺に載置され
たロウ材39を介して枠・底部材33,37は互いに固
着される。この結果、上面38は開口部36の底面に位
置し、且つ図示しないICチップ等を搭載する。
FIG. 3 is a schematic sectional view showing a wiring board of a different form. FIG. 3A shows a cavity 34 having an opening 36 at the bottom as described above, and a step 35 along the cavity 34.
And a wiring board 40 having a rectangular frame-shaped frame member 33 having a flat bottom member 37. The frame / bottom members 33 and 37 are made of the same type of ceramic, and the upper surface 38 of the bottom member 37 is polished flat in advance. The frame / bottom members 33 and 37 are fixed to each other via a brazing material 39 placed around the upper surface 38. As a result, the upper surface 38 is located at the bottom surface of the opening 36 and mounts an IC chip or the like (not shown).

【0019】この配線基板40によれば、平板の底部材
37を用いるので、その上面38の研磨が一層容易且つ
精度良く行えると共に、底部材37の加工・研磨コスト
を安価にし得る。更に、底部材37の上面38はICチ
ップ等の搭載面と枠部材33との接合面を兼ねているの
で、搭載面の研磨時に枠部材33との接合面も同時に研
磨され、より緊密な固着を行うことができる。尚、段部
35上には前記同様に図示しない端子が形成されてい
る。
According to the wiring board 40, since the flat bottom member 37 is used, the upper surface 38 can be polished more easily and accurately, and the cost of processing and polishing the bottom member 37 can be reduced. Further, since the upper surface 38 of the bottom member 37 also serves as a joint surface between the mounting surface of the IC chip or the like and the frame member 33, the joint surface with the frame member 33 is polished at the same time as the mounting surface is polished, so that a tighter fixing is achieved. It can be performed. It should be noted that a terminal (not shown) is formed on the step 35 in the same manner as described above.

【0020】図3(B)も前記同様に底部に開口部44を
有するキャビティ43と、これに沿って段部45を有す
る枠部材42と、断面略平板状で且つ底面側に沿って浅
い凹溝47を設けた底部材46とを有する配線基板50
を示す。該枠・底部材42,46は同種のセラミックか
らなり、底部材46の上面48は予め平坦に研磨されて
いる。この上面48の周辺においてロウ材49を介して
枠・底部材42,46は互いに固着される。また、上面
48は開口部44の底面に位置して、且つ図示しないI
Cチップ等が搭載される。この配線基板50によれば、
底部材46の上面48の反対側に凹溝47を設けている
ので、その板厚を薄くでき上面48に搭載するチップ等
からの熱を外部に容易に放出させ得る。
FIG. 3B also shows a cavity 43 having an opening 44 at the bottom, a frame member 42 having a step 45 along the cavity 43, a substantially flat cross section, and a shallow recess along the bottom side. Wiring board 50 having bottom member 46 provided with groove 47
Is shown. The frame / bottom members 42, 46 are made of the same type of ceramic, and the upper surface 48 of the bottom member 46 is polished flat in advance. At the periphery of the upper surface 48, the frame / bottom members 42 and 46 are fixed to each other via a brazing material 49. The upper surface 48 is located on the bottom surface of the opening 44,
A C chip and the like are mounted. According to this wiring board 50,
Since the concave groove 47 is provided on the opposite side of the upper surface 48 of the bottom member 46, the thickness thereof can be reduced, and heat from a chip or the like mounted on the upper surface 48 can be easily released to the outside.

【0021】図3(C)は更に異なる配線基板60を示
す。その枠部材51は前記同様に開口部53を有するキ
ャビティ52と、これに沿って段部54を有する。一
方、底部材55は大小2枚の平板56,57からなる。
枠・底部材51,55は同種のセラミックからなり、底
部材55の上方の平板57の上面58は予め平坦に研磨
された上で、下方の平板56とロウ付け等により固着さ
れている。そして、下方の平板56の周辺においてロウ
材59を介して枠・底部材51,55は互いに固着さ
れ、且つ上面58はキャビティ52の略開口部53付近
に位置する。この配線基板60によれば、底部材55が
2枚の平板56,57からなり、後者の上面が幅狭であ
るため、そこに施す研磨を容易且つ迅速に行い得る。
FIG. 3C shows a further different wiring board 60. The frame member 51 has a cavity 52 having an opening 53 as described above, and a step 54 along the cavity 52. On the other hand, the bottom member 55 includes two large and small flat plates 56 and 57.
The frame / bottom members 51 and 55 are made of the same type of ceramic, and the upper surface 58 of the flat plate 57 above the bottom member 55 is polished flat beforehand and fixed to the lower flat plate 56 by brazing or the like. The frame / bottom members 51 and 55 are fixed to each other around the lower flat plate 56 via a brazing material 59, and the upper surface 58 is located near the substantially opening 53 of the cavity 52. According to the wiring board 60, since the bottom member 55 is composed of the two flat plates 56 and 57 and the upper surface of the latter is narrow, the polishing applied thereto can be performed easily and quickly.

【0022】図3(D)も異なる配線基板70を示す。そ
の枠部材61は前記と同様に開口部63を底部に有する
キャビティ62と、これに沿って段部64,65を有す
る。一方、底部材66は予め研磨された平坦な上面68
を有する平板で、下段側の段部65上に跨ってその四周
を載置され、ロウ材69により枠部材61に固着されて
いる。この枠・底部材61,66は共に同種のセラミッ
クからなる。尚、底部材66の上面68はキャビティ6
2内の略開口部63寄りに位置する。この配線基板70
によれば、底部材66に薄い平板を用いる為、その上面
68を容易に研磨でき、且つ可及的に薄肉化し得る。従
って、上面68に搭載するICチップ等を正確に配置で
き、且つ該チップからの発熱を容易に放出させ得る。
FIG. 3D also shows a different wiring board 70. The frame member 61 has a cavity 62 having an opening 63 at the bottom similarly to the above, and steps 64 and 65 along the cavity 62. On the other hand, the bottom member 66 has a flat top surface 68 that has been polished in advance.
And is mounted on the lower step 65 over four steps around the step 65 and fixed to the frame member 61 by the brazing material 69. Both the frame and bottom members 61 and 66 are made of the same type of ceramic. The upper surface 68 of the bottom member 66 is
2 is located near the opening 63. This wiring board 70
According to this, since a thin flat plate is used for the bottom member 66, the upper surface 68 thereof can be easily polished and the wall thickness can be reduced as much as possible. Therefore, an IC chip or the like mounted on the upper surface 68 can be accurately arranged, and heat generated from the chip can be easily released.

【0023】図4は更に異なる形態の配線基板に関する
概略の断面図を示す。図4(A)は矩形状の枠部材72と
そのキャビティ73の底面75上に固着した底部材76
とからなる配線基板80を示す。枠・底部材72,76
も同種のセラミックからなり、枠部材72はそのキャビ
ティ73に沿って段部74を有し、その底面75上にロ
ウ材79を介して底部材76の底面77を固着する。ま
た、底部材76の上面78は予め研磨され、且つキャビ
ティ73内に位置している。係る配線基板80によれ
ば、幅狭の平板からなる底部材76の上面78のみを研
磨すれば良く、且つロウ材79を配設する範囲も狭いた
め、研磨と固着の双方が容易となり、且つこれらに要す
るコストを安価にし得る。尚、底部材76は可及的に薄
肉化することで、その上面78に搭載するICチップ等
をキャビティ73内に収容でき、且つ放熱性の低下を抑
制し得る。
FIG. 4 is a schematic cross-sectional view of a wiring board of still another embodiment. FIG. 4A shows a rectangular frame member 72 and a bottom member 76 fixed on a bottom surface 75 of a cavity 73 thereof.
Is shown. Frame / bottom members 72, 76
The frame member 72 has a step 74 along the cavity 73, and the bottom surface 77 of the bottom member 76 is fixed on the bottom surface 75 via the brazing material 79. The upper surface 78 of the bottom member 76 is polished in advance and is located in the cavity 73. According to such a wiring board 80, only the upper surface 78 of the bottom member 76 made of a narrow flat plate needs to be polished, and since the range in which the brazing material 79 is provided is narrow, both polishing and fixing become easy, and These costs can be reduced. By making the bottom member 76 as thin as possible, an IC chip or the like mounted on the upper surface 78 can be accommodated in the cavity 73, and a decrease in heat dissipation can be suppressed.

【0024】図4(B)は別の形態の配線基板90に関す
る。この基板90は同種のセラミックからなる枠部材8
1と底部材86とを有する。枠部材81は、内側のキャ
ビティ82に沿って段部84とその底部に開口部83
を、底面側に幅広の凹部85を有する。また、底部材8
6は底面側に浅い凹溝87を有し、その上面88は予め
研磨により平坦化されている。底部材86の上面88に
おける周辺にロウ材89を載置して、図示のように底部
材86を枠部材81の凹部85内に挿入して固着する
と、枠部材81の開口部83の底面に底部材86の上面
88が位置する配線基板90を得る。係る基板90によ
れば、凹部85内に底部材86を略挿入したので、キャ
ビティ83内の容積が確保し易く、且つ底部材86も薄
肉化できるので、上面88に搭載するICチップ等から
の発熱を外部へ容易に放出させ得る。
FIG. 4B relates to a wiring board 90 of another embodiment. This substrate 90 is made of a frame member 8 made of the same type of ceramic.
1 and a bottom member 86. The frame member 81 has a stepped portion 84 along the inner cavity 82 and an opening 83 at the bottom thereof.
Has a wide concave portion 85 on the bottom surface side. Also, the bottom member 8
6 has a shallow concave groove 87 on the bottom surface side, and its upper surface 88 is previously planarized by polishing. When the brazing material 89 is placed around the upper surface 88 of the bottom member 86 and the bottom member 86 is inserted into the recess 85 of the frame member 81 and fixed as shown in FIG. A wiring board 90 on which the upper surface 88 of the bottom member 86 is located is obtained. According to the substrate 90, since the bottom member 86 is substantially inserted into the concave portion 85, the volume in the cavity 83 can be easily secured, and the bottom member 86 can also be thinned. Heat can be easily released to the outside.

【0025】図4(C)は更に別形態の配線基板100に
関する。この基板100は同種のセラミックからなる枠
部材91と底部材95とを有する。枠部材91は内側の
キャビティ92に沿って段部94とその底部に開口部9
3とを有する。また、底部材95は底面側に浅い凹溝9
6と、この凹溝96の天井面に設けた連続する断面鋸歯
状の凹凸条97と、平坦に研磨された上面98とを有す
る。そして、上面98の周辺に載置したロウ材99を介
して枠・底部材91,95を固着し基板100を形成す
る。この基板100によれば、底部材95の凹溝96内
に更に凹凸条97を形成したので、上面98に搭載した
ICチップ等からの発熱を外部に放出し易くなる。
FIG. 4C relates to a wiring board 100 of still another embodiment. This substrate 100 has a frame member 91 and a bottom member 95 made of the same type of ceramic. The frame member 91 has a step 94 along the inner cavity 92 and an opening 9 at the bottom thereof.
And 3. The bottom member 95 has a shallow groove 9 on the bottom surface side.
6, a continuous serrated uneven portion 97 provided on the ceiling surface of the concave groove 96, and an upper surface 98 polished flat. Then, the frame / bottom members 91 and 95 are fixed via the brazing material 99 placed around the upper surface 98 to form the substrate 100. According to the substrate 100, since the concave and convex stripes 97 are further formed in the concave groove 96 of the bottom member 95, heat generated from an IC chip or the like mounted on the upper surface 98 is easily released to the outside.

【0026】図4(D)は別個の形態の配線基板110に
関する。この基板110も同種のセラミックからなる枠
部材101と底部材105とを有する。枠部材101は
内側のキャビティ102に沿って段部104とその底部
に開口部103とを有する。また、平板状の底部材10
5は上面106を研磨により平坦化されており、且つそ
の内部に複数層のメタライズ層108を内蔵している。
そして、上面106の周辺に載置したロウ材109を介
して枠・底部材101,105を固着し基板110を形
成する。係る配線基板110によれば、上面106に搭
載するICチップ等の発熱を底部材105内のメタライ
ズ層108を介して外部へ放出し易くなる。このメタラ
イズ層108は底部材105の左右方向に略全面的に形
成したり、或いは等間隔に図示しない透孔を連続して有
するネット模様のパターンとすることもできる。また、
各メタライズ層108の間と上面106とを導通するビ
アを適宜の位置に形成することで、放熱性を一層高める
ことも可能である。
FIG. 4D relates to a separate type of wiring board 110. This substrate 110 also has a frame member 101 and a bottom member 105 made of the same type of ceramic. The frame member 101 has a step 104 along the inner cavity 102 and an opening 103 at the bottom thereof. The flat bottom member 10
5 has an upper surface 106 which is planarized by polishing, and has a plurality of metallized layers 108 built therein.
Then, the frame / bottom members 101 and 105 are fixed via the brazing material 109 placed around the upper surface 106 to form the substrate 110. According to such a wiring board 110, heat generated by an IC chip or the like mounted on the upper surface 106 can be easily released to the outside via the metallized layer 108 in the bottom member 105. The metallization layer 108 may be formed substantially entirely in the left-right direction of the bottom member 105, or may be a net pattern having continuous through holes (not shown) at regular intervals. Also,
By forming vias that conduct between the metallization layers 108 and the upper surface 106 at appropriate positions, it is possible to further enhance the heat dissipation.

【0027】図5は以上において説明した形態とも異な
る配線基板に関する。図5(A)に示す配線基板120
は、平面視で正方形のキャビティ112を有する枠部材
111とこれに固着された正方形状の底部材115とを
有する。この枠・底部材111,115も同種のセラミ
ックからなる。枠部材111はキャビティ112に沿っ
て段部113と底部に正方形の開口114を有し、段部
113上には図示しない端子が形成されている。一方、
図5(B)に示すように、底部材115は中央部の凸部1
17における研磨された正方形の上面118が上記開口
部114内に位置するように、その周辺116において
枠部材111の底面とロウ付けにより固着されている。
この配線基板120によれば、キャビティ112及び上
面118が正方形をなすので、正方形状の単一のICチ
ップ等や多数のチップを縦横方向に正確に配置すること
が容易となる。
FIG. 5 relates to a wiring board different from the above-described embodiment. Wiring board 120 shown in FIG.
Has a frame member 111 having a square cavity 112 in a plan view and a square bottom member 115 fixed thereto. The frame / bottom members 111 and 115 are also made of the same type of ceramic. The frame member 111 has a step 113 along the cavity 112 and a square opening 114 at the bottom, and a terminal (not shown) is formed on the step 113. on the other hand,
As shown in FIG. 5 (B), the bottom member 115 is located at the central convex portion 1.
The peripheral surface 116 is fixed to the bottom surface of the frame member 111 by brazing so that the polished square upper surface 118 at 17 is located within the opening 114.
According to the wiring board 120, since the cavity 112 and the upper surface 118 form a square, it is easy to accurately arrange a single square IC chip or the like and many chips in the vertical and horizontal directions.

【0028】また、図5(C)に示す配線基板130は、
平面視で略八角形を呈するキャビティ122を内側に有
する枠部材121と、これに固着された正方形状の底部
材125とを有し、枠・底部材121,125は同種の
セラミックからなる。この枠部材121はキャビティ1
22に沿って段部123と底部に八角形状の開口124
を有し、段部123上には図示しない端子が形成されて
いる。一方、図5(B)に示すように、底部材125は中
央部の凸部127における研磨された八角形状の上面1
28が上記開口部124内に位置するように、その周辺
126において枠部材121の底面とロウ付けにより固
着されている。
The wiring board 130 shown in FIG.
It has a frame member 121 having a cavity 122 having a substantially octagonal shape in a plan view inside, and a square bottom member 125 fixed to the frame member 121. The frame / bottom members 121, 125 are made of the same type of ceramic. The frame member 121 has the cavity 1
Step 22 along 22 and octagonal opening 124 at the bottom
And a terminal (not shown) is formed on the step portion 123. On the other hand, as shown in FIG. 5B, the bottom member 125 is a polished octagonal upper surface 1 at the central projection 127.
28 is fixed to the bottom surface of the frame member 121 at the periphery 126 by brazing so that the opening 28 is located in the opening 124.

【0029】更に、図5(D)に示す配線基板140は、
平面視で略円形のキャビティ132を有する枠部材13
1と、これに固着された正方形状の底部材135とを有
し、枠・底部材131,135は同種のセラミックから
なる。枠部材131はキャビティ132に沿って段部1
33と底部に略円形の開口134を有し、段部133上
には図示しない端子が形成されている。一方、図5(B)
に示すように、底部材135は、中央部の凸部137に
おける研磨された略円形の上面138が上記開口部13
4内に位置するように、その周辺136において枠部材
131の底面とロウ付けにより固着されている。これら
の配線基板130,140によれば、各キャビティ12
2,132と上面128,138とが八角形や円形を呈
するので、これらに外形が倣ったICチップ等や多数の
チップを放射方向又は渦巻き方向に配置することが容易
となる。尚、キャビティやその底面を形成するICチッ
プ等の搭載用の平坦な上面は、平面視で上記以外の多角
形や楕円形等に形成することも可能である。
Further, the wiring board 140 shown in FIG.
Frame member 13 having substantially circular cavity 132 in plan view
1 and a square bottom member 135 fixed thereto, and the frame / bottom members 131 and 135 are made of the same type of ceramic. The frame member 131 is formed along the cavity 132 with the stepped portion 1.
33 and a substantially circular opening 134 at the bottom, and a terminal (not shown) is formed on the step 133. On the other hand, FIG.
As shown in the figure, the bottom member 135 is formed such that the polished substantially circular upper surface 138 of the central convex portion 137 has the above-mentioned opening 13.
4 and is fixed to the bottom surface of the frame member 131 at its periphery 136 by brazing. According to these wiring boards 130 and 140, each cavity 12
2, 132 and the upper surfaces 128, 138 have an octagonal shape or a circular shape, so that it is easy to arrange an IC chip or the like or a large number of chips having the same external shape in the radial direction or the spiral direction. Incidentally, the flat upper surface for mounting the IC chip or the like forming the cavity or the bottom surface thereof can be formed in a polygonal shape, an elliptical shape, or the like other than the above in plan view.

【0030】本発明は以上にて説明した各形態に限定さ
れるものではない。例えば、枠・底部材のセラミックに
は、前記アルミナに限らず、窒化アルミニウム、ムライ
ト、コージュライト等のガラスセラミックを用いること
もできる。この場合、枠・底部材に同じセラミックを用
いるか、熱膨張率が同一か近似する同種又は異種のセラ
ミックを適用することが、変形を防ぐ上で必要である。
また、例えば前記図3(A)の底部材37をその研磨され
た上面38の周囲に、更に矩形枠状の同じセラミックを
固着したものとして、ICチップ等を搭載する上面38
の位置を一層低くして比較的深いキャビティ34とする
こともできる。
The present invention is not limited to the embodiments described above. For example, the ceramic of the frame / bottom member is not limited to the alumina, and a glass ceramic such as aluminum nitride, mullite, cordierite or the like can be used. In this case, it is necessary to use the same ceramic for the frame and the bottom member or to apply the same or different ceramics having the same or similar coefficient of thermal expansion in order to prevent deformation.
Further, for example, the bottom member 37 shown in FIG. 3A is formed by further fixing the same ceramic in the form of a rectangular frame around the polished upper surface 38, and the upper surface 38 on which an IC chip or the like is mounted is formed.
Can be made even lower to form a relatively deep cavity 34.

【0031】更に、本発明は前記キャビティを有する所
謂ピングリッドアレイ型やリードレスチップキャリア、
マルチチップモジュール等の配線基板にも適用し得る。
また、前記キャビティ内に位置する平坦な上面には、I
Cチップに限らず、トランジスタ、EFT等の半導体素
子や、コンデンサ、インダクタンス、抵抗、SAWフィ
ルタ等の電子部品を搭載することもできる。尚、枠部材
の前記端子や配線パターンの材質には前記WやMoに限
らず、Mo−Mn,Cu,Ag,Ag−Pd,Ag−P
t等を適用することも可能である。また、前記枠部材の
底面に植設したピンに替えて、半田バンプ、リード、又
はパッド等の端子を設けることも可能である。
Further, the present invention provides a so-called pin grid array type or leadless chip carrier having the cavity,
The present invention can also be applied to a wiring board such as a multichip module.
Also, a flat upper surface located in the cavity has I
Not limited to the C chip, semiconductor elements such as transistors and EFTs, and electronic components such as capacitors, inductances, resistors, and SAW filters can also be mounted. The material of the terminal and the wiring pattern of the frame member is not limited to W and Mo, but may be Mo-Mn, Cu, Ag, Ag-Pd, Ag-P.
It is also possible to apply t or the like. It is also possible to provide a terminal such as a solder bump, a lead, or a pad instead of the pin implanted on the bottom surface of the frame member.

【0032】[0032]

【発明の効果】以上において説明した本発明の配線基板
によれば、枠・底部材の双方をセラミックによって構成
し、底部材の上面は予め研磨により高度に平坦化されて
いるので、係る上面に搭載されるICチップ等を正確な
姿勢で固着できる。また、熱の影響を受けても枠・底部
材が同様に変化するので、配線基板全体が反ったり、歪
む等の変形を無くすか著しく低減できる。従って、上記
上面に搭載したチップ等を所期の正確な配置姿勢のまま
長期に渉り維持することが可能となる。また、本発明の
製造方法によれば、上記のような配線基板を確実且つ容
易に提供できると共に、安価に製造し得る。
According to the wiring board of the present invention described above, both the frame and the bottom member are made of ceramic, and the upper surface of the bottom member is highly planarized in advance by polishing. The mounted IC chip and the like can be fixed in an accurate posture. In addition, since the frame and the bottom member change similarly even under the influence of heat, it is possible to eliminate or significantly reduce deformation such as warping or distortion of the entire wiring board. Therefore, it is possible to maintain the chip and the like mounted on the upper surface for a long period of time with the intended accurate placement posture. Further, according to the manufacturing method of the present invention, the wiring board as described above can be provided reliably and easily, and can be manufactured at low cost.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(A)は本発明の配線基板の斜視図、(B)は(A)
中のB−B断面図。
FIG. 1A is a perspective view of a wiring board according to the present invention, and FIG.
The BB sectional drawing in a middle.

【図2】(A)乃至(D)は本発明の配線基板の製造工程を
示す概略断面図。
FIGS. 2A to 2D are schematic cross-sectional views illustrating steps for manufacturing a wiring board according to the present invention.

【図3】(A)乃至(D)は共に異なる形態の配線基板の概
略断面図。
FIGS. 3A to 3D are schematic cross-sectional views of different types of wiring boards.

【図4】(A)乃至(D)は共に更に異なる形態の配線基板
の概略断面図。
FIGS. 4A to 4D are schematic cross-sectional views of wiring boards of still different forms.

【図5】(A),(C),(D)は別形態の配線基板の斜視図、
(B)はこれら中のB−B断面図。
FIGS. 5A, 5C, and 5D are perspective views of another type of wiring board;
(B) is a BB sectional view in these.

【図6】従来の配線基板を示す断面図。FIG. 6 is a sectional view showing a conventional wiring board.

【符号の説明】[Explanation of symbols]

1,40,50,60,70,80,90,100,110,120,130,1
40……………配線基板 2,33,42,51,61,72,81,91,101,111,121,
131………枠部材 6,34,43,52,62,73,82,92,102,112,122,1
32………キャビティ 10,36,44,53,63,83,93,103,114,124,134
…………開口部 20,37,46,55,66,76,86,95,105,115,125,
135………底部材 26,38,48,58,68,78,88,98,106,118,1
28,138…上面(搭載面) 30……………………………………………………………
………グリーンシート
1,40,50,60,70,80,90,100,110,120,130,1
40 ...... Wiring board 2, 33, 42, 51, 61, 72, 81, 91, 101, 111, 121,
131 ... Frame member 6, 34, 43, 52, 62, 73, 82, 92, 102, 112, 122, 1
32 …… Cavities 10,36,44,53,63,83,93,103,114,124,134
............ Opening 20,37,46,55,66,76,86,95,105,115,125,
135 Bottom member 26, 38, 48, 58, 68, 78, 88, 98, 106, 118, 1
28,138… Upper surface (mounting surface) 30 …………………………………………………
……… Green sheet

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】内側に電子部品を収納するためのキャビテ
ィを有し、且つこのキャビティを囲むセラミック製の枠
部材と、 上記キャビティ内の底面を形成し、且つ上記電子部品を
搭載する搭載面を有するセラミック製の底部材と、を備
えた配線基板であって、 上記電子部品を搭載する面が、予め研磨された平坦面で
あることを特徴とする配線基板。
1. A ceramic frame member having a cavity for accommodating an electronic component therein and surrounding the cavity, and a mounting surface forming a bottom surface in the cavity and mounting the electronic component. A wiring board comprising: a ceramic bottom member; and a surface on which the electronic component is mounted is a flat surface polished in advance.
【請求項2】前記枠部材と底部材とは、互いに同一又は
近似した熱膨張率を有し、或いは同種の材質からなるこ
とを特徴とする請求項1に記載の配線基板。
2. The wiring board according to claim 1, wherein the frame member and the bottom member have the same or similar coefficient of thermal expansion as one another, or are made of the same kind of material.
【請求項3】グリーンシートを焼成して、内側にキャビ
ティを有し、且つこのキャビティを囲むセラミック製の
枠部材を得る工程と、 グリーンシートを焼成した後、その上面を研磨したセラ
ミック製の底部材を得る工程と、 上記底部材の上面が、上記キャビティの底面を形成する
ように、上記底部材と枠部材とを固着する工程と、 を含むことを特徴とする配線基板の製造方法。
3. A step of sintering the green sheet to obtain a ceramic frame member having a cavity inside and surrounding the cavity; and sintering the green sheet and polishing the upper surface of the green sheet to form a ceramic bottom part. A method for manufacturing a wiring board, comprising: a step of obtaining a material; and a step of fixing the bottom member and a frame member such that an upper surface of the bottom member forms a bottom surface of the cavity.
【請求項4】前記枠部材と底部材とは、互いに同一又は
近似した熱膨張率を有し、或いは同種の材質からなるグ
リーンシートを焼成して形成することを特徴とする請求
項3に記載の配線基板の製造方法。
4. The method according to claim 3, wherein the frame member and the bottom member have the same or similar thermal expansion coefficients to each other, or are formed by firing green sheets made of the same material. Method of manufacturing a wiring board.
JP16931797A 1997-06-25 1997-06-25 Wiring board and manufacture thereof Pending JPH1117055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16931797A JPH1117055A (en) 1997-06-25 1997-06-25 Wiring board and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16931797A JPH1117055A (en) 1997-06-25 1997-06-25 Wiring board and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH1117055A true JPH1117055A (en) 1999-01-22

Family

ID=15884307

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16931797A Pending JPH1117055A (en) 1997-06-25 1997-06-25 Wiring board and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH1117055A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010238923A (en) * 2009-03-31 2010-10-21 Tdk Corp Module with built-in electronic component
JP2015119163A (en) * 2013-12-18 2015-06-25 コリア アトミック エナジー リサーチ インスティテュートKoreaAtomic Energy Research Institute Mounting substrate for surface-mounting semiconductor sensor and mounting method of the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010238923A (en) * 2009-03-31 2010-10-21 Tdk Corp Module with built-in electronic component
JP2015119163A (en) * 2013-12-18 2015-06-25 コリア アトミック エナジー リサーチ インスティテュートKoreaAtomic Energy Research Institute Mounting substrate for surface-mounting semiconductor sensor and mounting method of the same

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