JPH11167496A - Probe circuit for bus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a probe circuit for a bus which has a circuit for speedily and precisely performing arithmetic-processing of a signal obtained by superimposing a differential voltage of small amplitude on a DC common voltage of large amplitude. SOLUTION: This probe circuit has at least one pair of two signal wires, each of which is provided with buffer circuits 1 provided for each signal wire of a bus for transmitting a bit-string signal of a prescribed speed by differential voltage, and arithmetic circuits for inputting the signal of this circuit 1 and calculating 3, 2 differential voltage or common voltage. The buffer circuit 1 has a small capacity giving no influence on the voltage of the signal wire and a high input impedance.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
A suitable bus probe circuit used for a bus analyzer used for analysis of packet communication and the like defined in
In particular, it relates to improvement of a high input impedance probe circuit using a high-speed operational amplifier.

[0002]

2. Description of the Related Art IEEE 1394 is a communication protocol for high-speed communication of multimedia information such as moving images, still images, sounds and characters with general-purpose AV devices such as computers, peripheral devices and digital video cameras. The communication is performed by the high-speed serial bus, and the packet data to be communicated is transmitted and received at fixed time intervals. In the development of a device having such a 1394 bus interface, it is necessary to observe the waveform on the bus in order to debug the device. Therefore, conventionally, a digital oscilloscope was controlled to measure the waveform of the bus, and the waveform that caused the trigger was displayed in the center of the screen.

FIG. 2 is an explanatory view of a conventional bus waveform measurement. In the 1394 bus, four signal lines TPA ±, TPB ±
The signal is transmitted by using. The arithmetic circuit includes a common signal (TPA ++ TPA−) and a differential signal (TPA + −TPA−) of a set of TPA + and TPA− input through a buffer circuit, and a common signal (TPB +) of a set of TPB + and TPB−. + TPB-) and differential signal (TPB-
+ −TPB-) is calculated and the waveform is output. The physical layer PHY is 1
It is a physical circuit that drives signals on the 394 bus. The link layer LINK handles an interface between the transaction layer and the physical layer. The transaction layer is 1
This layer controls the entire 394 bus, and defines a request / response protocol, and performs a read / write and lock function. To facilitate observation with an oscilloscope, a trigger circuit 30 for generating a trigger signal and a control circuit 40 for generating a control signal are provided in the bus probe circuit.

In the device configured as described above, 13
The analysis of the devices of the 94 bus is performed for each mode such as bus reset, cycle period, configuration, and the like.

[0005]

However, when measuring the waveform of each signal in an oscilloscope, it is necessary for the arithmetic circuit to satisfy a low capacitance and a high impedance in order not to affect the original signal waveform. Since it is necessary to observe a high-speed differential signal of Mbit / s, there is a first problem that it is necessary to secure a very wide frequency band.

Therefore, there is a method of realizing a differential operation circuit using a high-speed IC design technique, but there is a problem that it is difficult to manufacture the differential operation circuit at low cost. There is also a method of realizing a differential operation circuit using FETs, but there is a problem that it is difficult to improve gain accuracy and suppress temperature drift. Furthermore, there is a method of realizing a differential operation circuit using a high-speed operational amplifier. However, in general, the high-speed operational amplifier has a narrow input common voltage range and a small-sized DC common voltage (1.165 to 2.515 V) like a 1394 bus signal. There is a problem that it is difficult to calculate a signal on which a differential voltage (0.230 to 0.530 V) having an amplitude is superimposed and to divide the signal into a differential component and a common component.

In the debugging work, there is a second problem of responding to a customer's request to know a raw signal waveform before calculation, rather than displaying only a differential component and a common component.

A first object of the present invention is to solve such a problem. A first object of the present invention is to calculate a signal in which a small-amplitude differential voltage is superimposed on a large-amplitude DC common voltage with high speed and high accuracy. An object of the present invention is to provide a bus probe circuit having a processing circuit. A second object of the present invention is to provide a bus probe circuit in which signals before and after calculation are displayed on a waveform display device so that debugging can be performed smoothly.

[0009]

To achieve the first object, a bus probe circuit according to claim 1 of the present invention comprises:
A buffer circuit provided for each signal line of a bus having one or two or more sets of two signal lines, and for each set of signal lines, transmitting a bit string signal at a predetermined speed by a differential voltage; In the bus probe circuit having an arithmetic circuit for calculating a differential voltage or a common voltage by inputting the signal of the signal line, the buffer circuit has a low capacity that does not affect the signal voltage of the signal line, and has a high capacity. It has an input impedance.

According to the first aspect of the present invention, since the buffer circuit has a low capacitance and a high input impedance, it does not affect the signal voltage of the signal line. Therefore, the arithmetic circuit can perform the arithmetic operation at high speed and with high accuracy.

Here, the buffer circuit becomes a specific circuit having a low capacitance and a high input impedance when the high-speed current feedback type operational amplifier is operated as a voltage follower circuit. Further, when the buffer circuit and the common voltage calculation circuit are configured to shift the power supply voltage to the common voltage side, the common signal can be calculated with low distortion. Since the differential voltage is smaller than the common voltage, the influence can be ignored. Specifically, since the common voltage on the 1394 bus is a positive voltage, it is preferable to shift the power supply voltage to the positive voltage side. Further, when the differential voltage operation circuit has the same power supply potential on both the positive and negative sides, the differential signal to be observed can be operated without distortion.

In order to achieve the second object, a bus probe circuit according to claim 6 of the present invention has one set or two or more sets of two signal lines, and each set of signal lines has a difference. A bus probe circuit having a buffer circuit provided for each signal line of a bus for transmitting a bit string signal of a predetermined speed by a dynamic voltage, and an arithmetic circuit for inputting a signal of the buffer circuit and calculating a differential voltage or a common voltage Wherein a selection circuit is provided for inputting each output signal of the buffer circuit, a differential voltage and a common voltage of the arithmetic circuit, selecting these, and outputting them to a display recording device. With this configuration, the signal waveform before the calculation and the signal waveform after the calculation can be displayed on the display recording device, so that the debugging operation can be performed smoothly.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 is a configuration block diagram showing one embodiment of the present invention. In FIG. 1, a buffer circuit 1 is a circuit having a low capacitance and a high input impedance and does not affect the signal voltage of a signal line. For example, a high-speed current feedback operational amplifier is operated as a voltage follower circuit. The common signal calculation circuit 2 calculates a common signal (TPA +++ TPA−) of a set of TPA + and TPA− of the 1394 bus and a common signal (TPB ++ TPB−) of a set of TPB + and TPB−. Differential signal operation circuit 3
Is a differential signal of a pair of TPA + and TPA- of the 1394 bus
(TPA + −TPA−) and a differential signal (T
PB + −TPB−) is calculated.

The voltage regulator 5 supplies stabilized voltages of +7 V and -3 V to the buffer circuit 1 and the common signal operation circuit 2, and supplies ± 5 V to the differential signal operation circuit 3. The DC-DC converter 6 supplies the power insulated from the main power supply to the voltage regulator 5. The main power supply is, for example, a power supply of a bus analyzer having a bus probe circuit as an attachment.

The display device 7 performs waveform observation. For example, an oscilloscope is used, but a recording device such as a recorder may be used. The buffer amplifier 8 extracts a signal before operation of the common signal operation circuit 2 and the differential signal operation circuit 3, and receives a signal of the buffer circuit 1 here. The signal before the calculation includes the TPA of the 1394 bus.
+, TPA-, TPB +, and TPB-. Selection circuit 9
Is a circuit for selecting a signal waveform before the operation and a signal waveform after the operation and displaying them on the display device 7. The signal waveform before the operation is the signal of the buffer amplifier 8, and the signal waveform after the operation is the common signal operation. The signals of the circuit 2 and the differential signal operation circuit 3 are selected.

The operation of the thus configured device will be described. First, a configuration for calculating a common signal with low distortion will be described. When selecting and calculating a large-amplitude positive common voltage like a 1394 bus signal and a small-amplitude differential voltage superimposed on this common voltage, a buffer circuit 1 using a high-speed operational amplifier and a common signal operation circuit 2 However, when all the differential signal operation circuits 3 are driven by the same positive and negative power supplies, there is a problem that waveform distortion occurs due to the limitation of the input common voltage of the high-speed operational amplifier.

Since the common signal amplitude of the 1394 bus is only a positive voltage amplitude, it is not necessary for the buffer circuit 1 and the common signal calculation circuit 2 to calculate a negative voltage waveform. Therefore, the buffer circuit 1 and the common signal operation circuit 2 can adopt a configuration in which the power supply voltage is shifted to the positive side to realize an appropriate input common voltage range. For example, when the power supply voltage range of the operational amplifier is 10 V, the negative power supply is set to −3 V and the positive power supply is set to +7 V. This makes it possible to calculate the common signal with low distortion.

By the way, since the differential signal has both positive and negative amplitudes, when a power supply whose power supply voltage is shifted to the positive side is used, the differential signal arithmetic circuit 3 causes waveform distortion in the negative side amplitude. Therefore, the voltage regulator 5 uses a power supply voltage different from the power supply for the buffer circuit 1 and the common signal calculation circuit 2 as the power supply for the differential signal calculation circuit 3 so that the observed differential signal is calculated without distortion. . For example, if the power supply voltage range of the operational amplifier is 10 V, the negative power supply is set to -5 V and the positive power supply is set to +5 V.

In the above embodiment, the buffer amplifier 8 controls the common signal operation circuit 2 and the differential signal operation circuit 3
Although the configuration is such that the signal before the operation is extracted, the present invention is not limited to this, and the signal of the buffer circuit 1 may be directly input to the selection circuit 9. Also,
Here, since the number of input channels of the display device 7 is limited to four, the selection circuit 9 is provided. However, the number of input channels of the display device 7 may be eight or more, and the selection circuit 9 may be omitted.

[0020]

As described above, according to the present invention, since the buffer circuit has a low capacitance and a high input impedance, it does not affect the signal voltage of the signal line. Therefore, the arithmetic circuit can perform the arithmetic operation at high speed and with high accuracy.

Here, the buffer circuit becomes a specific circuit having a low capacitance and a high input impedance when the high-speed current feedback type operational amplifier is operated as a voltage follower circuit. Further, when the buffer circuit and the common voltage calculation circuit are configured to shift the power supply voltage to the common voltage side, the common signal can be calculated with low distortion. Since the differential voltage is smaller than the common voltage, the influence can be ignored. Specifically, since the common voltage on the 1394 bus is a positive voltage, it is preferable to shift the power supply voltage to the positive voltage side. Further, when the differential voltage operation circuit has the same power supply potential on both the positive and negative sides, the differential signal to be observed can be operated without distortion.

According to the present invention, the signal waveform before the operation and the signal waveform after the operation can be displayed on the display recording device by the selection circuit, so that the raw data on the bus of the device to be measured can be observed. Debugging can be done smoothly.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram showing one embodiment of the present invention.

FIG. 2 is an explanatory diagram of a conventional bus waveform measurement.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 buffer circuit 2 common signal operation circuit 3 differential signal operation circuit 7 display recording device 9 selection circuit

Claims (6)

[Claims] 1. A buffer circuit having one or more sets of two signal lines, and a buffer circuit provided for each signal line of a bus for transmitting a bit string signal at a predetermined speed by a differential voltage in each set of signal lines. And a bus probe circuit having an arithmetic circuit for calculating a differential voltage or a common voltage by inputting a signal of the buffer circuit, wherein the buffer circuit has a low capacitance that does not affect the signal voltage of the signal line. A bus probe circuit having a high input impedance. 2. The bus probe circuit according to claim 1, wherein said buffer circuit operates a high-speed current feedback type operational amplifier as a voltage follower circuit. 3. The bus probe circuit according to claim 1, wherein the buffer circuit and the common voltage calculation circuit shift a power supply voltage to a common voltage side. 4. The bus probe circuit according to claim 3, wherein said common voltage is a positive voltage. 5. The bus probe circuit according to claim 1, wherein said differential voltage operation circuit has the same power supply potential on both the positive and negative sides. 6. A buffer circuit having one or more sets of two signal lines, and a buffer circuit provided for each signal line of a bus for transmitting a bit string signal of a predetermined speed by a differential voltage in each set of signal lines. And a bus probe circuit having an arithmetic circuit for calculating a differential voltage or a common voltage by inputting a signal of the buffer circuit, wherein each output signal of the buffer circuit, the differential voltage or the common voltage of the arithmetic circuit is input. And a selection circuit for selecting these and outputting them to a display recording device.