JP2596041Y2 - IC tester - Google Patents

Description

[Detailed description of the invention]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC tester, and more particularly to a DUT (IUT under test) in pin electronics.
C).

[0002]

2. Description of the Related Art Pin electronics is provided with a comparator (window comparator) for judging the amplitude of a signal from a DUT. An input signal is compared with a predetermined level at a predetermined strobe timing, and a subsequent pattern comparator is used. Determines the match with the predetermined pattern,
The quality of C is determined.

[0003]

The window comparator can detect an abnormality that does not exceed the threshold value, but cannot recognize the shape of the actual waveform being measured. For example, in both FIGS. 4A and 4B, the threshold value is exceeded and it is determined to be normal, but there is actually a difference in the voltage level. In both cases of FIGS. 4 (c) and 4 (d), the high level threshold value is not reached and the device is determined to be defective.
Each waveform is very different.

[0004]

In order to achieve the above object, according to the present invention, in a pin electronics of an IC tester, an input bias provided before a comparator for determining the amplitude of an output signal of an IC under test is provided. Current compensation times
Input buffer with
Buffer for waveform monitoring with input signal
And an output pattern of the comparator and a predetermined pattern
Pattern to output data in case of mismatch by comparing
A comparator and a phase memory for storing the output of the pattern comparator.
Digital memory and the output of the analog buffer
An A / D converter for converting the signal into a signal;
The A / D converter performs predetermined processing based on the contents.
Observe the waveform of the output signal of the IC under test from the output of
A work station, the comparator, an input
Buffer and analog buffer are formed inside the same IC
I do.

As shown in FIG. 3, the present inventor connects an IC 2 containing an analog buffer 300 in parallel with an IC 1 containing comparators 100 and 200, and inputs a signal after passing through the buffer to a waveform observation device. In this case, a method of observing waveforms was examined. In this case, however, it was found that waveform quality deteriorated due to the influence of the input bias current I _IB to the buffer and the parasitic input capacitance C _IB , and the measurement accuracy was reduced. Was.

The present invention has been made based on the above considerations, and has as its object to provide a pin electronics of an IC tester, particularly a comparator, with a means for observing a waveform of an input signal determined by the comparator. Provided, DU
Observe the output waveform without adding extra load to T,
The purpose is to improve the reliability of the UT test.

[0007]

According to the present invention, in the pin electronics of an IC tester, an input buffer having an input bias current compensation circuit is provided in front of a comparator which determines the amplitude of an output signal of an IC under test. And a signal supplied to the comparator as an input.
An analog buffer for monitoring a waveform is provided, and the comparator, the input buffer, and the analog buffer are formed inside the same IC.

[0008]

As described above, if the monitor buffer amplifier for waveform observation is connected in the form of an IC separate from the comparator, the parasitic capacitance of the individual IC is added, which causes a problem. However, in the present invention, the parasitic capacitance can be reduced by half by integrating them in one IC.

Next, the configuration for directly inputting a signal from a conventional DUT to a comparator and an analog buffer is eliminated.
A high input impedance and low output impedance input buffer having an input bias current cancel circuit is provided at the first stage, and a signal is supplied through the input buffer. Thereby, the voltage fluctuation due to the input bias current of the signal from the DUT can be extremely reduced. Further, the voltage fluctuation of the transmission signal due to the sink current (input bias current) of the subsequent comparator and analog buffer is compensated by the output of the input buffer having a low output impedance. As a result, the analog buffer for observing the waveform is apparently invisible from the DUT, and it is possible to directly observe the accurate input signal waveform without imposing an extra load on the DUT.

[0010]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing a configuration of an embodiment of the present invention.

The LSI tester 1 of this embodiment has a performance board 2 serving as a test stage for the DUT 3, pin electronics PE, and a workstation 12. The feature of this embodiment in the pin electronics PE is that an input buffer 4 having a function of canceling an input bias current and an analog buffer 7 for monitoring a waveform are provided.

The output signal of the analog buffer amplifier 7 is A
The signal is converted into a digital signal by the / D converter 9 and is displayed on a display (not shown) of the workstation 12 after predetermined processing by the signal processing circuit 11. The outputs of the comparators 5 and 6 are compared with a predetermined pattern by a pattern comparator 8 to detect a match / mismatch, and in the case of a mismatch, the data is recorded in a fail memory 10.

FIG. 2 is a diagram for explaining a specific configuration of the input buffer amplifier 4 and the analog buffer amplifier 7 of FIG. 1. As shown, these two buffer amplifiers 4, 7 and the window comparator 5, 6 is made into one chip.

The input buffer amplifier 4 includes NPN emitter follower transistors Q1 and Q3 and constant current sources (Q2 and Q2).
Q4, Q5, R1, R2, R3, and V _B), which is from an input bias current cancellation circuit (Q6, Q7, Q8, Q9 ).

This input bias current canceling circuit
Inverting the current by a current mirror to sense the collector current I _E3 of transistors Q3, by injecting a current I _C4 to the base of transistor Q1, to cancel the input bias current I _B1. As a result, the input bias current I _B1 becomes 1 μA or less. Voltage fluctuations caused by the input bias currents I _BC1 and I _{BC2 of} the comparators 5 and 6 and the input bias current _IBQ10 of the monitor analog buffer 7 are compensated by the low impedance output of the input buffer 4.

The monitor analog buffer 7 includes an NPN emitter follower transistor Q10 and a current source (V _c ,
Q13) and a voltage dividing and level shifting circuit (R4, R
5, R6, V _D ) and totem pole output stage transistors Q11, Q12.

Since the monitor analog buffer 7 is formed in the same IC as the comparator and the like, and the parasitic capacitance of the wiring in the IC is small, the adverse effect of this capacitance can be ignored.

As described above, the monitor analog buffer 7
Is masked by the input buffer 4 described above and the DUT
, The waveform can be observed under the same conditions as when the monitor buffer is not connected.

The present invention is not limited to the above-described embodiment, but can be modified in various ways. For example, the function of monitoring the waveform generated by the tester itself can be added, and the optimum termination condition and the optimum termination condition can be determined based on the monitoring result. By adding a load of a function that can adjust the values of R and C, it is possible to achieve higher functions and higher accuracy. Also, while performing the actual test, the output of the DUT
Since the signal waveform can be observed, program debugging and
Useful for troubleshooting. For example, DUT output
When observing the signal waveform, simply connect to the input line.
Providing a analog buffer to take out waveform data
Instead, the A / D converter 9 converts the waveform data into IC test data.
Processing at the workstation 12 inside the
On the display (not shown) of the
Eliminates the need for external connection terminals and wiring cables
At the same time, there is an effect that an external measuring instrument becomes unnecessary. You
In other words, it is possible to prevent the IC tester from increasing in size.
You. In addition, diagnose or calibrate the IC tester itself
In this case, the signal output by the IC tester can be detected by itself.
More accurate calibration becomes possible. In particular,
When calibrating an IC tester using a continuous measuring instrument
Between the calibration and the actual test
The school environment is different due to the differences in the surrounding environment.
Although there is a possibility that it will be affected, the A / D
The converter 9 takes in the waveform data and processes it.
The difference in the surrounding environment can be offset more.

[0020]

As described above, according to the present invention, the input buffer amplifier is provided before the comparator and the monitor analog buffer amplifier, and these are formed in the same IC, so that the monitor buffer amplifier is not provided. Under the same conditions as before, the output characteristics of the DUT were measured by a comparator without impairing the original characteristics of the DUT, and high-speed, high-precision waveform observation was possible while judging the quality.

For this reason, when there is a problem in connection with the DUT, observation becomes possible even when the oscilloscope cannot be applied, such as a prober, depending on the connected device. Even when the timing must be specified where a signal enters the tester due to the problem of device driving capability, the test conditions can be easily determined.

Further, even if the test fails occasionally, the cause can be pursued while observing the waveform, so that it can be effectively used for developing a program or troubleshooting on a production line. In particular, the waveform data is stored inside the IC tester.
Processing by the workstation 12 allows
Connection terminals and wiring cables are not required, and external measuring instruments
Is unnecessary, and the size of the IC tester can be prevented from increasing.
It will work. Also, the IC tester itself captures the waveform data.
Accurate diagnosis, etc.
Will be possible.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of an IC tester according to the present invention.

FIG. 2 is a diagram for explaining a specific configuration of an input buffer amplifier 4 and an analog buffer amplifier 7 in FIG.

FIG. 3 is a diagram for explaining matters examined by the present inventors before the present invention.

FIGS. 4A to 4D are waveform charts for explaining the problems of the conventional example.

[Explanation of symbols]

 Reference Signs List 1 LSI tester 2 Performance board 3 DUT (device under test) 4 Input buffer amplifier 5, 6 Comparator 7 Analog buffer amplifier 8 Pattern comparator 9 A / D converter 10 Fail memory 11 Signal processing circuit 12 Workstation PE Pin electronics

Continuation of the front page (56) References JP-A-60-164269 (JP, A) JP-A-1-129175 (JP, A) Japanese Utility Model Application No. 2-34403 (Japanese Utility Model Application No. 3-125278) Microfilm photographing the contents of the attached specification and drawings (JP, U) (58) Fields investigated (Int. Cl. ⁶ , DB name) G01R 31/319 G01R 31/28

Claims (1)

(57) [Scope of request for utility model registration] An input bias current compensation circuit provided before a comparator (5, 6) for judging the amplitude of an output signal of an IC under test in pin electronics of an IC tester.
And an input buffer (4) having an input and a signal supplied to the comparator (5, 6).
An analog buffer (7) for waveform monitoring, and an output pattern of the comparator (5, 6) and a predetermined pattern.
Outputs data when there is a mismatch by comparing turns.
A turn comparator (8) and a fail memory for storing the output of the pattern comparator (8).
The output of the memory (10) and the analog buffer (7) is converted into a digital signal.
A predetermined process based on the contents of the A / D converter (9) for conversion and the contents of the fail memory (10)
And the output of the A / D converter (9)
Workstation for observing waveform of test IC output signal
The comparator, the input buffer and the analog buffer.
That (4,5,6,7) was formed inside the same IC
Characterized IC tester.