JPH11163124A - Partial soi substrate and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method by which a partial SOI substrate having a sufficiently strong jointing strength can be manufactured through a sticking process and a succeeding device manufacturing process, without generating unjointed region at the sticking interface between semiconductor substrates. SOLUTION: At partial formation of an oxidized film on the main surface of one silicon substrate 200 of a pair of semiconductor substrate constituting a partial SOI substrate, heat treatment is performed on the semiconductor substrate 200 including the partially formed oxide film 10b. When this heat treatment is performed, very small recessing and projecting sections 15 left in the end sections of the oxidized film 10a disappear, and the surface of the oxidized film 10a is planarized to the end sections. Therefore, an oxidized film pattern can be completely jointed to the surface of the semiconductor substrate without any area left unjointed after jointing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an SOI substrate manufactured by a bonding method, and more particularly to a partial SOI substrate used for manufacturing an intelligent power device and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, SOI (Silicon-On-
2. Description of the Related Art Multilayer thin film substrates represented by an Insulator substrate have been increasingly applied to high-speed operation and high breakdown voltage power devices. In particular, intelligent power devices (IPD: Intelligent Power)
In the field of power ICs typified by r Devices, the thickness of the SOI layer serving as a device active layer is several μm.
Since the above is required, SO
The manufacture of I-substrates has become mainstream.

[0003] With respect to such an SOI substrate, a vertical power MOSFET having a drain electrode provided on the back surface of the semiconductor substrate is used.
In order to mix the T and the low-power CMOS circuit, it is necessary to partially form an oxide film on the main surface of one of the semiconductor substrates before bonding, and to join the oxide film to the supporting semiconductor substrate.
Since this bonded substrate partially has an SOI structure, it is called a partial SOI substrate.

In such a partial SOI substrate, a bonding interface in a region where an insulating layer is not formed has a vertical power MO.
A perfect junction without voids is required because it corresponds to the drain current passage path of the SFET. However, when the bonding is performed in a case where the insulating layer formed partially on the main surface of the semiconductor substrate is higher than the substrate surface on which the insulating layer is not formed, bonding of the semiconductor substrate surface is performed. Difficult and voids occur. Therefore, in order not to generate such voids, it is necessary to prevent the surface of the insulating layer from being formed at least higher than the surface of the semiconductor substrate.

Therefore, the present inventors have developed a selective oxide film (LOC).
An SOI substrate was manufactured by a method of forming an insulating film pattern having a relatively flat surface by forming OS) twice. FIG. 4 is a cross-sectional view in the order of the manufacturing process for explaining the method for manufacturing the SOI substrate.

First, oxide film 40 is formed on one main surface of single crystal silicon substrate 200, and then nitride film 30 is formed on oxide film 40. Then, a predetermined portion is opened by a conventional photolithography method (see FIG. 4).
(A)).

Next, an oxide film 10a having a thickness of about 1 μm is formed in the opening 300a (see FIG. 4B). Next, the oxide film 10 is etched with a hydrofluoric acid-based etchant using the nitride film 30 as a protective film.
a is completely removed. As a result, a shallow depression 300b of about 0.5 μm is formed in the portion where the oxide film 10a has been removed (see FIG. 4C).

Next, oxidation is performed again under the same oxidation conditions as the removed oxide film 10a to form an oxide film 10b in the opening 300b. The surface of the oxide film 10b is almost the same height as the surface 25 of the single crystal silicon substrate (see FIG. 4D).

Next, the oxide film 10b of the silicon substrate 200
The silicon substrate 100 is formed by using the surface on which
(FIG. 4 (e)). Next, heat treatment is performed at 1000 to 1200 ° C. for about 2 hours to improve the bonding strength.

The above is the outline of the conventional method for manufacturing an SOI substrate. However, this manufacturing method has a problem that voids frequently occur on the entire surface of the substrate. Therefore, the inventors have proposed that the oxide film 10
A bonding method was devised after forming the plane b intentionally lower than the surface 25 of the silicon substrate 200, and a bonding experiment was performed. This result is described in, for example, 280 pages of Proceedings of the 1996 IEICE General Conference.

FIG. 5 is a schematic sectional view shown in this paper. As shown in this figure, oxide film 10 is partially formed on one main surface of silicon substrate 200, and oxide film 10 is formed so as to be lower than the surface of the semiconductor substrate on which no oxide film is formed. Have been. Then, the main surface including the oxide film 10 is used as a bonding surface and the silicon substrate 1
00. The main surface of the silicon substrate 200 that is not bonded is ground and polished to form a silicon thin film 200a. Silicon thin film 200a
At the stage where the oxide film 10 is formed, a region 20 where the silicon substrate 100 and the oxide film 10 are not bonded (hereinafter, referred to as an unbonded region) is left at the end of the oxide film 10. The size of the unbonded region 20 depends on the heat treatment at the time of bonding and the heat treatment during a device formation process performed later. In the experiment, as a result of performing the heat treatment under a condition (1200 ° C., 15 hours) that simulated the assumed heat treatment during the device forming process, it was found that the unbonded region was reduced.

FIG. 6A is a plan view showing an example of a pattern of the insulating film 10. The oxide film 10 has a square shape with a side of about 2 mm and is formed in a square shape. FIG.
FIG. 3 schematically shows the state of bonding of the insulating film 10 shown in FIG. This indicates that the unbonded region 20 having a width of several tens of μm remains so as to surround the bonded region 70.

[0013]

Now, as described above,
The unjoined region of the oxide film edge can be reduced to some extent by the method described in the above prior art. However, it is difficult to completely eliminate this unbonded region. Also,
In the case of a process at a high temperature and without a sufficient heat treatment time, the area ratio of the unjoined region to the joined region increases. As a result, the thinned SOI layer cannot withstand the mechanical shock applied during the device formation process, and may cause partial peeling or cracking of the SOI layer. This is because, as the area ratio of the unbonded region to the bonded region increases, the bonding strength between the SOI layer and the supporting semiconductor substrate decreases.

[0014] The inventors have considered the cause of the remaining unjoined region. FIG. 7 is a view in which the unjoined region is observed from a cross-sectional direction. From this figure, the oxide film 1
At the end of 0, a cavity 20 is seen at the bonding interface, and it can be seen that the surface of the oxide film 10 is raised. Further, small irregularities can be observed on the surface of the oxide film 10. The analysis by AFM (atomic force microscope) showed that the unevenness was present at the very end of the oxide film pattern before bonding. The main surface of the oxide film pattern is
By passing through the heat treatment at the time of bonding and the high-temperature heat treatment at the time of the device formation process described above, it softens and flows,
It is considered to be bonded to the silicon substrate 100. But,
It is presumed that such deformation is unlikely to occur in a region having a certain width at the end of the oxide film after bonding, and an unbonded region is generated.

The present invention has been made in view of the above circumstances, and does not generate an unbonded region at a bonding interface between a semiconductor thin film and a semiconductor substrate as described above, and a bonding step and a subsequent device manufacturing step. To provide a partial SOI substrate having a sufficient bonding strength and a method of manufacturing the same.

[0016]

SUMMARY OF THE INVENTION The present invention provides a partial SOI
When an oxide film is partially formed on a main surface of one of a pair of semiconductor substrates constituting a substrate, heat treatment is performed on the semiconductor substrate including the partially formed oxide film. It is assumed that. By this heat treatment, minute unevenness remaining at the end of the oxide film is eliminated, and the surface of the oxide film is formed flat to the end. Therefore, complete bonding between the oxide film pattern and the semiconductor substrate surface can be achieved without leaving unbonded regions after bonding.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. A. First Embodiment FIGS. 1 and 2 are sectional views in the order of steps showing a manufacturing process of a partial SOI substrate according to a first embodiment of the present invention. As a basic configuration, the partial SOI substrate according to the present embodiment is formed by closely bonding at least two semiconductor substrates 100 and 200 forming a pair with a mirror-polished surface as a bonding surface. One semiconductor substrate 200 has an insulating layer 10a on a part of the main surface serving as the bonding surface.

The method for manufacturing a partial SOI substrate according to the present embodiment shown in FIGS.
A step of forming a first insulating film, a step of removing the first insulating film, a step of forming a second anti-glare layer, a first heat treatment step, a substrate bonding step, a second heat treatment step, and a chamfering step on the outer periphery of the substrate And a grinding / polishing process.

Next, an n − -type single-crystal silicon substrate is used as the semiconductor substrate 200, and an n − -type single-crystal silicon substrate is used as the semiconductor substrate 100, so that the vertical power element and the control circuit element can be monolithically integrated. Optimal part S
The manufacturing method according to the present embodiment will be described in the order of steps, taking an OI substrate as an example.

First, a substrate having a diameter of 5 inches and a thickness of about 600
An n-type single crystal silicon substrate 200 having a thickness of about 1 μm and a resistivity of about 1 Ωcm is prepared. Then, oxide film 40 and subsequently silicon nitride film 30 are formed on one main surface of single crystal silicon substrate 200. Next, a predetermined portion 300a is opened by a conventional photolithography method (see FIG. 1A).

Next, L at 950.degree.
An OCOS oxidation is performed to form an oxide film 10a having a thickness of about 1 μm in the opening 300a (see FIG. 1B). afterwards,
It is immersed in a hydrofluoric acid-based solution, and as shown in FIG.
Groove 30 having a depth of about 0.5 μm by completely removing
0b. Thereafter, LOCOS oxidation is again performed on the trench 300b under the same oxidation conditions as the oxide film 10a, and the oxide film 10b
To form

The surface of the insulating film 10b is formed to be at least lower than the single crystal silicon surface 25 where the insulating film 10b is not formed. Desirably, the relative step between the oxide film 10b and the single-crystal silicon surface 25 is set to 50 nm or more and less than 100 nm. This step may be adjusted by adjusting the time of the second LOCOS oxidation, or wet-etching the surface of the oxide film 10b with a hydrofluoric acid-based solution so that an appropriate oxide film thickness and step are formed.

When the insulating film is formed in this manner, small irregularities 15 remain at the end of the oxide film 10b as shown in FIG. Therefore, the silicon substrate 200 is placed in a non-oxidizing atmosphere such as nitrogen or argon.
A heat treatment is performed at 00 to 1250 ° C. for about 2 hours, and an oxide film 1 is formed.
The unevenness 15 is eliminated by softening the end of the oxide film 10b, and the oxide film 10b is flattened so as to have the same flatness as most of the surface. FIG. 1E shows a cross section of the substrate at a stage where the nitride film 30 and the oxide film 40 on the substrate surface are removed after the heat treatment.

Next, a diameter of 5 inches and a substrate thickness of about 600 μm
An n + -type single crystal silicon substrate 100 having a resistivity of about 0.01 to 0.02 Ωcm is prepared as shown in FIG.
The mirror-polished surface of the n + -type single-crystal silicon substrate 100 and the main surface of the n + -type single-crystal silicon substrate 200 on which the insulating film 10 is formed are opposed to each other in the atmosphere at room temperature and held quietly. To be joined.

Next, in order to strengthen the bonding, 1000 to 12
Heat treatment is performed at 00 ° C. for about 2 hours. Then, KOH
The outer peripheral portion of the substrate 200 is chamfered by silicon etching using a strong solution such as a bath solution or mechanical grinding to remove an unjoined portion between the two substrates (not shown). Further, Y- shown by a dotted line in FIG.
The n + -type single crystal silicon substrate is ground and polished to the Y ′ plane to make the silicon substrate 200 have a desired thickness and flatten its surface, thereby forming an active layer 200a of single crystal silicon on the substrate 100 (FIG. 2). (B)). In this way, the oxide film 10b whose surface is flattened to the end is subjected to heat treatment at the time of bonding and thinning processing to the substrate 10b.
0 can be completely joined.

B. Second Embodiment FIG. 3 is a sectional view for explaining a method of manufacturing a partial SOI substrate according to a second embodiment of the present invention in the order of steps. The partial SOI substrate according to the present embodiment has a basic configuration in which two semiconductor substrates 100 and 200 forming a pair are closely bonded to each other with each mirror-polished surface as a bonding surface. An insulating layer 10 and a silicate glass 50 are provided on a main surface which is a bonding surface of each of the substrates 100 and 200.

The method of manufacturing a partial SOI substrate according to the present embodiment shown in FIG. 3 has, as a basic configuration, a step of forming a shallow groove in a pair of semiconductor substrates, a silicate glass coating step, a reflow step, Mechanical polishing (CM)
P: Chemical-Mechanical
(Polishing), a substrate bonding step,
It has a heat treatment step, a chamfering step on the outer periphery of the substrate, and a grinding / polishing step.

Next, the manufacturing method according to the present embodiment will be described in the order of steps with reference to FIG. First, it has a diameter of 5 inches, a substrate thickness of about 600 μm, and a resistivity of about 0.01 to 0.1 μm.
An n + -type single crystal silicon substrate 100 of 02 Ωcm is prepared.

An oxide film and then a nitride film are formed on one main surface of the n + -type single crystal silicon substrate 100, and a predetermined portion is etched and opened by a commonly used photolithography method (not shown). Next, the surface of the single crystal silicon exposed from the opening is etched by a dry etching method, and a shallow groove 60 having a depth of about 1 μm is formed in the n + -type single crystal silicon substrate 100 as shown in FIG. .

After the nitride film and the oxide film are removed, a silicate glass 50 is applied to a thickness of about 3 μm on the main surface where the shallow groove 60 is formed (see FIG. 3B). Subsequently, reflow is performed by a heat treatment at 800 ° C. or more to flatten the surface of the silicate glass 50. Grooves 60 shallower than this are completely filled with silicate glass.

Subsequently, unnecessary silicate glass on the substrate surface is removed by CMP (see FIG. 3C). The polishing end point of the CMP is determined by removing the silicate glass 50 in a portion other than the shallow groove 60 completely and removing the single crystal silicon substrate 10.
0 is exposed and the surface of the silicate glass 50 embedded in the shallow groove 60 is
This is a point in time when the polishing is performed so as to be at least lower than the main surface of zero.

In this manner, as shown in FIG. 3C, the shallow grooves 60 formed on the main surface of the single crystal silicon substrate 100 are filled with the silicate glass 50, and the other portions expose the single crystal silicon surface. Becomes

On the other hand, the pattern of the insulating film 10 is formed on one main surface of the n − -type single crystal silicon substrate 200 by the method described in the first embodiment.

Next, after completing the step shown in FIG.
The main surface of the + single-crystal silicon substrate 100 and the main surface of the n + -type single crystal silicon substrate 200 on which the insulating film is formed are held facing each other. At this time, an infrared light source is installed on the back surface of one of the single crystal silicon substrates, and an infrared microscope is installed on the opposite side so that infrared transmission images of the two substrates can be observed (not shown). Here, the insulating film patterns for positioning are simultaneously formed in advance on the insulating film patterns respectively formed on the two single crystal silicon substrates. Observing the insulating film pattern for positioning as an infrared transparent vortex image can provide a bright and dark contrast, and this is used to align predetermined insulating film patterns on both substrates. Next, while maintaining this state, the bonding is performed quietly in a clean atmosphere at room temperature. Then, 11
Heat treatment is performed at 00 to 1200 ° C. for about 2 hours. By this heat treatment, the silicate glass 50 is softened, and the powder bonding region 20 can be compensated.

The subsequent steps are the same as those in the first embodiment, and a description thereof will be omitted. In this embodiment, the high-temperature heat treatment for flattening the end of the oxide film as in the first embodiment becomes unnecessary. The silicate glass 50 may be applied by adding a few mole percent of phosphorus and / or boron so that the temperature at which the silicate glass 50 softens becomes lower than that of the insulating film 10. In the bonding step of the substrates, the bonding may be performed not only in the air but also in an oxygen atmosphere or a vacuum.

[0036]

As described above, according to the present invention, it is possible to obtain a bonded portion SOI substrate which has no unbonded region at the bonding interface at the end of the buried insulating film pattern and realizes strong bonding. This is because the surface of the end portion of the insulating film pattern is flattened to facilitate bonding, so that an unbonded region does not remain.

[Brief description of the drawings]

FIG. 1 is a partial SOI according to a first embodiment of the present invention;
FIG. 6 is a process order cross-sectional view for explaining a substrate manufacturing process.

FIG. 2 is a process order sectional view for explaining the manufacturing process.

FIG. 3 is a partial SOI according to the first embodiment of the present invention;
FIG. 6 is a process order cross-sectional view for explaining a substrate manufacturing process.

FIG. 4 is a process order sectional view for explaining a substrate manufacturing process of a conventional partial SOI substrate.

FIG. 5 is a schematic diagram showing a cross-sectional structure of the partial SOI substrate.

FIG. 6 is a plan view showing an insulating film pattern of the partial SOI substrate and a bonded region and a non-bonded region after the substrate bonding in the insulating film pattern.

FIG. 7 is an enlarged cross-sectional view of the unjoined region observed by a microscope.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Oxide film 15 Unevenness of oxide film end 20 Non-joined part of oxide film end 25 Single crystal silicon surface 30 Nitride film 40 Oxide film 50 Silicate glass 60 Groove 70 Join region 100 First semiconductor substrate (silicon substrate) 200 First 2 semiconductor substrate (silicon substrate) 200a semiconductor thin film 300a opening 300b shallow groove

Claims (8)

[Claims] 1. A semiconductor device comprising: at least one pair of semiconductor substrates each having a main surface polished to a mirror surface and closely bonded to each other using each main surface as a bonding surface; Having an insulating layer on a part of the main surface to be a surface, the insulating layer is softened by heat treatment,
The surface has uniform flatness up to the end of the insulating layer, and forms a composite structure by being closely bonded to the main surface of the other semiconductor substrate in the pair of semiconductor substrates. A partial SOI substrate characterized by the above-mentioned. 2. A method for manufacturing a partial SOI substrate using at least one pair of semiconductor substrates each having a main surface mirror-polished, wherein an insulating layer is partially formed on one main surface of the first semiconductor substrate. A layer forming step, a first heat treatment step of flattening an end portion of the insulating layer, a main surface of the first semiconductor substrate on which the insulating layer is formed, and a mirror-polished surface of a second semiconductor substrate. A method for manufacturing a partial SOI substrate, comprising: a bonding step of bonding the semiconductor substrates after they are opposed to each other; and a second heat treatment step of strengthening the bonding of the integrated semiconductor substrate. 3. The method according to claim 2, wherein the first heat treatment is performed at a temperature of 1100 ° C. or higher in a non-oxidizing atmosphere. 4. A semiconductor device comprising: at least one pair of semiconductor substrates, each of which has a main surface polished to a mirror surface;
An insulating layer is provided on a part of the main surface serving as the bonding surface, and a second semiconductor substrate constituting the pair of semiconductor substrates includes a plurality of insulating layers provided on a part of the main surface serving as the bonding surface. The surface of the insulating layer of at least one of the first and second semiconductor substrates has a uniform flatness up to an end of the insulating layer, A partial SOI substrate, wherein a main surface having the insulating layer is opposed to each other, and each of the insulating layers is aligned and closely bonded. 5. The partial SOI substrate according to claim 4, wherein a temperature at which one of the insulating layers softens is lower than a temperature at which the other insulating layer softens. 6. A method for manufacturing a partial SOI substrate using at least one pair of semiconductor substrates each having a main surface polished to a mirror surface, comprising: an insulating layer forming step of partially forming an insulating layer on a first semiconductor substrate; Forming a plurality of shallow grooves on the main surface of the second semiconductor substrate; applying silicate glass to the main surface of the second semiconductor substrate where the shallow grooves are formed; A reflow step of flattening the surface of glass; a polishing step of polishing the flattened surface of the silicate glass to fill only the shallow groove portion; and forming the insulating layer of the first semiconductor substrate. The main surface and the main surface of the second semiconductor substrate having the shallow groove filled with the silicate glass are opposed to each other, and are joined together while performing alignment. A method of manufacturing a partial SOI substrate, comprising: 7. The method for manufacturing a partial SOI substrate according to claim 6, wherein the bonding step is performed in an oxygen atmosphere or a vacuum atmosphere. 8. The method for manufacturing a partial SOI substrate according to claim 6, wherein said silicate glass contains phosphorus or boron or both of them.