JPH11154703A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method by which the forming accuracy of a pattern can be improved by preventing an organic reflection preventing film or resist from being buried in a contact hole by hot reflow and reflection from a step section when the resist is exposed to light. SOLUTION: In a semiconductor device manufacturing method for forming multilayered wiring, the diameter of a contact hole formed through a base substrate is substantially made smaller by forming a reflection preventing film 15 of TiO2 on the surface of the substrate by the sputtering method. Then, after an organic reflection preventing film 16 and a resist 17 are successively applied to the film 15, a wiring pattern is formed by patterning the resist 17. Thereafter, a groove 18 for wiring is formed by selectively etching the part of the base substrate in the upper section of the contact hole by using the resist 17 as a mask and the groove 18 and contact hole are filled up by forming an Al film 19 in the groove 18 and contact hole.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dual damascene process (Dual Damasc
The present invention relates to a method of manufacturing a semiconductor device using an ene process (contact hole forming process), and more particularly to a method of manufacturing a semiconductor device with improved antireflection technology.

[0002]

2. Description of the Related Art In recent years, in a method of manufacturing a semiconductor device,
A dual damascene process that forms a contact hole and a groove for an upper layer wiring connected to the contact hole in an interlayer insulating film and embeds the contact hole and the groove for the wiring with a conductor to realize a multilayer wiring and the like has been attracting attention. I have.

[0003] In this dual damascene process,
An opening pattern is formed in the first resist by the first exposure, a contact hole for connecting to the underlying wiring is formed in the interlayer insulating film using the mask as a mask, and a wiring pattern is formed in the second resist by the second exposure. Then, using this as a mask, an upper layer wiring groove is formed in the interlayer insulating film to be connected to the upper portion of the contact hole. After a conductor is buried and formed in the contact hole and the wiring groove, CMP (Chemec
The surface is flattened by etching back with al Mechanical Polishing). In this process, the process is simplified and the surface is flat, so that the subsequent lithography process can be performed on the flat surface, and the pattern processing accuracy can be improved.

When a desired pattern is exposed on a resist applied and formed on a substrate to be processed, there is a problem that the resist is re-exposed due to reflection from an underlying substrate and the resolution of the pattern is deteriorated. For this reason, a method of applying and forming an organic antireflection film or the like on the surface of a base substrate before applying and forming a resist has been adopted.

FIG. 6 is a sectional view showing a process in which a conventional coating type antireflection film is used for the second exposure in a dual damascene process. FIG. 6A shows an opening formed in the resist 3 by the first exposure, and a contact hole 4 for connecting the lower wiring 1 to the interlayer insulating film 2 using the opening as a mask.
Are open. FIG. 6B shows an organic antireflection film 6 and a resist 7 on the surface of the underlying substrate shown in FIG.
Are sequentially applied, and a wiring pattern is formed on the resist 7 by the second exposure. FIG. 6C shows a state in which the underlying substrate (interlayer insulating film 2) is selectively etched using the resist 7 as a mask.

FIG. 6 (b) shows a conventional coating type antireflection film.
As shown in (1), the coating characteristics are significantly degraded at the deep and steep steps unique to the dual damascene process. For this reason, it is difficult to prevent reflection at the step corner, and
The accuracy of forming a resist pattern in the second exposure is reduced, and the processing accuracy, processed shape, and the like of a wiring groove formed using the resist pattern as a mask are also reduced. In the case of a coating type antireflection film having a strong tendency of thermal reflow, a deep and steep contact hole tends to be completely buried, which makes it difficult to peel off after etching in a later step. Furthermore, the resist tends to fill the contact hole by thermal reflow,
It becomes difficult to remove the resist in the contact hole during development.

[0007]

As described above, conventionally, when a coating type organic anti-reflection film is used at the time of the second exposure in the dual damascene process, the organic anti-reflection film and the inside of the contact hole due to thermal reflow of the resist are used. And there is a problem of separation after etching in a later step. Furthermore, since the organic antireflection film has poor coating characteristics at a steep step portion, reflection from the step portion cannot be prevented, thereby causing a problem of lowering pattern processing accuracy.

The present invention has been made in consideration of the above circumstances, and an object of the present invention is to prevent an organic antireflection film or a resist from being buried in a contact hole due to thermal reflow. It is another object of the present invention to provide a method of manufacturing a semiconductor device, which can prevent reflection from a step portion during resist exposure and can improve pattern processing accuracy.

[0009]

(Structure) In order to solve the above-mentioned problem, the present invention employs the following structure.
That is, according to the present invention (claim 1), in a method of manufacturing a semiconductor device for forming a multilayer wiring or the like, a step of forming an antireflection film made of a metal oxide film on a surface of a substrate having a step; A step of applying and forming a resist on a film, a step of exposing and patterning the resist so that the step portion is exposed, and a step of selectively etching the step upper portion of the substrate using the resist as a mask. Features.

According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device for forming a multilayer wiring or the like, wherein an anti-reflection film made of a metal oxide film is formed on a surface of a base substrate in which a contact hole is formed. A step of substantially reducing the opening diameter of the contact hole by the antireflection film; a step of applying and forming a resist on the antireflection film; and a step of exposing the resist to form an opening in the resist. Selectively etching an upper portion of the contact hole of the substrate using the resist as a mask; and burying a conductor in the contact hole.

According to a third aspect of the present invention, in the method of manufacturing a semiconductor device for forming a multilayer wiring or the like, an anti-reflection film made of a metal oxide film is formed on a surface of a base substrate having a contact hole formed therein. A step of substantially reducing the opening diameter of the contact hole by the antireflection film, a step of sequentially applying and forming an organic antireflection film and a resist on the antireflection film, and exposing the resist to the resist. Forming an opening; selectively etching an upper portion of the contact hole of the substrate using the resist as a mask; and burying a conductor in the contact hole.

Here, preferred embodiments of the present invention include the following. (1) The metal oxide film as the antireflection film is an oxide containing Ti. (2) a metal oxide film as an antireflective film, it is Ti _x O _y or Ti _x Nb _y O _z.

(3) A metal oxide film as an anti-reflection film is formed by sputtering, and the organic anti-reflection film or resist is prevented from being buried in the contact hole by thermal reflow by utilizing the overhang by the sputtering.

(4) The metal oxide film as the antireflection film is an insulator, and the metal oxide film located under the patterned resist should be left after etching the contact hole.

(5) The opening formed in the resist is a linear wiring pattern whose short side (width) is equal to or longer than the opening diameter of the contact hole. (6) Use DUV light (far ultraviolet light) when exposing the resist.

(Function) According to the present invention, by forming an anti-reflection film made of a metal oxide film on the surface of a substrate having a step, the corner of the step can be surely covered with the anti-reflection film. It is possible to prevent reflection from a step corner at the time of exposing the resist formed above. Therefore, it is possible to improve the processing accuracy of the wiring pattern and the like on the surface of the substrate having the step.

Further, by forming an anti-reflection film made of a metal oxide film on the surface of the underlying substrate on which the contact hole is formed, the diameter of the contact hole can be substantially reduced. Burying in a contact hole due to thermal reflow of a resist or a resist can be prevented. Further, by forming a metal oxide film, which is not an organic material, as an anti-reflection film by sputtering or the like, the step corner can be surely covered, and reflection from the step during resist exposure can be prevented. . Therefore, it is possible to improve the pattern processing accuracy of the multilayer wiring and the like.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the present invention will be described below with reference to the illustrated embodiments. 1 and 2 are cross-sectional views for explaining a manufacturing process of a semiconductor device according to an embodiment of the present invention, and particularly show a dual damascene process.

First, as shown in FIG. 1A, a resist pattern is formed on an interlayer insulating film 12 by first exposure, in alignment with a lower wiring 11. In particular,
After forming an interlayer insulating film 12 made of SiO ₂ having a thickness of 1.1 μm so as to cover a lower wiring 11 made of a W film having a thickness of 0.2 μm, a first resist 13 is formed on the interlayer insulating film 12.
0.6 μm thick resist (resist S2 manufactured by JSR)
10J). Subsequently, the pattern of the contact hole is exposed with DUV light, and further subjected to a development process to form a resist pattern. After that, the interlayer insulating film 12 is selectively etched using the resist 13 as a mask,
A contact hole 14 having a diameter of μm is formed.

Next, after removing the resist 13, FIG.
As shown in (b), TiO ₂ as an inorganic anti-reflection film
The film 15 is formed to a thickness of 0.03 μm by a sputtering method.
At this time, since the step coverage of the sputtering method is good, T
The iO ₂ film 15 can reliably cover the upper part of the step in the contact hole 14. Further, by utilizing the overhang of the TiO ₂ film 15 by the sputtering method, the opening area of the contact hole 14 can be reduced. Specifically, the TiO ₂ film 15 covers the surface of the substrate including the contact hole 14 having a diameter of 0.15 μm by 0.02 μm.
Since it covers only about 3 μm, the contact hole 14 is substantially reduced to a diameter of 0.09 μm or less including the overhang portion of the TiO ₂ film 15.

Next, as shown in FIG.
₂ Organic antireflection film 16 and second resist 1 on film 15
7 is applied. At this time, the opening diameter of the contact hole 14 is substantially small due to the formation of the TiO ₂ film 15 (0.
09 μm or less), the organic antireflection film 16 and the resist 17 are not buried in the contact hole 14 by reflow. The organic antireflection film 16 is made of DUV18L (manufactured by Brewer Science).
The resist (the resist S210J manufactured by JSR) having a thickness of 0.6 μm was used as the resist 17.

Next, as shown in FIG. 2D, a resist pattern having an opening having substantially the same diameter as the contact hole is formed by the second exposure. Specifically, DUV
The pattern of the upper layer wiring is exposed on the resist 17 with light, and further developed to form a resist pattern. At this time, since there was almost no reflection from the base, the resist pattern could be formed with high accuracy. Note that the opening of the resist pattern may be larger in diameter than the contact hole.

Next, as shown in FIG. 2E, the organic anti-reflection film 16 and the TiO ₂ film 1 are formed using the resist 17 as a mask.
5 and the interlayer insulating film 12 are selectively etched by, for example, RIE or the like to form wiring grooves 18. The etching depth at this time was 0.4 μm in the interlayer insulating film 12, whereby the depth of the contact hole 14 below the wiring groove 18 was 0.5 μm.

By this etching, the wiring groove 18 can be formed by widening the upper part of the step of the contact hole 14, and the wiring groove 18 can be formed in a good shape without inconvenience such as a large taper unlike the prior art. I was able to. In the etching of the underlying oxide film containing Ti oxide, the etching gas species is B under Al etching conditions.
Using Cl ₃ : Cl ₂ : N ₂ = 70: 70: 5 sccm,
To remove the residue containing Ti oxide, dimethylformamide (DMF) + reducing agent (NH ₂ OH) + NH ₄ F + diethylene glycol monomethyl ether (DMGME)
A mixed solution of + pH adjuster can be used.

Next, as shown in FIG. 2F, after removing the TiO ₂ film 15 remaining in the contact hole 14, an Al film 19 is deposited on the entire surface and etched back by CMP or the like to obtain a contact. An Al film 19 was buried flat in the hole 14 and the wiring groove 18. Since the interlayer insulating film 12 was slightly removed by the CMP, the thickness of the Al wiring layer was about 0.2 μm.

In the above description, the TiO ₂ film 15 as an antireflection film and the interlayer insulating film 12 are etched at the same time. However, the present invention is not limited to this, and as shown in FIG. _{After the 2} film 15 is selectively etched to completely remove the TiO ₂ film 15 in the contact hole 14, the interlayer insulating film 12 may be selectively etched using the resist 17 as a mask. Further, the organic anti-reflection film 16 is formed by coating on the TiO ₂ film 15,
Since O ₂ itself absorbs DUV light and functions as an anti-reflection film, the organic anti-reflection film 16 is omitted and a resist 17 is formed directly on the TiO ₂ film 15 as shown in FIG. It is also possible.

FIG. 4 shows that the antireflection film TiO ₂ (refractive index n = 0.
4467-1.7536) and organic anti-reflective coating DUV18
Simulation data obtained by plotting the underlayer reflectance against the TiO ₂ film thickness when L (manufactured by Brewer Science) is also used. From this figure, it can be seen that 0.03 μm thick TiO ₂
Both layers of the film and the organic antireflection film DRV18L are 0.6 μm
It can be seen that the reflection from the substrate can be suppressed to about 15% or less when used as an anti-reflection underlayer film of a thick resist (resist S210J made by JSR).

Further, as described above, the contact hole is reduced to a diameter of 0.09 μm or less including the overhang portion of the TiO ₂ film by forming the anti-reflection film TiO _2. In addition, embedding of the resist into the contact hole due to thermal reflow can be prevented. For this reason, the problem of the coating characteristics on the stepped substrate (particularly, the characteristics of covering the substrate at the stepped portion) and the problem of peeling after etching in a later step, which the conventional antireflection film has, can be solved.

FIG. 5 is a simulation plotting the base reflectance with respect to the TiO ₂ film thickness when the anti-reflection film TiO ₂ is used (the organic anti-reflection film is not used) by the process of this embodiment. Show data. From this figure, it can be seen that if TiO ₂ having a thickness of 0.01 μm is used as an anti-reflection lower layer film of a resist having a thickness of 0.6 μm (resist S210J manufactured by JSR), the reflection from the substrate can be suppressed to about 5% or less. Even if the TiO ₂ film thickness exceeds 0.01 μm, 2
It can be seen that it can be suppressed to 0% or less.

Further, also in this case, the contact hole is narrowed to a diameter of about 0.1 μm including the overhang portion of the TiO ₂ film by forming the anti-reflection film TiO ₂ . Embedding can be prevented. For this reason, the problem of the coating characteristics on the stepped substrate (particularly, the characteristics of covering the substrate at the stepped portion) and the problem of peeling after etching in a later step, which the conventional antireflection film has, can be solved.

As described above, according to the present embodiment, in forming a multilayer wiring using a dual damascene process,
Before the formation of the resist 17 for the second exposure, a Ti is formed on the surface of the underlying substrate on which the contact holes 14 are formed.
By forming the O ₂ anti-reflection film 15 by a sputtering method, the diameter of the contact hole 14 can be substantially reduced, whereby the organic anti-reflection film 16 and the resist 17 enter the contact hole 14 by thermal reflow. Embedding can be prevented. Moreover, by forming the TiO ₂ anti-reflection film 15 by the sputtering method, the step corner of the contact hole 14 can be surely covered, and reflection from the step at the time of resist exposure can be prevented. For this reason, it is possible to improve the pattern processing accuracy of the multilayer wiring and the like.

Further, since the TiO ₂ anti-reflection film 15 is an insulator, the anti-reflection film 15 can be left in areas other than the contact holes after the etching of the contact holes. Thereby, the process can be simplified.

The present invention is not limited to the above embodiment. In the embodiment, T is used as the anti-reflection film.
Although TiO ₂ was used, it is not limited to this, and Ti _x O _y and Ti _x
It can be used Ti-based oxides such as Nb _y O _z. Further, not only a Ti-based oxide but also a metal oxide having a large absorption for exposure light such as DUV can be used. Further, in the embodiment, the anti-reflection effect by the formation of the metal oxide film is achieved at the second exposure in the dual damascene process for forming the multilayer wiring. It can be applied to lithography. In addition, various modifications can be made without departing from the scope of the present invention.

[0034]

As described above in detail, according to the present invention, an antireflection film made of a metal oxide film is formed as a resist underlayer on the surface of a stepped substrate, especially on the surface of an undersubstrate where contact holes are formed. By doing so, it is possible to prevent the organic antireflection film or the resist from being buried in the contact hole due to thermal reflow, and also to prevent reflection from the step portion during resist exposure. Therefore, it is possible to improve the pattern processing accuracy.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a first half of a manufacturing process of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a sectional view showing the latter half of the manufacturing process of the semiconductor device according to the embodiment of the present invention;

FIG. 3 is a sectional view showing a modification of the present invention.

FIG. 4 is a characteristic diagram showing a change in reflectance with respect to a film thickness of a TiO ₂ antireflection film.

FIG. 5 is a characteristic diagram showing a change in reflectance with respect to the thickness of the TiO ₂ antireflection film.

FIG. 6 is a process cross-sectional view for explaining a problem of the related art.

[Explanation of symbols]

11 ... W film (lower wiring) 12 ... SiO ₂ film (interlayer insulating film) 13 ... first resist 14 ... contact hole 15 ... TiO ₂ film (antireflection film) 16: organic anti-reflective film 17: second resist 18 ... wiring groove 19 ... Al film

Claims (7)

[Claims] A step of forming an antireflection film made of a metal oxide film on a surface of a substrate having a step; a step of applying and forming a resist on the antireflection film; and a step of exposing the resist so that the step portion is exposed. Exposing the substrate to a pattern, and selectively etching an upper portion of the step of the substrate using the resist as a mask. A step of forming an antireflection film made of a metal oxide film on the surface of the base substrate having the contact hole formed therein, and substantially reducing the opening diameter of the contact hole by the antireflection film; Applying a resist on the film, forming an opening in the resist by exposing the resist, selectively etching an upper portion of the contact hole of the substrate using the resist as a mask, Embedding a conductor in the semiconductor device. 3. A step of forming an anti-reflection film made of a metal oxide film on the surface of the underlying substrate on which the contact hole is formed, and substantially reducing the opening diameter of the contact hole by the anti-reflection film; A step of sequentially forming an organic antireflection film and a resist on the film, a step of exposing the resist to form an opening in the resist, and a step of selectively etching the upper part of the contact hole of the substrate using the resist as a mask. Forming a conductor in the contact hole. 4. The method according to claim 1, wherein the metal oxide film as the antireflection film has a thickness of T.
The method for manufacturing a semiconductor device according to claim 1, wherein the oxide is an oxide containing i. 5. The method according to claim 1, wherein the metal oxide film as the anti-reflection film is made of T
i _x O _y or Ti _x Nb _y O The method according to claim 4, wherein the a _z. 6. A method of forming a metal oxide film as said anti-reflection film by sputtering, and preventing the resist or organic anti-reflection film from being buried in a contact hole by thermal reflow by utilizing overhang by said sputtering. The method for manufacturing a semiconductor device according to claim 2, wherein: 7. The method according to claim 1, wherein the metal oxide film serving as the antireflection film is an insulator, and the metal oxide film located below the patterned resist is left after etching the contact hole. A method for manufacturing a semiconductor device according to claim 2.