JPH11145829A - A/d converter having gain control function - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable gain control in the state of suppressing as much as possible the degradation of electrical characteristics, such as S/N with a simple circuit configuration. SOLUTION: An ability variable (digital/analog) D/A converter 35 is provided as a D/A converter for the feedback of an A/D converter 3 in a Δ/Σ system and by supplying a control signal to this A/D converter 35, the conversion gain of the D/A converter 35 on the side of feedback is changed. Thus, the gain can be varied without providing gain variable devices on the input side. Moreover, a comparator 11, a multiplier 13 and a capability fixed D/A converter 14 are provided, and rectifying operation required for AGC is performed by digital processings, so that the A/D converter with AGC function can be realized with the simple circuit in a small scale.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an A / D converter having a gain control function suitable for use in, for example, digital portable equipment with voice input.

[0002]

2. Description of the Related Art Recently, many compact digital audio devices and the like have become widespread due to the development of signal processing technology and miniaturization of electronic circuits. In these digital audio devices, in order to improve sound quality, a so-called 1-bit A / D which is advantageous in terms of noise is used.
An A / D (analog / digital) converter of Σ type is used.

Also, in audio equipment and the like, a gain varying device is provided in order to adjust the audio signal level to an appropriate level. After adjusting the audio signal to an appropriate level in the variable gain device, A / D conversion is performed. It is configured as follows. FIG. 8 shows an A / D having such a variable gain function.
1 shows a conventional configuration of a converter.

In FIG. 8, reference numeral 81 denotes an input terminal. An analog input signal is supplied to a gain varying device 82 via an input terminal 81. As the gain variable device 82, for example, an electronic volume or the like is used. The input signal is adjusted to a predetermined signal level by passing through the variable gain device 82, and the output of the gain control device 82 is supplied to the A / D converter 83. The A / D converter 83 converts the analog input signal into an analog signal by quantizing and encoding.
Digital conversion is performed to convert the data into digital data having a predetermined number of bits. The digital signal formed in the A / D converter 83 is extracted via an output terminal 84.

When it is desired to keep the amplitude level of an output signal constant so as not to exceed a predetermined level, a gain variable device 82 is used as a feedback type configuration as shown in FIG. That is, a signal at a position where the amplitude level is desired to be constant is supplied to the level detection circuit 85. A reference voltage is supplied to the level detection circuit 85 via a terminal 86. The reference voltage level is compared with the signal amplitude level, and an output corresponding to the difference is formed. The output formed in the level detection circuit 85 is used as a control signal for the gain variable device 82, and the input signal level is controlled in the gain variable device 82 so that the amplitude level becomes constant.

Therefore, an automatic gain control function (referred to as AGC) having characteristics as shown in FIG. 10 is realized by the variable gain device 82 and the level detection circuit 85. That is,
When the AGC function is not provided, the linear input / output characteristic as indicated by 87 in FIG. 10 can be changed to the input / output characteristic indicated by 88 in FIG. 10 by operating the AGC function. In the case of a large-amplitude input signal, the gain is suppressed to keep the output level constant, and in the case of a small-amplitude input signal, control is performed to increase the gain and increase the output level.

[0007]

However, in the A / D converter having the AGC function described above, the A / D converter
Since the variable gain device is provided before the converter, a noise component in the variable gain device is added to the input signal, and A / A
There is a problem that the electrical characteristics such as the S / N ratio and the distortion rate of the entire D converter deteriorate.

In order to realize the AGC function, a variable gain device and a level detection circuit are required.
In order to form a single chip having these functions, it is necessary to configure all of these circuits with MOS transistors. However, it is difficult to form all of the conventional gain variable device and level detection circuit with MOS transistors, and even if it is realized, the circuit configuration becomes quite large.
There was a problem that it could not be built in C.

Accordingly, an object of the present invention is to provide an A / D converter having a gain control function capable of adjusting a gain while minimizing deterioration of electrical characteristics such as an S / N ratio. is there.

Another object of the present invention is to provide an A / D converter which has a simple circuit configuration, can be easily formed by MOS transistors or the like, and has a gain control function most suitable for one chip. Is to provide.

[0011]

In order to solve the above-mentioned problems, a first aspect of the present invention is a subtraction means for supplying an analog input signal to one input terminal, and an integration means for integrating an output of the subtraction means. Comparing the output of the integrating means with a predetermined level to generate a digital output, a delay means for delaying the digital output from the comparing means by one sample period, and converting the output of the delay means into an analog signal. An A / D converter having a gain control function, comprising: D / A conversion means for supplying the other input terminal of the subtraction means; and performing gain adjustment by changing the capability of the D / A conversion means. It is.

Further, a polarity judging means for forming and outputting a digital judgment signal corresponding to the polarity of the analog input signal, an arithmetic means for multiplying the output of the polarity judging means by the digital output, and a D / D Means for A / A conversion, and the AGC function can be realized by changing the capability of the D / A conversion means of the first aspect according to the output of the D / A converter.

According to the present invention, the A / D converter of the .DELTA..SIGMA. System is provided with a D / A converter having a variable capacity. Without providing a variable device, the capability of the D / A converter is controlled, resulting in gain control.

Further, in the present invention, a comparator, a multiplier and a fixed-capacity D / A converter are provided to digitize the rectification operation required for the AGC. In the comparator, the analog input signal VI is compared with the reference voltage 2, and a digital polarity signal DP is formed. Then, in the multiplier, the digital polarity signal DP
Is multiplied by the digital output Do, and the output of the multiplier is supplied to a 1-bit D / A converter having a fixed capacity and returned to an analog signal. Then, the output is converted to a direct current and this output is used for gain control. .

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Before describing an embodiment of the present invention, a ΔΣ type A / D converter will be described with reference to FIGS. 1 and 2 in order to facilitate understanding of the present invention. , A / D converter with AGC function FIG.
This will be described with reference to FIG.

As shown in FIG. 1, the A / D converter of the .DELTA..SIGMA. System includes a subtractor 31, an integrator 32, a comparator 33, a one-sample delay unit 34, and a D / A converter for feedback (DAC shown in FIG. 36). The D / A converter 36 is a D / A converter having a fixed conversion gain and a fixed capacity. In FIG. 1, reference numeral 37 denotes an input terminal, and an analog input signal is input to the subtractor 31 via the input terminal 37. In FIG. 1, reference numeral 38 denotes an output terminal through which digital data corresponding to an analog input signal level is output.

FIG. 2 shows a configuration of a switched capacitor type which is a typical circuit of the above-mentioned A / D converter of the ΔΣ method. In FIG. 2, the same reference numerals are given to portions corresponding to FIG.

The input processing section 47 comprises four switch circuits and a capacitor 41, the integrator 32 comprises a capacitor 42 and an OP (operational) amplifier 45, and the D / A converter 36 comprises eight switches. Circuit and 2
It is constituted by the capacitors 43 and 44. The present invention is not limited to a 1-bit D / A converter, but in the following description, the D / A converter will be described as a 1-bit D / A converter whose operation is easy to understand.

Each switch circuit constituting the one-bit D / A converter 36 is controlled by a switch control circuit 48 provided in conjunction with the one-sample delay unit 34, and operates in two steps. The switch circuit of the input processing unit 47
It operates periodically regardless of the digital output DO.

First, in the first step, charging is performed from the input capacitor 41 to the integrating capacitor 42 of the integrator 32, and the capacitor 43 of the 1-bit D / A converter 36 is connected via the terminal 46. The switch circuit is switched to charge the supplied voltage + VFB and discharge the capacitor 44 to the ground level. That is, by the switching operation, the charge of the capacitor 43 and the charge of the capacitor 44 are transferred via the connection point indicated by a in FIG.

In the second step, the integrator 32
Is compared with the ground level in the comparator 33, and in accordance with the result, the charges of the capacitors 43 and 44 of the 1-bit D / A converter 36 are compared with the integrator 32.
And the switch circuit is switched so that the capacitor 41 of the input processing unit 47 is charged with the input voltage for the next processing.

A / D of the ΔΣ method operating as described above
In a converter, the conversion gain is determined by the ratio between the input amount and the feedback amount. In other words, in the case of the switched-capacitor type circuit shown in FIG. 2, signals are transmitted and received using electric charges as a medium, so that the amount of electric charge carried by one switching of the switch circuit is (Q = CV) When the input amount is Q1 and the feedback amount is Q2, the charge amount is expressed by the following equations (1) and (2).

Q1 = C1 × VI (1) Q2 = C2 × VFB (2) In the expression (1), C1 is the capacitance value of the capacitor 41, and C2 in the expression (2) is , Capacitors 43 and 4
4 (ie C43 + C44 / 2, C43
43 is the capacitance value of the capacitor 43, C44 is the capacitance value of the capacitor 44), VI is the input voltage value input via the input terminal 37, and VFB is input via the terminal 46. Gain control voltage.

The conversion gain in this system having a feedback amount can be obtained from the relationship that the switching circuit is switched several times and the total charges during the switching circuit are equal.
The switching frequency of the switch circuit in a predetermined period is n,
If the total charge carried during that time is Q1SUM on the input side and Q2SUM on the feedback side, the total charge is given by the following equations (3) and (4).

Q1SUM = n × C1 × VI (3) Q2SUM = n × C2 × VFB × DO (4) Note that the conditions in the expressions (3) and (4) are (1) and (4). The same as equation (2), and DO in equation (4)
Is digital data output via the output terminal 38.

That is, as described above, the relationship of (Q1SUM = Q2SUM) is established in the total charge amount on the input side and the feedback side, so that the conversion gain is expressed by the following equation (5).

DO / V1 = (C1 / C2) × (1 / VFB) (5) As can be understood from the above equation (5), the input signal level VI is controlled at the preceding stage of the A / D converter. VFB without doing
Can be controlled to vary the gain.
Therefore, in the present invention, the capability (conversion gain) of the 1-bit D / A converter 36 on the feedback side is controlled by controlling the voltage value VFB input via the terminal 46 without controlling the signal level on the input side. To control the gain.

FIG. 3 shows a configuration of an A / D converter having an AGC function. In FIG. 3, the same reference numerals are given to portions corresponding to FIG. To realize the AGC function, a detection circuit for detecting a signal level is required. In FIG. 3, reference numeral 5 denotes a level detection circuit. FIG.
In the level detection circuit 5 having the configuration shown in FIG.
The variable gain device 2 and the level detection circuit 5 are provided so as to adjust the signal input to the converter 3 to a constant value.

The level detection circuit 5 comprises a rectification circuit 51, an LPF (low-pass filter) 52 for removing high-frequency components after rectification, and a differential amplifier 53. FIG. 4 shows a signal waveform after passing through the rectifier circuit 51 and the LPF 52.

In FIG. 3, reference numeral 1 denotes an input terminal, and an analog input signal is input to the gain varying device 2 via the input terminal 1. The gain variable device 2 has a control terminal, and controls an input signal level to a predetermined signal level based on a control signal supplied to the control terminal and outputs the signal.

The output of the variable gain device 2 is an A / D of the ΔΣ type.
It is supplied to the input terminal 37 of the converter 3 and to the rectifier circuit 51. The signal waveform at this time is shown on the left side in FIG. As shown in FIG. 4, an input signal having positive and negative polarities is subjected to full-wave rectification in the rectifier circuit 51, and has a positive polarity waveform as shown in the center in FIG. The output of the rectifier circuit 51 is supplied to the LPF 52. In the LPF 52, the signal of the full-wave rectified waveform is subjected to a smoothing process to be converted into a direct current, and is converted into a direct current signal as shown on the right side in FIG. The output of the LPF 52 is supplied to one input terminal of the differential amplifier 53.

A reference voltage from a reference voltage source is supplied to the other input terminal of the differential amplifier 53 via a terminal 6. The differential amplifier 53 compares the reference voltage with a DC signal from the LPF 52. Then, an output corresponding to the difference is formed. The output of the differential amplifier 53 is supplied to the variable gain device 2 as its control signal.

That is, the differential amplifier 53 outputs the reference voltage and L
By comparing the DC signal from the PF 52 and controlling the gain of the variable gain device 2 so that the difference becomes zero, the signal level input to the A / D converter 3 of the ΔΣ system is made constant. adjust. Specifically, the output of the gain control device 2,
That is, when the amplitude level of the signal input to the A / D converter 3 of the ΔΣ system is smaller than a predetermined level, a + signal is formed in the differential amplifier 53, and this signal is used to generate the gain of the variable gain device 2. Is controlled to rise. Also, conversely,
When the amplitude level of the output signal of the gain control device 2 is larger than a predetermined level, a negative signal is formed in the differential amplifier 53, and the signal is controlled so that the gain of the gain variable device 2 decreases. Thus, the AGC function is realized.

However, it is difficult to configure the above-described gain variable device 2 and rectifier circuit 51 with MOS transistors, and it is difficult to realize the entire system in an IC having a MOS transistor configuration. In order to solve such a problem, in the present invention, M
The processing of the rectifier circuit 51 is digitized so that the OS transistor can be used, and the gain is easily controlled inside the A / D converter 3 using a DC voltage or the like.

An embodiment of the present invention will be described below with reference to FIGS. FIG. 5 shows an overall configuration of an embodiment of the present invention, and FIG. 6 shows signal waveforms of respective units. still,
In FIG. 5, the same reference numerals are given to portions corresponding to FIGS. Also, a D / A converter (D in the figure)
AC) is described as a commonly used 1-bit D / A converter for simplicity.

In FIG. 5, reference numeral 1 denotes an input terminal, and an analog input signal VI as shown in FIG. 6A through the input terminal 1 is used as a subtractor to constitute an A / D converter 3 of the ΔΣ system. The signal is supplied to one of the input terminals of the comparator 11 while being supplied to the + input terminal of the comparator 31.

As shown in FIG. 5, the A / D converter 3 of the .DELTA..SIGMA. System includes a subtractor 31, an integrator 32, a comparator 33, a 1-sample delay unit 34, and a 1-bit D / A converter with variable feedback capability. (Indicated by DAC in the figure).

The 1-bit D / A converter 35 of variable capability, which constitutes the A / D converter 3 of the ΔΣ system, has a control terminal. A control signal corresponding to the above-mentioned VFB is supplied to this control terminal, and the conversion gain is changed according to the control signal. The 1-bit D / A converter 35 of variable capability converts the digital output D0 supplied via the one-sample delay unit 34 into a digital signal based on the control signal and returns it to an analog signal. To the-input terminal.

Therefore, in the A / D converter 3 of the ΔΣ system, gain control is performed, and the difference between the digital output DO and the analog input signal VI one sample period before is successively integrated, thereby obtaining the analog input signal VI. Is 1-bit P
It is converted to a DM (Pulse Density Modulation) signal. Note that the sampling operation frequency in this case is set at an extremely high frequency with respect to the required frequency, and the quantization noise is dispersed over a wide band by the oversampling process, so that the noise density within the signal band can be apparently reduced. .

In FIG. 1, reference numeral 4 denotes an output terminal. Through this output terminal 4, a 1-bit PDM signal shown in FIG. 6B is taken out as a digital output DO. Also, the digital output DO is the digital filter 1
2 is supplied to one input terminal of the multiplier 13.

The A / D converter 3 of the .DELTA..SIGMA. Method includes a considerable amount of high-frequency components in the digital output DO from its characteristics, and it is very difficult to determine the polarity of the signal from this output. For this reason, in this embodiment, a comparator 11, a multiplier 13, and a 1-bit D / A converter 14 having a fixed capacity are provided to digitize the rectification operation.

The analog input signal VI is supplied to one input terminal of the comparator 11 as described above.
Is supplied with a reference voltage 2 from a reference voltage source via a terminal 18. In the comparator 11, comparison processing is performed between the analog input signal VI and the reference voltage 2 (indicated by a broken line in FIG. 6A), and a digital polarity signal DP shown in FIG. 6C is formed. As the comparator 11, for example, a 1-bit D / A converter having the same configuration as the A / D converter 3 of the Δ の method is used.

The polarity signal D generated in the comparator 11
P is supplied to the other input terminal of the multiplier 13. The digital output DO is supplied to one input terminal of the multiplier 13 as described above. The multiplier 13 multiplies the digital polarity signal DP by the digital output DO as shown in FIG. 6D. , Analog input signal VI
Is smaller than the reference voltage 2, the polarity is inverted, and otherwise, a non-inverted output is formed. The output of the multiplier 13 is supplied to a 1-bit D / A converter 14 having a fixed capacity.

In the fixed-bit 1-bit D / A converter 14, the output of the multiplier 13 is returned to an analog signal, and the output of the 1-bit D / A converter 14 is supplied to the LPF 16. In the LPF 16, the output shown in FIG. 6D is subjected to a smoothing process to be converted to a direct current, and the output shown in FIG. 6E is formed. The signal in FIG. 6E has the same waveform as that obtained by subjecting the analog input signal VI to full-wave rectification. The output of the LPF 16 is supplied to one input terminal of the differential amplifier 17.

The other input terminal of the differential amplifier 17 is supplied with a reference voltage 1 from a reference voltage source via a terminal 6.
6 is compared with the DC signal shown in FIG. 6E, and an output corresponding to the difference is formed. The output of the differential amplifier 17 is supplied as a control signal to the control terminal of the 1-bit D / A converter 35 whose capacity is variable as described above. Therefore, by controlling the signal level of the 1-bit D / A converter 35 on the feedback side by the control signal without controlling the signal level on the input side, AG
C is made.

FIG. 7 shows the overall configuration of another embodiment of the present invention. In FIG. 7, the same reference numerals are given to portions corresponding to FIGS. 1, 3, and 5. As shown in FIG. 7, in the case of this other embodiment, the fixed capacity 1
A bit D / A converter 36 and a switch circuit 39 are added. A fixed-capacity 1-bit D / A converter 36 is provided in parallel with the variable-capacity 1-bit D / A converter 35, and its output is supplied to one input terminal of a switch circuit 39.
The output of the variable-capacity 1-bit D / A converter 35 is supplied to the other input terminal of the switch circuit 39, and the output terminal of the switch circuit 39 is supplied to the − input terminal of the subtractor 31.

The switch circuit 39 selects the D / A converter 36 when using a fixed gain, and selects the D / A converter 35 when changing the gain. If there is no need to adjust the signal level, a circuit configuration in which a gain that is advantageous in the electrical characteristics is fixed is selected and used in a state where the electrical characteristics are improved.

In one embodiment and another embodiment of the present invention, the case where the capability of the 1-bit D / A converter 35 is varied by a control signal (corresponding to a switched capacitor type VFB) has been described. However, besides, the capacitance values C1 and C2 in the equation (5) can be varied, or the D / A
It is also possible to perform gain control by replacing the converter.
As an example of another type of D / A converter, there is a multi-bit D / A converter other than the 1-bit D / A converter described above. In addition to analog stepless control, the output of the fixed-capacity D / A converter 14 is directly input to the variable-capacity D / A converter 35 to perform digital stepwise gain control. You may do it.

Further, in one embodiment and another embodiment of the present invention, a configuration has been described in which the digital filter 12 is provided before the multiplier 13 to reduce the LPF characteristic of the D / A conversion output. The digital filter 12 may be provided at the stage subsequent to the digital filter 13 or the digital filter 12 may not be provided.

Further, in one embodiment and another embodiment of the present invention, the configuration in which the analog input signal VI from the input terminal 1 is supplied to the comparator 11 forming the polarity signal has been described. It is also possible to adopt a configuration in which a signal from a device or a circuit provided in the preceding stage of the device is extracted and supplied to the comparator 11.

[0051]

According to the present invention, the A / D converter 3 of the .DELTA..SIGMA. System is provided with a D / A converter having a variable capacity, and a control signal is supplied to a control terminal of the D / A converter to thereby provide an input. The gain control is performed by controlling the capability of the D / A converter on the feedback side without changing the capability of the D / A converter on the feedback side. Therefore, according to the present invention, the gain adjustment can be performed while minimizing the deterioration of the electrical characteristics such as the S / N ratio.

In the present invention, a comparator, a multiplier, and a fixed-capacity D / A converter are provided, and the rectification operation required for AGC is performed by digital processing. Therefore, according to the present invention, the circuit configuration is simplified, and the rectification operation is realized by a simple circuit that can be configured by MOS transistors or the like, so that the entire A / D converter having the AGC function can be realized. It can be made into one chip.

[Brief description of the drawings]

FIG. 1 is a block diagram used for describing an A / D converter of a ΔΣ method.

FIG. 2 is a block diagram showing a specific example of an A / D converter of the ΔΣ system.

FIG. 3 is a block diagram used for describing an A / D converter with an AGC function.

FIG. 4 is an explanatory diagram used for describing the operation of the main part in FIG. 3;

FIG. 5 is a block diagram of one embodiment of the present invention.

FIG. 6 is a waveform chart used for describing the operation of the embodiment of the present invention.

FIG. 7 is a block diagram of another embodiment of the present invention.

FIG. 8 is a block diagram of an example of a conventional configuration.

FIG. 9 is a block diagram of another example of a conventional configuration.

FIG. 10 is an input / output characteristic diagram used for describing a conventional configuration.

[Explanation of symbols]

1 ... input terminal, 3 ... A / D converter of ΔΣ system,
4 ... output terminal, 11 ... comparator, 13 ... multiplier, 14 ... 1-bit D / A converter with fixed capability, 16
... LPF, 17 ... Differential amplifier, 31 ... Subtractor, 32 ... Integrator, 33 ... Comparator, 34 ...
1 sample delay device, 35 1-bit D /
A converter, 36 ... 1-bit D / A converter with variable capability

Claims (3)

[Claims] 1. An subtracting means for supplying an analog input signal to one input terminal, an integrating means for integrating an output of the subtracting means, and comparing an output of the integrating means with a predetermined level to generate a digital output. A delay means for delaying the digital output from the comparison means by one sample period; a first D / D converter for converting the output of the delay means into an analog signal and supplying the analog signal to the other input terminal of the subtraction means A gain control function, comprising: A conversion means for performing gain adjustment by changing the performance of the first D / A conversion means.
/ D converter. 2. The A / D converter according to claim 1, further comprising: polarity determination means for forming and outputting a digital determination signal corresponding to the polarity of said analog input signal; An arithmetic means for multiplying the digital output; and a second D / A conversion means for D / A converting the output of the arithmetic means, wherein the first D / A conversion means outputs D
An A / D converter having a gain control function, wherein the A / D converter changes the capability of the A / D converter. 3. The A / D converter according to claim 1, further comprising a third D / A converter having a fixed capacity, wherein said third D / A converter and said first D / A converter are provided. A having a gain control function, wherein
/ D converter.