JP2002214259A - Frequency analyzer - Google Patents

Frequency analyzer

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Publication number
JP2002214259A
JP2002214259A JP2001013391A JP2001013391A JP2002214259A JP 2002214259 A JP2002214259 A JP 2002214259A JP 2001013391 A JP2001013391 A JP 2001013391A JP 2001013391 A JP2001013391 A JP 2001013391A JP 2002214259 A JP2002214259 A JP 2002214259A
Authority
JP
Japan
Prior art keywords
frequency
converter
signal
noise
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001013391A
Other languages
Japanese (ja)
Inventor
Masumi Nagahora
真澄 永洞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyo Communication Equipment Co Ltd
Original Assignee
Toyo Communication Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyo Communication Equipment Co Ltd filed Critical Toyo Communication Equipment Co Ltd
Priority to JP2001013391A priority Critical patent/JP2002214259A/en
Publication of JP2002214259A publication Critical patent/JP2002214259A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide a frequency analyzer which can extremely restrict noises generated by sufficiently utilizing the dynamic range of an A/D converter. SOLUTION: In the frequency analyzer, the gain of an automatic gain control amplifier 1 is controlled so as to restrict output noise components of the A/D convertor 3 as generated in proportion to the respective squares of an input voltage and a frequency of the A/D convertor 3. Based on the frequency spectrum information, factors contributing to the output noise components of frequency components and totalled covering the frequency components to be defined as an output noise control value. The gain of the automatic gain control amplifier 1 is controlled so as to hold the output noise control value below a specified reference value.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はアナログ信号の周波
数スペクトラム成分を解析する周波数分析装置に関す
る。
The present invention relates to a frequency analyzer for analyzing a frequency spectrum component of an analog signal.

【0002】[0002]

【従来の技術】従来より、アナログ信号の周波数成分を
調べる為にスペクトラムアナライザやFFTアナライザ
等の周波数分析装置が利用されている。例えば、所定の
アナログ信号をFFTアナライザに入力すると、入力し
た信号は高速デジタル処理され信号に含まれる周波数成
分が抽出される。そして、各周波数成分ごとに電力値
(電圧値)や周波数を周波数分析装置の表示画面で直読
できるようになっている。
2. Description of the Related Art Hitherto, a frequency analyzer such as a spectrum analyzer or an FFT analyzer has been used to check a frequency component of an analog signal. For example, when a predetermined analog signal is input to an FFT analyzer, the input signal is subjected to high-speed digital processing and frequency components included in the signal are extracted. The power value (voltage value) and frequency for each frequency component can be read directly on the display screen of the frequency analyzer.

【0003】図2は従来の周波数分析装置の一例を示し
たものである。図2に示すように、従来の周波数分析装
置はアナログ信号を所定電圧まで増幅するAGC増幅器
1と、前記AGC増幅器1が増幅したアナログ信号の高
調波成分を除去する低域通過フィルタ2と、前記低域通
過フィルタ2で濾波されたアナログ信号をサンプリング
しデジタル信号に変換するA/D変換器3と、前記A/
D変換器3にサンプリングクロックを供給するクロック
発振器4と、前記A/D変換器3が出力するデジタル信
号を基にA/D変換器3の入力電圧を検出し前記AGC
増幅器1の利得を制御するAGC制御部5と、A/D変
換器3から供給されたデジタル信号を高速フーリエ変換
処理し所定の周波数スペクトラム情報を出力するFFT
(Fast Fourier Transform)手
段6を備えている。
FIG. 2 shows an example of a conventional frequency analyzer. As shown in FIG. 2, the conventional frequency analyzer includes an AGC amplifier 1 for amplifying an analog signal to a predetermined voltage, a low-pass filter 2 for removing harmonic components of the analog signal amplified by the AGC amplifier 1, An A / D converter 3 for sampling an analog signal filtered by the low-pass filter 2 and converting the analog signal into a digital signal;
A clock oscillator 4 for supplying a sampling clock to the D converter 3 and an input signal of the A / D converter 3 are detected based on a digital signal output from the A / D converter 3 and the AGC is performed.
An AGC control unit 5 for controlling the gain of the amplifier 1 and an FFT for performing a fast Fourier transform process on the digital signal supplied from the A / D converter 3 and outputting predetermined frequency spectrum information
(Fast Fourier Transform) means 6.

【0004】図2に示した従来の周波数分析装置は以下
のように動作する。まず、AGC増幅器1に信号が入力
されない状態では、A/D変換器3にはアナログ信号が
供給されないのでA/D変換器3の出力も断となってい
る。よって、AGC制御部5はAGC増幅器1の利得を
増加させる方向に制御し前記利得は最大利得で止まった
状態で維持される。そこで、アナログ信号を入力すると
AGC増幅器1はこれを最大利得で増幅し低域通過フィ
ルタ2を介してA/D変換器3に供給する。A/D変換
器3はこれをデジタル信号に変換しAGC制御部5に供
給する。AGC制御部5は前記デジタル信号を検出しA
/D変換器3の入力電圧が所定値に収束するまでAGC
増幅器1の利得を減少ずるよう制御しつづけ、最終的に
AGC増幅器1の利得は入力信号の電圧値に応じて所定
利得に収束する。そして、A/D変換器3が出力するデ
ジタル信号をFFT手段で処理し所望の周波数スペクト
ラム情報を出力し、これを所定の表示画面に表示させる
ようになっている。
The conventional frequency analyzer shown in FIG. 2 operates as follows. First, when no signal is input to the AGC amplifier 1, the analog signal is not supplied to the A / D converter 3, so that the output of the A / D converter 3 is also turned off. Therefore, the AGC control unit 5 controls the AGC amplifier 1 to increase the gain, and the gain is maintained at the maximum gain. Therefore, when an analog signal is input, the AGC amplifier 1 amplifies the signal at the maximum gain and supplies the signal to the A / D converter 3 via the low-pass filter 2. The A / D converter 3 converts this into a digital signal and supplies it to the AGC controller 5. The AGC control unit 5 detects the digital signal and
AGC until the input voltage of the / D converter 3 converges to a predetermined value
Control is continued to reduce the gain of the amplifier 1, and finally the gain of the AGC amplifier 1 converges to a predetermined gain according to the voltage value of the input signal. The digital signal output from the A / D converter 3 is processed by the FFT means to output desired frequency spectrum information, which is displayed on a predetermined display screen.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、従来の
周波数分析装置には以下のような問題点が存在する。す
なわち、前記A/D変換器3の入力電圧値はA/D変換
器のダイナミックレンジ範囲内で極力大きい値を設定す
るのが好ましい。しかし、A/D変換器3の入力電圧値
を大きくとりすぎると逆にA/D変換器3の出力雑音が
急激に増大してしまうという問題が発生する。
However, the conventional frequency analyzer has the following problems. That is, it is preferable to set the input voltage value of the A / D converter 3 as large as possible within the dynamic range of the A / D converter. However, if the input voltage value of the A / D converter 3 is set too large, a problem occurs that the output noise of the A / D converter 3 sharply increases.

【0006】一般的にA/D変換器の出力雑音Nは、サ
ンプリングクロックのアパーチャジッタによる雑音Na
jと、微分非直線性雑音Ndと、量子化雑音を含む熱雑
音Nqによって次式のように表される。 N=Naj+Nd+Nq (1) 図3は一般的なA/D変換器が出力する雑音Nの電力変
化を示したものである。図3に示すように、A/D変換
器の入力電圧値が小さいときには、A/D変換器の出力
する雑音Nは殆ど一定であり前記微分非直線性雑音Nd
と、量子化雑音を含む熱雑音Nqが支配的に寄与してい
る。ところが、入力電圧が高くなると前記Najが支配
的に寄与するようになり、出力雑音Nが急激に増大して
しまう。
Generally, the output noise N of the A / D converter is the noise Na due to the aperture jitter of the sampling clock.
j, differential nonlinear noise Nd, and thermal noise Nq including quantization noise are represented by the following equation. N = Naj + Nd + Nq (1) FIG. 3 shows a change in power of noise N output from a general A / D converter. As shown in FIG. 3, when the input voltage value of the A / D converter is small, the noise N output from the A / D converter is almost constant and the differential nonlinear noise Nd
And thermal noise Nq including quantization noise dominantly contribute. However, when the input voltage increases, Naj predominantly contributes, and the output noise N sharply increases.

【0007】ここで、前記サンプリングクロックのアパ
ーチャジッタに起因する雑音成分Najは次式で示すこ
とが知られている。 Naj=2(πfinAσ)2 (2) (fin:入力信号の周波数、A:入力信号の振幅電
圧、σ:サンプリングクロックのアパーチャジッタ量)
Here, it is known that the noise component Naj caused by the aperture jitter of the sampling clock is represented by the following equation. Naj = 2 (πfinAσ) 2 (2) (fin: frequency of input signal, A: amplitude voltage of input signal, σ: aperture jitter amount of sampling clock)

【0008】従って、Najは入力信号の周波数と振幅
電圧の2乗に比例するので、A/D変換器の入力信号に
最大周波数を想定し、A/D変換器の入力電圧を極力A
点に近いポイントに設定し、AGC増幅器の出力電圧を
設定している。ところが、前記A点は周波数が異なると
変化し、想定している最大周波数よりも低い周波数の信
号が入力された場合、Najが支配的となるポイントが
A点からA’点へと変化するのでA/D変換器のダイナ
ミックレンジを充分活用することが出来ない。よって、
微少なレベルの信号を扱う際には不利なものとなる。
Accordingly, since Naj is proportional to the frequency of the input signal and the square of the amplitude voltage, the maximum frequency is assumed for the input signal of the A / D converter, and the input voltage of the A / D converter is set to A as much as possible.
A point close to the point is set, and the output voltage of the AGC amplifier is set. However, the point A changes when the frequency is different, and when a signal having a frequency lower than the assumed maximum frequency is input, the point where Naj becomes dominant changes from the point A to the point A ′. The dynamic range of the A / D converter cannot be fully utilized. Therefore,
This is disadvantageous when dealing with very low level signals.

【0009】また、A/D変換器の出力雑音Nを改善す
るために、A/D変換器のサンプリングクロックの周波
数を高くすると、量子化雑音Nqの全電力値は変わらな
いが図4に示すようにその雑音電力密度が(1Hz当た
りの雑音電力)が変化し等価的に量子化雑音Nqを低減
させることが可能である。しかし、前記サンプリングク
ロックを高くするだけでは、Najを抑えることはでき
ないし、またサンプリングクロックの周波数を高くする
と高速のA/D変換器が必要となり、また消費電力が増
大してしまうこともあって有効な手段とは言い難い。
When the frequency of the sampling clock of the A / D converter is increased to improve the output noise N of the A / D converter, the total power value of the quantization noise Nq does not change, but is shown in FIG. As described above, the noise power density (noise power per 1 Hz) changes, and it is possible to equivalently reduce the quantization noise Nq. However, Naj cannot be suppressed only by increasing the sampling clock, and if the frequency of the sampling clock is increased, a high-speed A / D converter is required, and power consumption may increase. It is hardly an effective means.

【0010】本発明は上記問題点を解決するためになさ
れたものであって、入力信号の周波数に応じてA/D変
換器の入力電圧を最適化し、A/D変換器の出力雑音を
抑えることのできる周波数分析装置を提供することを目
的とする。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problem, and it is an object of the present invention to optimize an input voltage of an A / D converter in accordance with a frequency of an input signal and suppress output noise of the A / D converter. It is an object of the present invention to provide a frequency analysis device that can perform the analysis.

【0011】[0011]

【課題を解決しようとする手段】上記問題を解決するた
めに本発明に係わる請求項1記載の発明は、アナログ信
号を所定電圧まで増幅する自動利得制御増幅器と、前記
自動利得制御増幅器が供給する所定電圧の信号をサンプ
リングしデジタル信号に変換するA/D変換器と、前記
A/D変換器の出力するデジタル信号を処理し前記アナ
ログ信号に含まれる周波数成分の周波数及び電力を周波
数スペクトラム情報として出力するフーリエ変換手段と
を備えた周波数分析装置において、前記A/D変換器の
入力電圧と周波数のそれぞれの2乗に比例して発生する
A/D変換器の出力雑音成分を抑えるように前記自動利
得制御増幅器の利得を制御したものであって、該周波数
スペクトラム情報を基に周波数成分の前記出力雑音成分
に寄与する要素を計算し、前記要素を周波数成分全てに
渡って合計したものを出力雑音制御値とし、前記出力雑
音制御値が所定の基準値の範囲内となるように前記自動
利得制御増幅器の利得を制御したものである。
SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, according to the present invention, there is provided an automatic gain control amplifier for amplifying an analog signal to a predetermined voltage, and the automatic gain control amplifier supplies the automatic gain control amplifier. An A / D converter that samples a signal of a predetermined voltage and converts the signal into a digital signal; and processes a digital signal output from the A / D converter to convert the frequency and power of a frequency component included in the analog signal into frequency spectrum information. A frequency analysis device provided with a Fourier transforming means for outputting the output noise component of the A / D converter, which is generated in proportion to the square of each of the input voltage and the frequency of the A / D converter. An element that controls the gain of the automatic gain control amplifier and that contributes to the output noise component of the frequency component based on the frequency spectrum information. The output noise control value is obtained by summing the elements over all frequency components, and the gain of the automatic gain control amplifier is controlled such that the output noise control value is within a predetermined reference value range. It is.

【0012】本発明に係わる請求項2記載の発明は、前
記周波数スペクトラム情報を基に各周波数成分で電力値
が最小の周波数成分を選択して該電力値最小の周波数成
分の信号対雑音比を計算し、前記信号対雑音比が所定値
以上を維持するように、前記A/D変換器のサンプリン
グクロックの周波数を制御して該A/D変換器の量子化
雑音成分を抑えたものである。
According to a second aspect of the present invention, a frequency component having a minimum power value in each frequency component is selected based on the frequency spectrum information, and a signal-to-noise ratio of the frequency component having the minimum power value is determined. After the calculation, the frequency of the sampling clock of the A / D converter is controlled so that the signal-to-noise ratio is maintained at a predetermined value or more to suppress the quantization noise component of the A / D converter. .

【0013】[0013]

【発明の実施の形態】以下図示した実施の形態例に基づ
いて本発明を詳細に説明する。図1は本発明に係わる周
波数分析装置の実施の形態例を示すブロック図である。
図1に示した本発明に係わる周波数分析装置は、アナロ
グ信号を所定電圧まで増幅するAGC増幅器1と、前記
AGC増幅器1が増幅したアナログ信号の高調波成分を
除去する低域通過フィルタ2と、前記低域通過フィルタ
2で濾波されたアナログ信号をサンプリングしデジタル
信号に変換するA/D変換器3と、前記A/D変換器3
が供給するデジタル信号を高速フーリエ変換処理し所定
の周波数スペクトラム情報を出力するFFT(Fast
Fourier Transform)手段6と、前
記FFT手段6から供給される周波数スペクトラム情報
を基にA/D変換器3の出力雑音を計算して所定の基準
値と比較し検出信号を発生する検出制御部7と、前記検
出制御部7の供給する検出信号に従いAGC増幅器1の
利得を制御するAGC制御部8と、出力検出制御部7が
供給するクロック制御信号に従いA/D変換器3に最適
な周波数のサンプリングクロックを供給するクロック制
御部9とを備えている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail based on illustrated embodiments. FIG. 1 is a block diagram showing an embodiment of a frequency analysis device according to the present invention.
The frequency analyzer according to the present invention shown in FIG. 1 includes an AGC amplifier 1 for amplifying an analog signal to a predetermined voltage, a low-pass filter 2 for removing a harmonic component of the analog signal amplified by the AGC amplifier 1, An A / D converter 3 for sampling an analog signal filtered by the low-pass filter 2 and converting it into a digital signal;
(FFT) that performs fast Fourier transform processing on the digital signal supplied by the FFT and outputs predetermined frequency spectrum information
(Fourier Transform) means 6 and a detection control unit 7 which calculates an output noise of the A / D converter 3 based on the frequency spectrum information supplied from the FFT means 6 and compares it with a predetermined reference value to generate a detection signal. An AGC control unit 8 for controlling the gain of the AGC amplifier 1 in accordance with the detection signal supplied by the detection control unit 7, and an AGC control unit 8 having an optimum frequency for the A / D converter 3 in accordance with a clock control signal supplied by the output detection control unit 7. A clock control unit 9 for supplying a sampling clock;

【0014】以下図1に示した周波数分析装置について
その動作を説明する。まず、AGC増幅器1に信号が入
力されない状態において、AGC制御部8が供給する利
得制御信号に従いAGC増幅器1は最大利得に設定され
ている。そこで、AGC増幅器1に所定のアナログ信号
を入力すると、AGC増幅器1はこれを最大利得で増幅
し低域フィルタ2で高調波成分を除去後A/D変換器3
に供給する。A/D変換器3は増幅されたアナログ信号
をクロック制御部9の供給するサンプリングクロックで
サンプリングしデジタル信号に変換すると共にFFT手
段6に供給する。FFT手段6は前記デジタル信号を高
速フーリエ変換処理し該アナログ信号に含まれる周波数
成分を周波数スペクトラム情報として出力するとともに
検出制御部7に供給する。
The operation of the frequency analyzer shown in FIG. 1 will be described below. First, when no signal is input to the AGC amplifier 1, the AGC amplifier 1 is set to the maximum gain in accordance with the gain control signal supplied by the AGC control unit 8. Then, when a predetermined analog signal is input to the AGC amplifier 1, the AGC amplifier 1 amplifies the signal with the maximum gain, removes the harmonic component by the low-pass filter 2, and removes the A / D converter
To supply. The A / D converter 3 samples the amplified analog signal with a sampling clock supplied from the clock controller 9, converts the sampled analog signal into a digital signal, and supplies the digital signal to the FFT means 6. The FFT means 6 performs fast Fourier transform processing on the digital signal, outputs frequency components contained in the analog signal as frequency spectrum information, and supplies the frequency component to the detection control unit 7.

【0015】検出制御部7は前記周波数スペクトラム情
報に基づきアナログ信号(=S)を構成する主要な周波
数成分S1、S2、S3、・・・・・・Snの周波数及
び電力値(或いは電圧値)を入手する。さらに、検出制
御部7は各周波数成分S1、S2、S3、・・・・・S
nの周周波数及び電力値(電圧値)の情報から各周波数
成分毎にA/D変換器3の出力雑音Najを計算する。
ここで(2)式に基づいて各周波数成分の雑音電力Na
jに対する寄与分(要素)としてNaj(S1)、Na
j(S2)、Naj(S3)、・・・・・Naj(S
n)を計算しこれを合計したものを出力雑音Najとし
ている。
The detection control unit 7 performs frequency and power values (or voltage values) of main frequency components S1, S2, S3,... Sn constituting an analog signal (= S) based on the frequency spectrum information. Get. Further, the detection control unit 7 determines the frequency components S1, S2, S3,.
The output noise Naj of the A / D converter 3 is calculated for each frequency component from information on the peripheral frequency of n and the power value (voltage value).
Here, the noise power Na of each frequency component is calculated based on the equation (2).
Naj (S1), Na as a contribution (element) to j
j (S2), Naj (S3),... Naj (S
n) is calculated and the sum of the calculated values is defined as output noise Naj.

【0016】そして、前記出力雑音Najを雑音制御値
として保持し予め設定した基準値と比較する。ここで、
検出制御部7は雑音制御値が基準値より大きい場合は、
検出信号を出力しAGC増幅器1の利得を減少するよう
にAGC制御部5に指示し、雑音制御値が基準値より小
さい場合は、AGC増幅器1の利得を増加するようにA
GC制御部5に指示する。ここでは、AGC増幅器1の
利得が最大であり雑音制御値が基準値よりも大きくなっ
ているので、検出制御部7は検出信号を出力しAGC増
幅器1の利得を所定分(例えば1dBステップ)減少さ
せるようAGC制御部8に指示する。
Then, the output noise Naj is held as a noise control value and is compared with a preset reference value. here,
When the noise control value is larger than the reference value, the detection control unit 7
A detection signal is output to instruct the AGC control unit 5 to decrease the gain of the AGC amplifier 1, and when the noise control value is smaller than the reference value, A is increased to increase the gain of the AGC amplifier 1.
An instruction is given to the GC control unit 5. Here, since the gain of the AGC amplifier 1 is the maximum and the noise control value is larger than the reference value, the detection control unit 7 outputs a detection signal and decreases the gain of the AGC amplifier 1 by a predetermined amount (for example, 1 dB step). The AGC control unit 8 is instructed to perform the operation.

【0017】AGC制御部8は前記検出信号に従い利得
制御信号を出力しAGC増幅器1の利得を所定分(例え
ば1dBステップ)減少させる。AGC制御部5は再び
新たに設定された利得でアナログ信号を増幅しこれを低
域フィルタ2を介してA/D変換器3に供給する。そし
てA/D変換器3は再びこれをデジタル信号に変換しF
FT手段6に供給する。FFT手段6はさらにこれを処
理し再びスペクトラム情報を生成し検出制御部7に供給
する。以上を繰り返すと、AGC増幅器1の利得が順次
減少していくに従い検出制御部7で計算する雑音制御値
も減少していくことになる。そして雑音制御値が基準値
(NREF)の範囲内になったら検出制御部7は検出信
号を出力しAGC増幅器1の利得を固定するようにAG
C制御部8に指示する。
The AGC control section 8 outputs a gain control signal in accordance with the detection signal to reduce the gain of the AGC amplifier 1 by a predetermined amount (for example, 1 dB step). The AGC control unit 5 amplifies the analog signal again with the newly set gain, and supplies this to the A / D converter 3 via the low-pass filter 2. The A / D converter 3 converts this into a digital signal again, and
It is supplied to the FT means 6. The FFT means 6 processes this further, generates spectrum information again, and supplies it to the detection control unit 7. By repeating the above, the noise control value calculated by the detection control unit 7 also decreases as the gain of the AGC amplifier 1 gradually decreases. When the noise control value falls within the range of the reference value (NREF), the detection control section 7 outputs a detection signal and sets the AG so that the gain of the AGC amplifier 1 is fixed.
Instruct C control unit 8.

【0018】ここで、前記基準値はA/D変換器の出力
で発生する量子化雑音Nqと微分非線形雑音Ndとを
(1)式に従い事前に計算しておき、これを参考にして
適当な値を設定するが、これらを事前に実測したものを
基準値を設定する上での参考値としてもよい。このよう
にして、入力したアナログ信号の周波数スペクトラム情
報をFFT手段6で計算し、これを基に計算したA/D
変換器3の出力雑音電力(電圧)を保持させ基準値の範
囲内となるようにAGC増幅器1の利得を制御するよう
にしたので、A/D変換器3の出力雑音が増大しないよ
うにAGC増幅器1の利得は入力周波数に応じて最適化
される。
Here, the reference value is obtained by previously calculating the quantization noise Nq and the differential non-linear noise Nd generated at the output of the A / D converter according to the equation (1), and referring to this, an appropriate value is obtained. Although the values are set, those actually measured in advance may be used as reference values for setting the reference values. In this manner, the frequency spectrum information of the input analog signal is calculated by the FFT means 6, and the A / D calculated based on this is calculated.
Since the output noise power (voltage) of the converter 3 is held and the gain of the AGC amplifier 1 is controlled so as to be within the range of the reference value, the AGC is controlled so that the output noise of the A / D converter 3 does not increase. The gain of the amplifier 1 is optimized according to the input frequency.

【0019】次に、A/D変換器3のサンプリングクロ
ックの周波数の制御例について説明する。上述したAG
C増幅器1の利得制御が完了した状態でクロック制御部
9からはサンプリングクロック(最大周波数)がA/D
変換器3に供給されている。検出制御部7はFFT手段
6から入手した周波数スペクトラム情報にしたがい、最
も信号レベルの低い周波数成分(Smin)を選択す
る。そして、Sminの信号対雑音比(Smin/N)
を計算する。ここで、前記雑音NはFFT手段6で入手
したスペクトラム情報に基づき所定帯域の雑音電力を計
算したものであるが、雑音電力を計算するにあたり主要
な周波数成分が占有する帯域については雑音電力を計算
する対象領域から除外しておくことはいうまでもない。
Next, an example of controlling the frequency of the sampling clock of the A / D converter 3 will be described. AG mentioned above
When the gain control of the C amplifier 1 is completed, the sampling clock (maximum frequency) is supplied from the clock control unit 9 to the A / D converter.
It is supplied to the converter 3. The detection controller 7 selects a frequency component (Smin) having the lowest signal level according to the frequency spectrum information obtained from the FFT means 6. Then, the signal-to-noise ratio of Smin (Smin / N)
Is calculated. Here, the noise N is obtained by calculating the noise power of a predetermined band based on the spectrum information obtained by the FFT means 6. In calculating the noise power, the noise power is calculated for the band occupied by the main frequency component. Needless to say, it is excluded from the target area to be performed.

【0020】次に、Sminの信号対雑音比を基準値
(=α)と比較する。そして、信号対雑音比がαより大
きい場合、クロック制御信号をクロック制御部9に送出
する。クロック制御部9はクロック制御信号に従いA/
D変換器3に供給したサンプリングクロックの周波数を
最大値から下げていく。サンプリングクロックの周波数
が下がるとA/D変換器3の出力する量子化雑音密度が
増加する。そして、再びSminの信号対雑音比を計算
して基準値と比較する。これを繰り返していき、前記S
minの信号対雑音比が基準値の指定する範囲内になっ
たとき、サンプリングクロックの周波数を固定する。
Next, the signal-to-noise ratio of Smin is compared with a reference value (= α). When the signal-to-noise ratio is larger than α, the clock control signal is sent to the clock control unit 9. The clock control unit 9 controls A /
The frequency of the sampling clock supplied to the D converter 3 is reduced from the maximum value. When the frequency of the sampling clock decreases, the quantization noise density output from the A / D converter 3 increases. Then, the signal-to-noise ratio of Smin is calculated again and compared with the reference value. By repeating this, the S
When the signal-to-noise ratio of min falls within the range specified by the reference value, the frequency of the sampling clock is fixed.

【0021】なお、最初Sminの信号対雑音比が基準
値(=α)よりも小さい場合は、サンプリングクロック
の周波数は最大値に固定されたままとなる。このよう
に、入力したアナログ信号の周波数成分で最も信号レベ
ルの低い成分の信号対雑音比が少なくとも基準値(=
α)を維持して周波数分析装置で解析できる状態にしA
/D変換器3のサンプリングクロックの周波数を極力小
さくなるように制御するので、A/D変換器3の消費電
力を極力抑えることが可能となる。
When the signal-to-noise ratio of Smin is initially smaller than the reference value (= α), the frequency of the sampling clock remains fixed at the maximum value. As described above, the signal-to-noise ratio of the component having the lowest signal level among the frequency components of the input analog signal has at least the reference value (=
α) is maintained and analysis can be performed with the frequency analyzer.
Since the frequency of the sampling clock of the / D converter 3 is controlled to be as small as possible, the power consumption of the A / D converter 3 can be minimized.

【0022】以上説明した本発明の実施例においては、
AGC増幅器1の利得制御方法並びにA/D変換器3の
サンプリングクロック周波数制御方法を組み合わせたも
のとしたが、いずれか一つの方法でも効果をあげること
ができることはいうまでもない。
In the embodiment of the present invention described above,
Although the method of controlling the gain of the AGC amplifier 1 and the method of controlling the sampling clock frequency of the A / D converter 3 are combined, it is needless to say that the effect can be improved by any one method.

【0023】[0023]

【発明の効果】本発明は、以上説明したように、アナロ
グ信号の周波数成分を分析する周波数分析装置におい
て、入力したアナログ信号をAGC増幅器で増幅してA
/D変換器に供給し、前記A/D変換器でデジタル信号
に変換したものをFFT手段で主要な周波数成分を抽出
して周波数スペクトラム情報とし、前記周波数スペクト
ラム情報からA/D変換器の出力雑音を計算し、前記出
力雑音が最適なレベルとなるようにAGC増幅器の利得
を制御するとともに、前記周波数スペクトラム情報を基
に最小レベル周波数成分の信号対雑音比を計算し、前記
信号対雑音比が所定値を維持するように前記A/D変換
器のサンプリングクロックの周波数を極力小さくしてA
/D変換器の出力する量子化雑音電力密度を小さくする
ようにしたので、A/D変換器のダイナミックレンジを
充分活用すると共に、その出力において発生する雑音を
極力抑えることのできる周波数分析装置を提供する上で
著効を奏す。
As described above, according to the present invention, in a frequency analyzer for analyzing a frequency component of an analog signal, an input analog signal is amplified by an AGC amplifier and A
A / D converter, which converts the digital signal into a digital signal with the A / D converter, extracts main frequency components by FFT means to obtain frequency spectrum information, and outputs the output of the A / D converter from the frequency spectrum information. Calculating the noise, controlling the gain of the AGC amplifier so that the output noise is at an optimum level, and calculating the signal-to-noise ratio of the minimum level frequency component based on the frequency spectrum information; Is maintained at a predetermined value by reducing the frequency of the sampling clock of the A / D converter as much as possible.
Since the quantization noise power density output from the A / D converter is reduced, a frequency analyzer capable of fully utilizing the dynamic range of the A / D converter and suppressing the noise generated at the output as much as possible. Works well in offering.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係わる周波数分析装置の実施の形態例
を示すブロック図。
FIG. 1 is a block diagram showing an embodiment of a frequency analysis device according to the present invention.

【図2】従来の周波数分析装置の実施の形態例を示すブ
ロック図。
FIG. 2 is a block diagram showing an embodiment of a conventional frequency analyzer.

【図3】A/D変換器の出力雑音を示した図。FIG. 3 is a diagram showing output noise of an A / D converter.

【図4】A/D変換器の量子化雑音を示した図。FIG. 4 is a diagram showing quantization noise of an A / D converter.

【符号の説明】[Explanation of symbols]

1・・・AGC増幅器 2・・・低域フィルタ 3・・・A/D変換器 4・・・クロック発振器 5、8・・・AGC制御部 6・・・FFT手段 7・・・検出制御部 9・・・クロック制御部 DESCRIPTION OF SYMBOLS 1 ... AGC amplifier 2 ... Low-pass filter 3 ... A / D converter 4 ... Clock oscillator 5, 8 ... AGC control part 6 ... FFT means 7 ... Detection control part 9 Clock control unit

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】アナログ信号を所定電圧まで増幅する自動
利得制御増幅器と、前記自動利得制御増幅器が供給する
所定電圧の信号をサンプリングしデジタル信号に変換す
るA/D変換器と、前記A/D変換器の出力するデジタ
ル信号を処理し前記アナログ信号に含まれる周波数成分
の周波数及び電力を周波数スペクトラム情報として出力
するフーリエ変換手段とを備えた周波数分析装置におい
て、 前記A/D変換器の入力電圧と周波数のそれぞれの2乗
に比例して発生するA/D変換器の出力雑音成分を抑え
るように前記自動利得制御増幅器の利得を制御するもの
であって、該周波数スペクトラム情報を基に周波数成分
の前記出力雑音成分に寄与する要素を計算し、前記要素
を周波数成分全てに渡って合計したものを出力雑音制御
値とし、前記出力雑音制御値が所定の基準値の範囲内と
なるように前記自動利得制御増幅器の利得を制御したこ
とを特徴とする周波数分析装置。
An automatic gain control amplifier for amplifying an analog signal to a predetermined voltage; an A / D converter for sampling a signal of a predetermined voltage supplied by the automatic gain control amplifier and converting the signal to a digital signal; A Fourier transforming means for processing the digital signal output from the converter and outputting the frequency and power of the frequency component included in the analog signal as frequency spectrum information, wherein the input voltage of the A / D converter And controlling the gain of the automatic gain control amplifier so as to suppress the output noise component of the A / D converter generated in proportion to each square of the frequency and the frequency. The frequency component is controlled based on the frequency spectrum information. Calculate the elements contributing to the output noise component of, the output noise control value is the sum of the elements over all frequency components, A frequency analyzer wherein the gain of the automatic gain control amplifier is controlled so that an output noise control value falls within a predetermined reference value range.
【請求項2】前記周波数スペクトラム情報を基に各周波
数成分で電力値が最小の周波数成分を選択して該電力値
最小の周波数成分の信号対雑音比を計算し、前記信号対
雑音比が所定値以上を維持するように、前記A/D変換
器のサンプリングクロックの周波数を制御して該A/D
変換器の量子化雑音成分を抑えたことを特徴とする請求
項1記載の周波数分析装置。
2. A frequency component having a minimum power value in each frequency component is selected based on the frequency spectrum information, and a signal-to-noise ratio of the frequency component having the minimum power value is calculated. The frequency of the sampling clock of the A / D converter is controlled so that the A / D
The frequency analysis device according to claim 1, wherein a quantization noise component of the converter is suppressed.
JP2001013391A 2001-01-22 2001-01-22 Frequency analyzer Pending JP2002214259A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001013391A JP2002214259A (en) 2001-01-22 2001-01-22 Frequency analyzer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001013391A JP2002214259A (en) 2001-01-22 2001-01-22 Frequency analyzer

Publications (1)

Publication Number Publication Date
JP2002214259A true JP2002214259A (en) 2002-07-31

Family

ID=18880248

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001013391A Pending JP2002214259A (en) 2001-01-22 2001-01-22 Frequency analyzer

Country Status (1)

Country Link
JP (1) JP2002214259A (en)

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