JPH11143423A - Driving method for plasma display panel - Google Patents

Abstract

PROBLEM TO BE SOLVED: To secure the linearity of brightness for enhanced picture quality by preventing a decrease in discharge strength caused by excessive charged particles in a cell when discharges occur many times in succession. SOLUTION: In a maintained discharge period 48a in each sub-field, maintained-discharge pulses are continuously applied to an X electrode and a Y electrode to cause a discharge in the cell addressed; particularly in the sub-field wherein discharges occur many times, a charge neutralization period Tn of about 10 to 100 μsec, during which no maintained-discharge pulses are applied, is provided in the maintained discharge period 48c as shown by driving waveforms X, Y1, Y2, so that in the charge neutralization period T2 , excess charged particles generated in the cell that discharges are neutralized and eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a plasma display panel used for a display device such as a personal computer or a workstation, a flat wall television, a display device for advertisement, information and the like.

[0002]

2. Description of the Related Art In an AC type plasma display device in which a pulse-like voltage is alternately applied to two electrodes to perform a discharge for display, one field (a period of one screen) is displayed on a time axis for each luminance. It is divided into a plurality of subfields, and for each pixel (cell), ultraviolet light is generated by discharge to excite the phosphor, thereby emitting light. This discharge is called a sustain discharge. For example, as disclosed in Japanese Patent Application Laid-Open No. 4-195188, by changing the number of discharges for each subfield, halftone display is performed.

[0003]

Incidentally, in driving such a plasma display panel, discharge may be continuously repeated 100 times or more. In such a case, the electric charge in the cell may become too large to obstruct the discharge, the relationship between the number of applied pulses and the luminance may not be proportional, and a desired halftone display may not be performed. There was a problem.

An object of the present invention is to provide a method of driving a plasma display panel which can solve the above problem and can control the amount of charge in a cell during a sustain discharge period.

[0005]

In order to achieve the above object, the present invention provides a period in which a voltage is not applied to either of the two electrode groups performing discharge during the sustain discharge period.

By providing such a period, it is possible to neutralize and erase the excess charge.

[0007]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is an exploded perspective view showing an enlarged part of a plasma display panel using the present invention.
1 is a front glass substrate, 22 is an X electrode, 23 is a Y electrode, 2
4 is an X bus electrode, 25 is a Y bus electrode, 26 is a dielectric, 2
7 is a protective layer, 28 is a rear glass substrate, 29 is an address electrode, 30 is a dielectric 30, 31 is a partition, and 32 is a phosphor.

In FIG. 1, transparent X electrodes 22 and transparent Y electrodes 23 are provided alternately and in parallel with each other on the lower surface of a front glass substrate 21, and an X bus electrode 24 is provided on the X electrode 22. Y bus electrodes 25 are stacked on the Y electrodes 23, respectively. These electrodes are covered with a dielectric 26, and a protective layer 27 such as MgO is further provided thereon.

On the other hand, on the upper surface of the rear glass substrate 28, an address electrode 29 is provided in a direction orthogonal to the X electrodes 22 and the Y electrodes 23 of the front glass substrate 21, and a dielectric 30 is formed on the address electrodes 29. A partition 31 is provided in parallel with the address electrode 29 at a position where the address electrode 29 is sandwiched therebetween. Furthermore, the partition 31
On the address electrodes 29, a phosphor 32 is applied. A region surrounded by two partition walls 31 and including the X electrode 22 and the Y electrode 23 as a pair constitutes one cell.

FIG. 3 is a cross-sectional view showing one cell portion of the plasma display panel as viewed from the direction of arrow A in FIG. 2. Reference numeral 33 denotes a space, and portions corresponding to FIG. I have.

In FIG. 1, an address electrode 29 is located at an intermediate portion between two adjacent partitions 31. Further, a space 33 between the front glass substrate 21 and the rear glass substrate 28, which is separated by the partition 31, is filled with a discharge gas such as Ne or Xe.

FIG. 4 is a cross-sectional view showing three cell portions of the plasma display panel viewed from the direction of arrow B in FIG. 2. Each cell is divided by a vertical dashed line, and a portion corresponding to FIG. Have the same reference numerals.

In FIG. 1, each cell includes one X electrode 22 and one row Y electrode 23. In the AC type plasma display panel, positive and negative charges are separately collected on the dielectric 26 near the X electrode 22 and the Y electrode 23, and an electric field for discharging is formed using the charges.

FIG. 5 shows the X electrodes 22, Y shown in FIGS.
FIG. 3 is a configuration diagram schematically showing wiring of an electrode 23 and an address electrode 29 and a driving circuit thereof, wherein 29a and 29b are address electrodes, 34 is an X driving circuit, 35 is a Y driving circuit, 36
Reference numerals a and 36b denote address drive circuits, and the portions corresponding to the above-mentioned drawings are denoted by the same reference numerals, and redundant description will be omitted. Here, every other address electrode 29 is an address electrode 29a, and every other address electrode 29b is an address electrode 29b.

In FIG. 1, an X drive circuit 34 is connected to an X electrode 2.
2 is generated. Y drive circuit 3
Reference numeral 5 is connected to each of the Y electrodes 23 and generates a drive pulse to be applied to the Y electrodes 23. Further, two address drive circuits 36a and 36b are provided, and one address drive circuit 36a is connected to every other address electrode 29a and generates a drive pulse to be applied to these address electrodes 29a. And the other address drive circuit 36
b is connected to every other address electrode 29b and generates a drive pulse to be applied to these address electrodes 29b.

FIG. 6 is a diagram showing a field configuration in a method of driving a plasma display panel according to the present invention, wherein the horizontal axis is a time axis t and the vertical axis is a cell row y.
Here, 40 is one field period, 41 to 48 are subfields, 41a to 48a are reset periods, and 41b to 4b.
8b is an address period, and 41c to 48c are sustain discharge periods.

In FIG. 1, one field period 40 is divided into a plurality of subfields. Here, it is assumed that the subfields are divided into eight subfields 41 to 48. In this case, the first sub-field 41 is allocated as the sub-field with the least number of discharges, and the sub-fields 41 to 48 are arranged as shown in the figure in ascending order of the number of discharges.

In each of the subfields 41 to 48, reset periods 41a to 48a are first set, and subsequently,
Address periods 41b to 48b for defining cells to be displayed
Following this, sustain discharge periods 41c to 48c in which only the cells formed by the address discharge are discharged.
c is set. These sustain discharge periods 41c-48
In c, the number of discharges is assigned to each, and the time length of the sustain discharge periods 41c to 48c differs according to the number of discharges. Further, the gradation to be displayed differs depending on the combination of the number of discharges (that is, according to which subfield and which subfield is to be subjected to discharge).

Although the number of discharges and the order of the subfields are arbitrary, there are subfields in which the discharge is continuously repeated many times.

FIG. 1 is a timing chart showing one embodiment of a driving method of a plasma display panel according to the present invention, and shows a part of a driving waveform in one subfield in FIG. Note that X is a part of the drive waveform applied to the X electrode 22, and Y1 and Y2 are two Y electrodes arranged with the same X electrode 22 interposed therebetween, for example, the first row and the second row. A part of the driving waveform applied to
Represents a part of the drive waveform applied to one address electrode 29, 1 is a reset pulse, 2 is an X scan pulse, 3 and 4 are X sustain discharge pulses, 5 is a Y scan pulse, and 6 to 8 Is a Y sustain discharge pulse, 9 is an address pulse, and 10 is a full surface pulse.

Referring to FIG. 2, a subfield 48 having the largest number of discharges will be described as an example. In this subfield 48, the number is larger than that in the subfields 41 to 47 of the sustain discharge pulse type applied in the sustain discharge period 48c.

The drive waveform X applied to the X electrode 22 includes a reset pulse 1 applied during a reset period 48a, an X scan pulse 2 applied during an address period 48b,
Sustain discharge pulses 3, 4 applied during sustain discharge period 48c
It consists of The reset pulse 1 is set to a voltage higher than the discharge start voltage. Further, the drive waveforms Y1 and Y2 applied to the Y electrode 23 respectively include a Y scan pulse 5 applied during the address period 48b and a sustain discharge pulse 6, 7, 8 applied during the sustain discharge period 48c.
It consists of

Here, conventionally, the sustain discharge pulse of the drive waveform X in the sustain discharge period 48c is continuously applied, and the sustain discharge pulses of the drive waveforms Y1 and Y2 are also continuously applied. In this embodiment, a charge neutralization period T _N is provided every time a predetermined number of sustain discharge pulses are applied, and during this charge neutralization period T _N , no sustain discharge pulse is applied.

Even if the charge neutralization period T _N is provided, the number of sustain discharge pulses applied in the sustain discharge period 48c is such that a predetermined luminance level can be obtained in the subfield 48. Set to the number. Therefore,
For example, in order to obtain a predetermined luminance level in each of the subfields 41 to 48, the subfields 41, 42, 4
, ..., 47, 48, sustain discharge periods 41c, 42
c, 43c, ...... 47c, 2 ¹ the number of the sustain discharge pulse applied at 48c, ² 2, 2 ^3, ......, assuming that the 2 ^7, 2 ^8, for example, to discharge in the subfield 48 in the case of applying a sustain discharge pulse in the sustain discharge period 48c, be provided with the charge neutralization period T _N, the number of sustain discharge pulses applied is 2 ^8.

Therefore, the driving waveform X is separated from the sustain discharge pulses 3 and 4 because the provision of the charge neutralization period T _N widens a part of the sustain discharge pulse. And drive waveforms Y1, Y2
The same is true for the sustain discharge pulses 7 and 8 at.

Drive waveform A applied to address electrode 29
Is composed of an address pulse 9 in an address period 48b corresponding to a cell to emit light and a full-surface pulse 10 corresponding to a sustain discharge pulse in the drive waveforms X and X. When there is no cell to emit light, no address pulse 9 is generated. Further, the entire surface pulse 10 and the address pulse 9 are set to substantially the same voltage.

Next, the operation of this embodiment will be described.

In a cell in which the address pulse 9 is applied to the address electrode 29 in response to the Y scan pulse 5 applied to the Y electrode 23, an address discharge occurs, and the cell discharges on the dielectric 26 near the Y electrode 23 in this cell. Positive charged particles,
Similarly, negative charged particles are accumulated on the dielectric 26 near the X electrode 22 respectively. Only in the cell in which such charged particles are accumulated, a continuous discharge occurs in this cell by the subsequent application of the sustain discharge pulse 3 to the X electrode 22 and the application of the sustain discharge pulse 6 and the Y sustain discharge pulse 7 to the Y electrode 23. .

When the number of continuous discharges increases, the number of charged particles in the cell becomes excessive and the intensity of the discharge may decrease. However, during the sustain discharge period 48c, the sustain discharge pulse is applied to the X electrode 22 and the Y electrode 23. Charge neutralization period T _N without applying
Is provided, the charged particles in the cell neutralize and erase each other, and the charged particles can be reduced.

Even in this case, the charged particles on the dielectric 26 near the X electrode 22 and the Y electrode 23 are sufficiently left, and the subsequent X sustain discharge pulse 4 and Y sustain discharge pulse 8 are applied. Stable sustain discharge is performed.

Here, the charge neutralization period T _N needs to be about 10 μsec or more in order to effectively remove excess charged particles. Unnecessary charged particles (charged particles floating in the discharge space) are required. Since the neutralization is performed in several tens of μsec, 100 μsec is sufficient. Therefore, the charge neutralization period T _N is approximately 10 to
100 μsec is desirable.

Although only one charge neutralization period T _N is shown in the sustain discharge period 48c, a plurality of charge neutralization periods may be provided. In this case, it goes without saying that the set time interval of the charge neutralization period T _N is set in consideration of the above-mentioned excessively charged particles. In a subfield where the number of times of discharge is small, it may not be necessary to provide the charge neutralization period T _N.

As described above, in this embodiment, it is possible to prevent a decrease in discharge intensity due to an excessive number of sustain discharges and an excess of charged particles in the cell.

FIG. 7 is a timing chart showing another embodiment of the driving method of the plasma display panel according to the present invention. The parts corresponding to those in FIG.

In this embodiment, in this embodiment, the driving waveform A applied to the address electrode 29 also takes about 10 to 100 μsec in accordance with the driving waveforms X, Y1 and Y2 applied to the X electrode 22 and the Y electrode 23. During the charge neutralization period T _N , the entire pulse 10 applied during the sustain discharge period 48c is interrupted. As a result, a period in which no voltage is applied to all the electrodes in the cell is set, and neutralization and elimination of excess charged particles occurs in the entire cell.

Except for this point, the embodiment is the same as that of the embodiment shown in FIG. 1. Therefore, in this embodiment shown in FIG. 7, the number of times of the sustain discharge is large and the charged particles in the cell become excessive. A decrease in discharge intensity can be prevented.

[0038]

As described above, according to the present invention,
Even if the number of sustain discharges is large, excess charged particles in the cell can be reduced, and therefore, a decrease in the discharge intensity due to such excessive charged particles can be prevented, and the linearity of the brightness can be ensured and the image quality can be maintained. Can be improved.

[Brief description of the drawings]

FIG. 1 is a timing chart showing one embodiment of a driving method of a plasma display panel according to the present invention.

FIG. 2 is an exploded perspective view showing an enlarged part of the structure of the plasma display panel using the driving method of the plasma display panel according to the present invention.

FIG. 3 is a sectional view of the plasma display panel shown in FIG.

FIG. 4 is a cross-sectional view of the plasma display panel shown in FIG.

FIG. 5 is a configuration diagram schematically showing an arrangement of panel electrodes in a plasma display panel and a driving circuit thereof.

FIG. 6 is a diagram showing a field configuration in a method of driving a plasma display panel according to the present invention.

FIG. 7 is a timing chart showing another embodiment of the driving method of the plasma display panel according to the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Reset pulse 2 X scan pulse 3, 4 X sustain discharge pulse 5 Y scan pulse 6, 7, 8 Y sustain discharge pulse 9 Address pulse 10 Full surface pulse 21 Front glass substrate 22 X electrode 23 Y electrode 28 Rear glass substrate 29 Address A Electrode 31 Partition 34 X drive circuit 35 Y drive circuit 36 A drive circuit 40 1 field 41 to 48 Subfield 41a to 48a Reset period 41b to 48b Address period 41c to 48c Sustain discharge period T _N charge neutralization period

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hiroshi Otaka 4-6 Kanda Surugadai, Chiyoda-ku, Tokyo Inside the Home Appliances and Information Media Business Division, Hitachi, Ltd. (72) Inventor Takeo Masuda Takeda Kanda, Surugadai Chiyoda-ku, Tokyo 6-chome, Hitachi, Ltd., Consumer Electronics and Information Media Division

Claims (3)

[Claims] 1. A first glass substrate is provided with first and second electrode groups that can be driven in parallel with each other and independently of each other,
A method for driving a plasma display panel in which a pulse-like voltage is alternately applied to the first and second electrode groups to perform a continuous discharge, the method comprising: A period during which the voltage is not applied to the electrode group. 2. The apparatus according to claim 1, wherein a period during which the voltage is not applied to the first and second electrode groups provided during the continuous discharging period is set to approximately 10 to 10.
A driving method of a plasma display panel, wherein the driving time is set to 0 μsec. 3. The first electrode substrate according to claim 1, further comprising a third electrode group orthogonally intersecting with the first and second electrode groups on a second glass substrate facing the first glass substrate. Applying a voltage to the third electrode group during a period in which the first and second electrode groups continuously discharge, and
The method of driving a plasma display panel, wherein the voltage is not applied to the third electrode group during a period in which the voltage is not applied to the electrode group.