JPH11135530A - Semiconductor chip and semiconductor device using the same - Google Patents

Semiconductor chip and semiconductor device using the same

Info

Publication number
JPH11135530A
JPH11135530A JP29669597A JP29669597A JPH11135530A JP H11135530 A JPH11135530 A JP H11135530A JP 29669597 A JP29669597 A JP 29669597A JP 29669597 A JP29669597 A JP 29669597A JP H11135530 A JPH11135530 A JP H11135530A
Authority
JP
Japan
Prior art keywords
semiconductor chip
glass substrate
electrode
end part
bumps
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29669597A
Other languages
Japanese (ja)
Inventor
Hiroaki Doi
博昭 土居
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP29669597A priority Critical patent/JPH11135530A/en
Publication of JPH11135530A publication Critical patent/JPH11135530A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/1401Structure
    • H01L2224/1403Bump connectors having different sizes, e.g. different diameters, heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81191Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body

Landscapes

  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To improve the connection strength of an end part electrode bump by making the rigidity of the end part electrode bump to be larger than that of a central electrode bump in an anisotropic conductive film method for placing resin containing conductive particles between a glass substrate and a semiconductor chip and pressing it with a heated pressing head so as to connect them. SOLUTION: The yield stress of the material of the end part electrode bumps 3 is set to be larger than that of the other electrode bump 2 by changing plating fluid for forming the electrode bumps. The difference between the elastic deformation quantity of the glass substrate 6 by the load of the pressing head 6 between the center of the semiconductor chip 1 and end parts becomes small. Thus, the crush quantities of the electrodes 2 and 3 become almost similar and a recessed part is eliminated by the restoration of the elastic deformation of the glass substrate 4 in a state where the pressing head 6 is removed. Since tensile stress does not occur in the end part electrode bumps 3, the connection reliability of the end part electrode bumps is prevented from deteriorating.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体チップとこの
半導体チップを用いた半導体装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor chip and a semiconductor device using the semiconductor chip.

【0002】[0002]

【従来の技術】ガラス基板等の配線基板上の電極に半導
体チップ上の電極バンプを接続する方法に導電性粒子を
含む樹脂を用いるものがある。この方法は異方導電性膜
法等と呼ばれる。以下、この方法をハイブリッドマイク
ロエレクトロニクス協会編、工業調査会発行、エレクト
ロニクス実装技術基礎講座の83〜84ページ及び、技
術情報協会発行、COB,TOB実装を中心とするベア
チップ実装−最新技術開発と信頼性対策−の第2章、4
節、導電性接着剤による接続技術(77〜85ページ)
と第8章、4節、液晶パネル実装と信頼性技術(327
〜335ページ)を引用して以下に説明する。
2. Description of the Related Art There is a method for connecting an electrode bump on a semiconductor chip to an electrode on a wiring substrate such as a glass substrate by using a resin containing conductive particles. This method is called an anisotropic conductive film method or the like. Hereinafter, this method will be described by the Hybrid Microelectronics Association, published by the Industrial Research Institute, pages 83 to 84 of the Basic Course of Electronics Packaging Technology, and published by the Technical Information Association, bare chip packaging centering on COB and TOB packaging-latest technology development and reliability Countermeasures-Chapter 2, 4
Knot, connection technology using conductive adhesive (pages 77-85)
And Chapter 8, Section 4, LCD Panel Mounting and Reliability Technology (327
To page 335).

【0003】この半導体チップの1例を図2a,図2b
に示す。図2aは正面図、図2bは下側の平面図で、半
導体チップ1の素子が形成されている面(素子面7)に
は多数の金製の電極バンプ2,2a,2bが形成されて
いる。図3(a)ないし図(b)はガラス基板4にこの
半導体チップ1を接続する方法を示す。図3では課題の
理解を容易にするため半導体チップ1の素子面7に垂直
な方向の寸法を図2a,図2bに比べ拡大して描いた。
FIGS. 2A and 2B show an example of this semiconductor chip.
Shown in FIG. 2A is a front view, and FIG. 2B is a plan view of the lower side. A large number of gold electrode bumps 2, 2a, 2b are formed on the surface of the semiconductor chip 1 on which elements are formed (element surface 7). I have. FIGS. 3A and 3B show a method of connecting the semiconductor chip 1 to the glass substrate 4. In FIG. 3, the dimension of the semiconductor chip 1 in the direction perpendicular to the element surface 7 is drawn in comparison with FIGS. 2A and 2B in order to facilitate understanding of the problem.

【0004】台9上に置いたガラス基板4と半導体チッ
プ1の間に導電性粒子を含む樹脂5を置き、半導体チッ
プ1の背面8を加熱した圧着ヘッド6で押す。樹脂5は
加熱により液化して電極バンプ2,2a,2bの周りに
移動し、ガラス基板の電極10と半導体チップ1上の電
極バンプ2,2a,2b間の導電性粒子は電極10と電
極バンプ2,2a,2bにめりこんで、両者の電気的接
続を行う。樹脂5は液化後硬化して、ガラス基板4と半
導体チップ1の機械的接合を行う。図4はこの接続状態
を示した図である。
A resin 5 containing conductive particles is placed between a glass substrate 4 and a semiconductor chip 1 placed on a table 9, and a back surface 8 of the semiconductor chip 1 is pressed by a heated pressure bonding head 6. The resin 5 is liquefied by heating and moves around the electrode bumps 2, 2a, 2b, and the conductive particles between the electrode 10 on the glass substrate and the electrode bumps 2, 2a, 2b on the semiconductor chip 1 are removed from the electrode 10 and the electrode bumps. The electrical connection between the two is made by digging into 2, 2a and 2b. The resin 5 hardens after being liquefied, and mechanically joins the glass substrate 4 and the semiconductor chip 1. FIG. 4 is a diagram showing this connection state.

【0005】[0005]

【発明が解決しようとする課題】以下この接続工程にお
ける各部材の変形状態を詳細に分析し、従来技術の課題
を説明する。実際には圧着ヘッド6の負荷により、電極
バンプ2,2a,2bがつぶれ、高さが低下する。図5
は圧着ヘッド6の負荷中の状態を示した図である。図5
に示されているように、この時、圧着ヘッド6の荷重が
電極バンプ2,2a,2bによってガラス基板4に伝え
られ、ガラス基板4にも弾性変形による僅かな凹みが生
じる。この凹み形状は半導体チップ1の中央では深く、
端部では浅いため、電極バンプ2の変形後の形状も、中
央部電極バンプ2は高さが高く、端部電極バンプ2では
高さが低いという場所により異なったものになる。
The state of the prior art will be described below by analyzing in detail the deformation state of each member in the connecting step. Actually, the electrode bumps 2, 2a, 2b are crushed by the load of the pressure bonding head 6, and the height is reduced. FIG.
FIG. 4 is a diagram showing a state in which the pressure bonding head 6 is under load. FIG.
At this time, the load of the pressure bonding head 6 is transmitted to the glass substrate 4 by the electrode bumps 2, 2a, 2b at this time, and the glass substrate 4 is also slightly dented by elastic deformation. This concave shape is deep in the center of the semiconductor chip 1,
Since the end portions are shallow, the shape of the electrode bumps 2 after deformation is different depending on where the center electrode bumps 2 are high and the end electrode bumps 2 are low.

【0006】樹脂5の硬化後、圧着ヘッド6を取り去っ
た状態を図6に示す。ガラス基板4の弾性変形が元に戻
ることにより凹みがなくなり、ガラス基板4の表面はほ
ぼ平面になる。この時、ガラス基板4の弾性変形の戻り
量は中央部電極バンプ2aでは大きく、端部電極バンプ
2bでは小さくなるため、半導体チップ1とガラス基板
4の力の釣合いから中央部電極バンプ2aには圧縮応
力、端部電極バンプ2bには引っ張り応力が生じること
になる。この引っ張り応力が端部電極バンプ2bがガラ
ス基板4の電極10からはく離する原因になることがあ
る。このように、従来の半導体チップ、及び半導体装置
では電極バンプの接続信頼性が乏しく、特に端部電極バ
ンプの接続強度が低いという問題点があった。
FIG. 6 shows a state where the pressure bonding head 6 is removed after the resin 5 is cured. When the elastic deformation of the glass substrate 4 returns to its original state, the dent disappears, and the surface of the glass substrate 4 becomes substantially flat. At this time, the return amount of the elastic deformation of the glass substrate 4 is large in the central electrode bump 2a and small in the end electrode bump 2b. A compressive stress and a tensile stress are generated in the end electrode bump 2b. This tensile stress may cause the end electrode bumps 2b to separate from the electrodes 10 of the glass substrate 4. As described above, the conventional semiconductor chips and semiconductor devices have a problem in that the connection reliability of the electrode bumps is poor, and particularly the connection strength of the end electrode bumps is low.

【0007】[0007]

【課題を解決するための手段】上記課題は、圧着ヘッド
6の負荷によりガラス基板4の弾性変形に伴う凹みが生
じこの凹みの深さが電極バンプ2の位置により異なるこ
とが原因となっている。この凹みの深さは電極バンプ2
の荷重により異なるが、図7に示される1例を示す電極
バンプの材料の金の応力−ひずみ関係より応力が降伏応
力を超え、塑性変形を生じるとひずみ増加による応力増
加は少なく、弾性範囲に比べ応力はひずみによって大き
な差が無いほぼ一定の値を取ることが分かる。このた
め、電極バンプ2,2a,2bの応力は位置によらずほ
ぼ同じになっていることが分かる。
The above problem is caused by the fact that the load of the pressure bonding head 6 causes a depression due to the elastic deformation of the glass substrate 4 and the depth of the depression varies depending on the position of the electrode bump 2. . The depth of this recess is electrode bump 2
The stress exceeds the yield stress due to the stress-strain relationship of gold of the material of the electrode bump shown in FIG. 7 and shows an example shown in FIG. In comparison, it can be seen that the stress takes an almost constant value with no large difference depending on the strain. Therefore, it can be seen that the stress of the electrode bumps 2, 2a, 2b is almost the same regardless of the position.

【0008】ガラス基板4の弾性変形による凹み形状を
定量的に理解するために、ヤング率E,ポアソン比νの
半無限体の表面の半径aの円形領域に均一応力qが負荷
された場合の表面の表面に垂直方向の変位分布を解析し
た結果をティモシェンコ、グ−ディア著、金田潔訳、弾
性論、4版、419ページ、(コロナ社発行)から引用
し図8に示す。図でrは円形の荷重負荷域中心からの距
離、V0 は円形の荷重負荷域の縁での式(1)で表され
る変位を示す。
In order to quantitatively understand the concave shape due to the elastic deformation of the glass substrate 4, a case where a uniform stress q is applied to a circular region having a radius a on the surface of a semi-infinite body having a Young's modulus E and a Poisson's ratio ν. The results of analyzing the displacement distribution in the direction perpendicular to the surface are quoted from Timoshenko and Goodia, Kiyoshi Kaneda, Elasticity, 4th edition, page 419 (issued by Corona), and are shown in FIG. In the figure, r represents the distance from the center of the circular load area, and V 0 represents the displacement expressed by the equation (1) at the edge of the circular load area.

【0009】[0009]

【数1】 V0=4(1−ν2)qa/(πE) ……(1) 実際の半導体チップの形状は円形ではなく直方体である
ため、実際の半導体チップの場合はこの解析結果と全く
同じではないが、実際の半導体チップの場合でも変形の
傾向はこの解析結果と類似で、応力が一定の値の場合、
応力負荷領域の端部では変位が小さく中央部では変位が
大きい変位を持つことが予測される。
V 0 = 4 (1−ν 2 ) qa / (πE) (1) The shape of the actual semiconductor chip is not a circle but a rectangular parallelepiped. Although not exactly the same, the tendency of deformation is similar to the result of this analysis even in the case of an actual semiconductor chip, and when the stress is a constant value,
It is expected that the displacement is small at the end of the stress load region and large at the center.

【0010】上記の分析から端部電極バンプ2bの接続
信頼性を向上するためには、圧着ヘッド6の荷重によっ
てガラス基板4の弾性変形による凹み量が、中央部電極
バンプ2aと端部電極バンプ2bでほぼ同じになること
が必要であることが分かる。
From the above analysis, in order to improve the connection reliability of the end electrode bumps 2b, the amount of depression due to the elastic deformation of the glass substrate 4 due to the load of the pressure bonding head 6 is reduced by the center electrode bumps 2a and the end electrode bumps 2b. It can be seen that it is necessary to be almost the same in 2b.

【0011】この均一凹み分布は、端部電極バンプ2b
の剛性を中央部電極バンプ2aの剛性より大きくするこ
とで実現できる。電極バンプの剛性を変化させる具体的
な手段には、電極バンプ材料として硬さが異なる材料を
用いたり、下記に例を示すようにメッキ液を変更するな
どの方法と、電極バンプ面積を変える方法がある。
The uniform dent distribution is caused by the end electrode bump 2b.
Is greater than the rigidity of the center electrode bump 2a. Specific means for changing the rigidity of the electrode bumps include a method of using a material having a different hardness as an electrode bump material, a method of changing a plating solution as shown in the example below, and a method of changing the electrode bump area. There is.

【0012】[0012]

【発明の実施の形態】図1a,図1bは本発明の半導体
チップの1例を示すものである。電極バンプは電気メッ
キで形成するが、メッキ液を変更することにより、端部
電極バンプ3の材料の降伏応力をその他の電極バンプ2
の降伏応力より大きくしてある。図9は本発明の半導体
チップをガラス基板4に接続する様子を示したものであ
る。端部電極バンプ3の材料の降伏応力がその他の電極
バンプ2より高いため圧着ヘッド6の荷重によるガラス
基板4の弾性変形量は半導体チップ1の中央と、端部で
差が小さくなっている。
1A and 1B show an example of a semiconductor chip according to the present invention. The electrode bumps are formed by electroplating, but by changing the plating solution, the yield stress of the material of the end electrode bumps 3 is reduced by the other electrode bumps 2.
Is larger than the yield stress. FIG. 9 shows how the semiconductor chip of the present invention is connected to the glass substrate 4. Since the yield stress of the material of the end electrode bump 3 is higher than that of the other electrode bumps 2, the difference in the amount of elastic deformation of the glass substrate 4 due to the load of the pressure bonding head 6 between the center of the semiconductor chip 1 and the end is small.

【0013】このため、電極バンプ2,3のつぶれ量も
ほぼ同じとなる。図10は樹脂5の硬化後、圧着ヘッド
6を取り去った状態を示す。ガラス基板4の弾性変形の
回復により凹みがなくなるが、端部電極バンプ3に引っ
張り応力が生じることはない。
For this reason, the crushing amounts of the electrode bumps 2 and 3 are almost the same. FIG. 10 shows a state where the pressure bonding head 6 is removed after the resin 5 is cured. The dent disappears due to the recovery of the elastic deformation of the glass substrate 4, but no tensile stress is generated in the end electrode bumps 3.

【0014】図11a,図11bは本発明の半導体チッ
プの第2の例を示すものである。半導体チップの中央か
ら電極バンプまでの距離が最も端部電極バンプの面積が
大きくなっている。この半導体チップを用いた場合で
も、端部電極バンプ3の剛性がその他の電極バンプ2の
剛性がより高いため、ガラス基板4の弾性変形量は半導
体チップ1の中央と、端部で差が小さくなる。
FIGS. 11A and 11B show a second example of the semiconductor chip of the present invention. The distance from the center of the semiconductor chip to the electrode bump has the largest area of the end electrode bump. Even when this semiconductor chip is used, since the rigidity of the end electrode bumps 3 is higher than the rigidity of the other electrode bumps 2, the difference in the amount of elastic deformation of the glass substrate 4 between the center of the semiconductor chip 1 and the end is small. Become.

【0015】[0015]

【発明の効果】本発明の半導体チップ、及び半導体装置
では半導体チップの中央から前記電極バンプまでの距離
が大きい電極バンプでその剛性を大きくすることによ
り、圧着ヘッド6の荷重が加わる時にガラス基板4に生
じる弾性変形による凹みの位置による差を小さくできる
ため、特に端部電極バンプの接続信頼性が低下すること
の無い半導体チップ、及び半導体装置を提供することが
できる。
According to the semiconductor chip and the semiconductor device of the present invention, the rigidity is increased by the electrode bump having a large distance from the center of the semiconductor chip to the electrode bump. Since the difference due to the position of the dent due to the elastic deformation occurring in the semiconductor device can be reduced, it is possible to provide a semiconductor chip and a semiconductor device in which the connection reliability of the end electrode bump is not particularly reduced.

【図面の簡単な説明】[Brief description of the drawings]

【図1】aは本発明の半導体チップの実施例の正面図。
bは図1aの平面図。
FIG. 1A is a front view of an embodiment of a semiconductor chip of the present invention.
b is a plan view of FIG. 1a.

【図2】aは従来の半導体チップの実施例の正面図、b
は図2aの平面図。
FIG. 2A is a front view of an embodiment of a conventional semiconductor chip, and FIG.
2A is a plan view of FIG. 2A.

【図3】従来の半導体チップをガラス基板に接続する方
法を示す図。
FIG. 3 is a diagram showing a conventional method for connecting a semiconductor chip to a glass substrate.

【図4】従来の半導体チップをガラス基板に接続して作
成した半導体装置を示す図。
FIG. 4 is a diagram showing a semiconductor device formed by connecting a conventional semiconductor chip to a glass substrate.

【図5】従来の半導体チップをガラス基板に接続する時
に圧着ヘッドの負荷により生じる変形を示す図。
FIG. 5 is a view showing a deformation caused by a load of a pressure bonding head when a conventional semiconductor chip is connected to a glass substrate.

【図6】従来の半導体チップをガラス基板に接続して作
成した半導体装置の完成時の変形を示す図。
FIG. 6 is a diagram showing a modification of a conventional semiconductor device formed by connecting a semiconductor chip to a glass substrate when the semiconductor device is completed.

【図7】電極バンプの材料の金の応力−ひずみ関係を示
す特性図。
FIG. 7 is a characteristic diagram showing a stress-strain relationship of gold as a material for an electrode bump.

【図8】半無限体の表面の一部に均一応力が負荷された
場合の表面の変位分布を解析した結果を示す特性図。
FIG. 8 is a characteristic diagram showing a result of analyzing a surface displacement distribution when a uniform stress is applied to a part of the surface of the semi-infinite body.

【図9】本発明の半導体チップをガラス基板に接続する
方法を示す図。
FIG. 9 is a view showing a method for connecting a semiconductor chip of the present invention to a glass substrate.

【図10】本発明の半導体チップをガラス基板に接続し
て作成した半導体装置を示す図。
FIG. 10 is a diagram showing a semiconductor device manufactured by connecting a semiconductor chip of the present invention to a glass substrate.

【図11】aは本発明の第2の半導体チップの実施例の
正面図。bは図11aの平面図。
FIG. 11A is a front view of an embodiment of the second semiconductor chip of the present invention. b is a plan view of FIG. 11a.

【符号の説明】[Explanation of symbols]

1…半導体チップ、2…電極バンプ、2a…中央部電極
バンプ、2b,3…端部電極バンプ、4…ガラス基板、
5…樹脂、6…圧着ヘッド、7…半導体チップの素子
面、8…半導体チップの背面、9…台、10…電極。
DESCRIPTION OF SYMBOLS 1 ... Semiconductor chip, 2 ... Electrode bump, 2a ... Center electrode bump, 2b, 3 ... End electrode bump, 4 ... Glass substrate,
5: Resin, 6: Pressure bonding head, 7: Element surface of semiconductor chip, 8: Back surface of semiconductor chip, 9: Stand, 10: Electrode.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】複数の電極バンプをその素子が形成されて
いる面上に有する半導体チップにおいて、前記半導体チ
ップの中央から前記電極バンプまでの距離が大きい電極
バンプのその剛性が距離が小さい電極バンプの剛性以上
であることを特徴とする半導体チップ及びこの半導体チ
ップを用いた半導体装置。
1. A semiconductor chip having a plurality of electrode bumps on a surface on which elements are formed, wherein an electrode bump having a large distance from the center of the semiconductor chip to the electrode bump has a small rigidity. And a semiconductor device using the semiconductor chip.
JP29669597A 1997-10-29 1997-10-29 Semiconductor chip and semiconductor device using the same Pending JPH11135530A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29669597A JPH11135530A (en) 1997-10-29 1997-10-29 Semiconductor chip and semiconductor device using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29669597A JPH11135530A (en) 1997-10-29 1997-10-29 Semiconductor chip and semiconductor device using the same

Publications (1)

Publication Number Publication Date
JPH11135530A true JPH11135530A (en) 1999-05-21

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP29669597A Pending JPH11135530A (en) 1997-10-29 1997-10-29 Semiconductor chip and semiconductor device using the same

Country Status (1)

Country Link
JP (1) JPH11135530A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010529673A (en) * 2007-06-07 2010-08-26 シリコン・ワークス・カンパニー・リミテッド Pad layout structure of semiconductor chip

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010529673A (en) * 2007-06-07 2010-08-26 シリコン・ワークス・カンパニー・リミテッド Pad layout structure of semiconductor chip

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