JPH11133378A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize an output means and a D/A conversion means or the like with integrated circuit processes which are of low dielectric withstand voltages and are inexpensive by allowing a first driving means to be provided with a level shifting power source means or the like and making potentials of counter electrodes constant levels always as compared with a counter electrode inversion driving to suppress the increasing of power consumption and the degrading of picture quality. SOLUTION: In a first driving means 6, an output means 3 displays a liquid crystal panel by charging the liquid crystal display element 11 of a selected pixel via a switching element 10, a D/A converter circuit 4 generates the output signal of the output circuit 3 and a reference voltage means 5 becomes the reference voltage of the D/A converter circuit 4 and a level shift power source means 1 level-shifts driving power sources of the output circuit 3 and the D/A converter circuit 4 and the reference voltage means 5 and a level converting means 2 converts a display signal and the control signal of the output circuit 3 into level-shifted potentials. Then, a voltage equivalent to the double of maximums of driving widths of the output circuit 3 and the D/A converter circuit 4 and the reference voltage means is charged on the liquid crystal display element 11.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to an active matrix type in which first driving means for driving data lines of a liquid crystal panel includes an output means, a D / A conversion means and a reference voltage means. The present invention relates to a liquid crystal display device.

[0002]

2. Description of the Related Art Liquid crystal display devices first appeared as displays on calculators and digital clocks, and are now rapidly spreading as display devices such as personal computers, televisions, and word processors.

Among these liquid crystal display devices, an active matrix type liquid crystal display device having each pixel including an active element such as a transistor or a diode which causes the liquid crystal arranged in a matrix to perform a kind of storage operation has a high contrast ratio and a high image quality display. It is attracting attention because it can be realized. That is, the active element operates as a switch element for turning on and off, and a display signal is transmitted to the pixel by a scanning signal via an active matrix element in a selected state (on state). Thereafter, when the selected active element is in a non-selected state (off state), the display signal applied to the pixel is held in each pixel in a state of electric charge, and always drives the liquid crystal, and as a result, the liquid crystal has its static characteristic. Is reproduced well, and a high pixel count can be realized.

Conventionally, in order to obtain a sufficient contrast in an active matrix type liquid crystal display device, a voltage applied to a liquid crystal panel and a driving of an output unit included in a first driving unit for driving a data line of the liquid crystal panel are required. A voltage of about 10 to 18 V was required. For this reason, the first driving means has been realized by an integrated circuit having a high withstand voltage of 10 V or more, but the high withstand voltage process is expensive because the number of processes during manufacturing is large and the integrated circuit area is large. Had problems.

Then, in order to realize this output means at low cost, means for realizing the output means with a 5V integrated circuit has appeared. This driving means not only lowers the driving voltage characteristics of the active matrix type liquid crystal display device, but also drives the counter electrode of the active matrix type liquid crystal display device every horizontal scanning period or vertical scanning period. The level shifts sequentially between 0 V and 5 V, while the output means always operates at a voltage of 5 V to charge the display signal to the liquid crystal panel, thereby causing the opposite electrode of the liquid crystal, that is, the midpoint potential of the charge, to be bidirectional. The voltage is written up to 5V at maximum. Hereinafter, this driving method is referred to as “counter electrode inversion driving”. FIG. 8 is a block diagram showing the configuration of this conventional liquid crystal display device.

Referring to FIG. 8, first driving means 6 for driving the data lines of the LCD panel includes an output circuit 3 for charging a liquid crystal display element of a selected pixel via a switch element and displaying the liquid crystal panel. A D / A conversion circuit 4 for generating an output signal of the output circuit 3, a reference voltage circuit 5 for supplying a reference voltage of the D / A conversion circuit 4, and a scanning line connected to the gate electrode of the switch element. And second driving means 7. As shown in the figure, the voltage (V _COM ) of the counter electrode connected to one end of the liquid crystal display element is switched to 0 V / 5 V every horizontal / vertical scanning period.

As described above, the cost of the first driving means is reduced by improving the driving means described above.

[0008]

However, in the above-described counter electrode inversion drive, since the load capacitance of the counter electrode of the active matrix liquid crystal is large, AC power consumption becomes large at the time of high-speed level shift, When shifting, the time required for the potential of the counter electrode to stabilize becomes longer, so that it is impossible to reliably write the charging voltage, and the output means is constituted by about 10 to 18 V which does not shift the level of the conventional counter electrode. However, there is a problem that the display image quality is deteriorated as compared with the above.

For example, the load capacitance of the counter electrode is about 1 μF at the maximum in a large liquid crystal panel of about 640 × 480 pixels generally used in a personal computer, and this is set to a high-speed level in about 25 μsec corresponding to one horizontal period. When the shift is performed, power consumption of about 0.8 W is generated, and the power consumption characteristics of the active matrix liquid crystal are extremely deteriorated.

[0010] As described above, the opposing electrode inversion driving is performed by:
While the first driving means can be made inexpensive, there has been a decrease in performance such as an increase in power consumption and a deterioration in image quality.

Therefore, an object of the present invention has been made in view of the above-mentioned problems, and an object of the present invention is to solve these problems and suppress performance degradation such as increase in power consumption and image quality. It is another object of the present invention to provide a liquid crystal display device that realizes an output unit, a D / A conversion unit, and a reference voltage unit by a low withstand voltage and inexpensive integrated circuit process.

[0012]

In order to achieve the above object, a liquid crystal display device according to the present invention comprises a plurality of pixels comprising a switch element and a liquid crystal display element arranged in an array in both the row and column directions, and a plurality of these pixels. Driving a liquid crystal display panel including a plurality of data lines commonly connected to each column and a plurality of scanning lines commonly connected to each row, and the data lines commonly connected to each column of the pixels A first driving unit, a second driving unit for driving the scanning lines connected in common for each row of the pixels, and the selected driving unit via the switch element in the first driving unit. Output means for charging the liquid crystal display device of the pixels, displaying the liquid crystal panel, D / A conversion means for generating an output signal of the output means, reference voltage means for providing a reference voltage for the D / A conversion means, and the output means And D / A Active matrix type liquid crystal display, comprising: a level shift power supply for level-shifting the driving power supply of the conversion means and the reference voltage means; and a level conversion means for converting a display signal or a control signal of the output signal into the level-shifted potential. In the apparatus, during a certain horizontal scanning period or vertical scanning period, the lowest potential of the driving power supply of the output means, the D / A conversion means, and the reference voltage means is set to be the same as the lowest potential of the charging potential of the liquid crystal panel. In the vertical scanning period, the output unit and the D / A are controlled such that the highest potential of the driving voltage in the previous horizontal scanning period or vertical scanning period is the lowest potential of the driving power supply of the output unit, the D / A conversion unit, and the reference voltage unit. The liquid crystal display device is charged by level-shifting the drive voltages of the conversion means and the reference voltage means, so that the output means and the D / A converter can be used. And a voltage corresponding to up to twice the driving voltage range of the reference voltage means to charge to the liquid crystal display device configured to display the liquid crystal display panel.

In the present invention, the output means includes: a data register for capturing display data in synchronization with a clock; a latch circuit for retaining the display data; and a charging circuit for charging a liquid crystal display panel. An analog signal that has been D / A-converted by display data transmitted through a level conversion unit, the D / A conversion unit, and the display data transmitted through the level conversion unit by the reference voltage unit. The liquid crystal display panel is charged.

In the present invention, the level conversion means includes an OR gate, a capacitor, and a data bus, and converts the level of the display signal to a floating level, and the level of the display signal is changed via the level conversion means. The control signal supplied to the data register of the output means is input to the latch circuit of the output means via the level conversion means, similarly to the display signal.

In the present invention, the OR gate of the level conversion means performs a logical OR operation on the display signal or the control signal having a low pulse duty with a signal having a constant duty such as a horizontal synchronizing signal, and then performs the logical sum operation. , And to the output means via the data bus.

In the present invention, the level shift power supply means includes a switch transistor and a D-type flip-flop for supplying an on / off control signal to the switch transistor.

According to the present invention, the reference voltage means includes:
The configuration differs depending on whether the γ characteristic of the liquid crystal panel is symmetric or asymmetric with respect to the positive and negative polarities of the charging voltage.
Reference power supply, 2m reference power supply and 2m in case of asymmetric
It is composed of analog switches that select and output m reference power supplies from among them.

[0018]

Embodiments of the present invention will be described below. In the liquid crystal display device of the present invention, preferably, a plurality of pixels each including a switch element and a liquid crystal display element arranged in an array in both the row and column directions and a plurality of data for commonly connecting these pixels for each column are provided. A liquid crystal display panel (LCD panel) including a plurality of scanning lines commonly connected to each line and row, and first driving means for driving the data lines commonly connected to each column of the pixels (FIG. 1-6) and second driving means (9 in FIG. 1) for driving the scanning lines connected in common for each row of the pixels.
Output means (3 in FIG. 1) for charging the liquid crystal display element of the selected pixel via the switch element and displaying the liquid crystal panel. D / A conversion means (4 in FIG. 1) for generating an output signal of the output means, reference voltage means (5 in FIG. 1) serving as a reference voltage of the D / A conversion means, and the output means and D / A Level shift power supply means (1 in FIG. 1) for level-shifting the drive power supply of the conversion means and the reference voltage means, and level conversion means (FIG. 1) for converting a display signal or a control signal of the output means into the level-shifted potential. In a certain horizontal scanning period or vertical scanning period, the minimum potential V _SS1 of the driving power supply of the output means, the D / A conversion means and the reference voltage means is equal to the minimum potential of the charging potential of the liquid crystal panel. In the next horizontal scanning period or vertical scanning period, The output means so that the highest potential V _DD1 of the drive voltage in the previous horizontal scanning period or vertical scanning period becomes the lowest potential of the driving power supply of the output means, the D / A conversion means and the reference voltage means. D / A
The drive voltage of the conversion means and the reference voltage means is level-shifted to charge the liquid crystal display element, so that the drive voltage width of the output means, the D / A conversion means and the reference voltage means is at most twice as large. Is charged to the liquid crystal display element.

Further, in the embodiment of the present invention, the output means includes a data register which takes in display data in synchronization with a clock, a latch circuit which holds the display data, and an output circuit which charges a liquid crystal display panel. The D / A conversion means converts display data captured in synchronization with the clock signal from a decoder circuit and a reference voltage provided for performing the D / A conversion means to an analog voltage. Charge the display panel.

Further, in the embodiment of the present invention, the level conversion means for level-converting the display signal to a floating level includes a capacitor (18 in FIG. 2), a resistor (23 in FIG. 2), and a data bus (FIG. 2). 2) and an OR gate (19 in FIG. 2).
The display signal is sent to the data register of the output means via the OR gate, and the control signal of the output means is sent to the latch circuit provided in the output means in the same manner as described above.

Also, depending on the contents of the display, a signal having a low pulse duty may be input as a transmission signal, whereby the threshold level of the data bus is lowered, and the noise margin is lowered.

As a countermeasure, a pulse signal having a constant duty such as a horizontal synchronizing signal and the display data or control signal are OR-operated once, and then the signal is transmitted to a data bus via a capacitive coupling. Normally, when a signal having a low pulse duty is input to a data bus by performing AC coupling by a capacitor, the signal cannot be transmitted because the signal is close to a DC component.

On the other hand, a signal having a duty whose average voltage is close to the threshold voltage of the data bus is subjected to an OR operation, and then input to the data bus via an AC coupling, thereby transmitting the signal having a low pulse duty. can do.

In the embodiment of the present invention, a horizontal synchronizing signal supplied from a main body set, on which an active matrix type liquid crystal display device is usually mounted, is used as a signal having the constant duty.

Further, in the embodiment of the present invention, the level shift power supply means includes power supplies V _DD1 and V _DD2 as the high potential side.
And the first terminal, the second terminal as the low potential side and the power supply V _SS1 , V _SS
The switching transistors (Q1 to Q4 in FIG. 1) which are respectively connected between _DD1 and on / off controlled, and a horizontal synchronizing signal (Hsyn) and the like are input, and these switching transistors (Q1 to Q4 in FIG. 1) are connected. A D-type flip-flop (8 in FIG. 4) for on / off control is provided, and the driving power supply of the first driving unit is changed for each horizontal scanning period or vertical scanning period of the liquid crystal display device. With the midpoint potential (opposite electrode potential) as a reference point, the level is sequentially shifted up and down by the drive voltage width of the output means, D / A conversion means, and reference voltage means for each horizontal scanning period or vertical scanning period. A charging voltage of the liquid crystal display device corresponding to a maximum of twice the driving voltage of the output means, the D / A conversion means, and the reference voltage means is obtained.

[0026]

Next, a liquid crystal display device according to an embodiment of the present invention will be described in order to describe the above-described embodiment of the present invention in further detail.

FIG. 1 is a diagram showing the configuration of the first embodiment of the present invention. FIG. 2 is a diagram showing a configuration of each circuit in the first embodiment of the present invention. FIG. 3 is a diagram showing a level shift voltage waveform generated from the level shift power supply.
FIG. 4 is a diagram showing a circuit configuration of the level shift power supply.

Referring to FIG. 1, the first driving means 6 for driving the data lines of the LCD panel charges the liquid crystal display element 11 of the selected pixel through the switch element 10 to output the liquid crystal panel. A circuit 3; a D / A conversion circuit 4 for generating an output signal of the output circuit 3; a reference voltage circuit 5 for supplying a reference voltage of the D / A conversion circuit 4;
A / A conversion circuit 4 and a level shift power supply circuit 1 for level shifting the drive power supply of the reference voltage circuit 5, and a level conversion circuit 2 for converting a display signal or a control signal of the output circuit to a level-shifted potential. .

The level shift power supply circuit 1 is shown in FIGS.
As shown in (1), it comprises a D-type flip-flop 8 and a switching circuit including transistors Q1 to Q4. The D-type flip-flop 8 outputs a horizontal synchronizing signal (Hsy).
n) or the vertical synchronizing signal 13 is used as a start signal to constantly output the level inversion signals Q and Q # to the base electrodes of the transistors Q1 to Q4.

More specifically, the D-type flip-flop 8
Is a D-type flip-flop having a set / reset function having a set terminal and a reset terminal. The D type flip-flop has a horizontal synchronizing signal or a vertical synchronizing signal (horizontal synchronizing signal in the figure) Hsyn as a clock input and an inverted output terminal Q # as a data input. Feedback input to terminal. pnp transistors Q1 and Q2
Connects the emitters to the power supplies V _DD1 and V _DD2 , connects the collector to the output terminal 1 in common, and connects the base to
Type flip-flop 5 is connected to the non-inversion output terminal Q and inverted output terminal Q #, npn type transistors Q3 and Q4 have emitters connected to power supplies V _SS1 and V _DD1 , respectively, and a collector connected to output terminal 2 in common. , The base is connected to the inverted output terminal Q 端子 and the non-inverted output terminal Q of the D-type flip-flop 5,
When Q is logic "1", the transistors Q2 and Q4 are turned on, V _DD2 is output to the terminal 1, and V _DD1 is output to the terminal 2.
Is logic "0", the transistors Q1 and Q3 are turned on, and V _DD1 is output to the terminal 1 and V _SS1 is output to the terminal 2.

FIG. 3 shows a level shift voltage generated between the terminal 1 (voltage V _U ) and the terminal 2 (voltage V _L ) of the level shift power supply circuit 1 shown in FIG. D-type flip-flop 8
Is, for each input cycle of the horizontal sync signal or vertical sync signal,
The level conversion circuit 2, the output circuit 3, the D / A conversion circuit 4, and the reference voltage circuit 5 are driven by the level shift voltage 14 generated between the terminals 1 and 2 by inverting the polarity of the level inversion signals Q and Q #. The output circuit 3, D / A conversion circuit 4, and reference voltage circuit 5 driven by the level shift power supply 1 will be referred to as a floating circuit.

With reference to FIGS. 3 and 2, the relationship between the level shift voltage waveform, the operating voltage of each part in the present invention, and the charging voltage of the liquid crystal panel will be described.

In a series of operations for writing the charging voltage from the floating circuit to the liquid crystal panel, during a certain horizontal scanning period or vertical scanning period, the minimum potential V _SS1 of the driving voltage of the floating circuit is set to the minimum potential for charging the liquid crystal panel. V _DD1 is the same as the highest potential for charging the liquid crystal panel or the highest potential for the floating circuit.

Further, in the next horizontal scanning period or vertical scanning period, the highest potential of the floating circuit or the highest potential V _DD1 of the charging voltage in the previous horizontal scanning period or vertical scanning period is set as the charging voltage or the lowest potential of the floating circuit. , V _DD2 are the charging voltage or the highest potential of the floating circuit.

Thereafter, this operation is repeated, and the drive voltage of the floating circuit is the same in any case.
Level shift driving is performed with a constant driving voltage width at V _DD1 −V _SS1 or V _DD2 −V _DD1 .

The relationship with the charge voltage of the liquid crystal panel is V _DD1
Becomes the midpoint level (counter electrode potential) of the charging voltage, and V
_{Between DD1} - _VSS1 , a negative charging voltage is written to the opposite electrode of the liquid crystal panel, and between _VDD2 - _VDD1 , a positive charging voltage is written to the opposite electrode.

Here, assuming that the output of the terminal 1 of the level shift power supply 1 in FIG. 4 is V _U and the output of the terminal 2 is V _L , the following equation holds in any case.

V _U -V _L = V _DD1 -V _SS1 (1) V _U -V _L = V _DD2 -V _DD1 (2)

The reference voltage circuit 5 shown in FIG. 1 is composed of an m-stage voltage follower circuit composed of an analog switch and an operational amplifier as shown in FIG. 2, and is supplied as a reference power supply for the D / A conversion circuit. .

Here, in order to perform the alternating display of the liquid crystal panel, when the same display is performed, it is necessary to charge a voltage having the same amplitude with respect to the potential of the counter electrode. to the potential of the terminal 3 in FIG. 2, V _DD2
And _Vss1 are alternately switched.

Switching between V _DD2 and V _SS1 of the terminal 3 is performed by the D-type flip-flop 17 and the analog switch 15, and the D-type flip-flop 8 and the D-type flip-flop 1 are switched.
7, the driving voltage of the voltage follower and the driving voltage of the floating circuit are set to the same voltage. That is, the analog switch 15 which receives the horizontal synchronizing signal or the vertical synchronizing signal and receives the output of the D-type flip-flop 17 for inverting the output every cycle thereof is _supplied with the power supply voltages V _DD2 and V _SS1 every horizontal scanning period or vertical scanning period. Are alternately switched and output, the contact of the resistors r1 and rm connected in series between the output of the analog switch 15 and the power supply voltage V _DD1 is set as the non-inverting input, and the operational amplifier 1 feedback-inputs the output to the inverting input terminal.
, And voltage-follower operational amplifiers 1 to m output reference voltages V1 to Vm.

FIG. 5 shows the relationship between the level shift voltage and the output voltages V1 to Vm of the voltage followers of the reference power supply circuit 5. V1 represents the output voltage of the operational amplifier 1, and Vm represents the output voltage of the operational amplifier m. The analog switch 15 is designed so that the output voltage of the same operational amplifier always has the same voltage width as the potential (V _DD1 ) of the common electrode. Can be switched with.

The m reference power supplies are supplied as reference voltages for the D / A conversion circuit 4 and at the same time, the γ of the liquid crystal display panel is used.
²⁶ analog voltages are generated by the reference power supply 5 and the D / A conversion circuit 4 based on display data of n bits for each color of RGB, which is a correction potential.

The output circuit 3 includes a data register for capturing display data in synchronization with a clock signal, a latch circuit for holding display data, a charging circuit for a liquid crystal display panel, and the like. , Reference voltage circuit 5
And an analog signal that has been D / A converted with display data transmitted via the level conversion circuit 2 to the liquid crystal display panel. Normally, there are two types of charging circuits: one with a built-in voltage follower in the final output stage that has improved the ability to charge the liquid crystal panel by impedance conversion, and the other with a transfer gate in the final output stage. is there.

Generally, in a set such as a personal computer, a display signal transmitted from the set body and a control signal of the floating circuit are controlled by a CMO.
The S or TTL signal, as long as the floating circuit is driven by the level shift power supply as shown in FIG. 3, the signal cannot be transmitted because the interface level of the signal does not match.

For this reason, in the present embodiment, as shown in FIG. 2, the display signal or the control signal (CMOS or TTL signal) I _{1 to} I _P 22 of the output circuit 3 and the horizontal synchronizing signal or the vertical synchronizing signal Pulse signal with constant pulse width)
, An OR gate 19 which takes as inputs the data bus 20 which is capacity-coupled by the capacitor 18.
To the data register and the like of the output circuit 3 through the signals Q ₁ to Q ₁ .
Send Q _P.

The data bus 20 is DC-fixed near the threshold voltage of the data bus 20 by a resistor string. Further, the average voltage of the horizontal synchronizing signal or the vertical synchronizing signal V21 is set to be near the threshold of the data bus 20.

Generally, display data is a high-speed signal,
(Video Graphics Array), etc., up to 25M
Hz to 30 MHz, and there is no problem in transmitting an AC (alternating current) pulse signal. However, when the display signal is slowed down by the display data pattern, or when a low duty pulse close to a DC (DC) component such as a latch signal of a floating circuit or an enable signal for capturing data is capacitively coupled, the average value, that is, the threshold voltage Is extremely reduced, so that the noise margin of the data bus 20 is lost, and signal transmission becomes impossible.

For this reason, as shown in FIG. 6, the horizontal synchronizing signal 21 is OR-coupled during the horizontal rest period in which the level conversion circuit 1 does not take in the display signal and the control signal 22, so that the noise margin can be stably secured. Like that.

FIG. 8 shows the configuration of the second embodiment of the present invention. Referring to FIG. 8, the difference between the second embodiment of the present invention and the above-described first embodiment lies in the configuration of the reference voltage circuit.

When the γ characteristic of the active matrix liquid crystal panel is different between the positive charging voltage and the negative charging voltage, the reference voltage applied in positive and negative is set to γ in order to make the positive and negative γ characteristics uniform.
It is necessary to correct for the characteristic deviation.

Incidentally, in the first embodiment described above, γ
It is assumed that the characteristics are positive and negative symmetric, and FIG. 6 assumes a reference power supply circuit in which the characteristics are asymmetric.

In the second embodiment, a reference power source which is twice as large as the m-stage reference power source used in the first embodiment is prepared, and m m for positive charging and m m for negative charging are provided. Built-in reference power supply,
At the positive and negative charging timings, one of the m reference power supplies is selected by an analog switch and output to the D / A conversion circuit.

[0054]

As described above, according to the present invention,
Compared with the above-described counter electrode inversion driving, the counter electrode potential is always kept at a constant level, so that the reference potential when the liquid crystal display panel is charged from the output circuit can always be kept at a stable level. By accurate charging of the liquid crystal display panel, a reliable display voltage can be written to the pixels of the liquid crystal display panel, and the display image quality can be improved.

Further, according to the present invention, it is not necessary to shift the level of the counter electrode at a high speed, so that the power consumption of the liquid crystal display device can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a liquid crystal display device according to a first embodiment of the present invention.

FIG. 2 is a detailed block diagram of each component of the liquid crystal display device according to the first embodiment of the present invention.

FIG. 3 is a diagram showing a level shift voltage waveform generated from a level shift power supply in the first embodiment of the present invention.

FIG. 4 is a diagram showing a circuit configuration of a level shift power supply according to the first embodiment of the present invention.

FIG. 5 is a diagram showing an output voltage waveform of a reference power supply according to the first embodiment of the present invention.

FIG. 6 is a diagram showing signal waveforms input to a level conversion circuit in the first embodiment of the present invention.

FIG. 7 is a block diagram illustrating a configuration of a liquid crystal display device according to a second embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration of a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Level shift power supply 2 Level conversion circuit 3 Output circuit 4 D / A conversion circuit 5 Reference voltage circuit 6 First driving means 7 Second driving means 8 D flip-flop 9-12 Transistor 13 Horizontal synchronizing signal or vertical synchronizing signal 14 Level shift power supply 15 analog switch 16 operational amplifier 17 D flip-flop 18 capacitance 19 OR gate 20 data bus 21 horizontal synchronization signal or vertical synchronization signal 22 CMOS or TTL signal

Claims (9)

[Claims] 1. A plurality of pixels each comprising a switch element and a liquid crystal display element arranged in an array in both the row and column directions, a plurality of data lines connecting these pixels in common for each column, and a plurality of pixels for each row. A liquid crystal display panel including a plurality of scanning lines commonly connected to each other; a first driving unit for driving the data lines commonly connected to each of the columns of the pixels; and a common driving line for each of the rows of the pixels. Second driving means for driving the connected scanning lines, wherein the first driving means charges a liquid crystal display element of the selected pixel via the switch element to display the liquid crystal panel. An active matrix type liquid crystal display device, comprising: an output unit for generating a signal output from the output unit; a D / A conversion unit for generating an output signal of the output unit; and a reference voltage unit for supplying a reference voltage of the D / A conversion unit. , The first driving means further includes the output means and the D
/ A conversion means and level shift power supply means for level-shifting the drive power supply for the reference voltage means, and level conversion means for converting a control signal of a display signal or the output signal into the level-shifted potential. In the horizontal scanning period or the vertical scanning period, the minimum potential of the driving power supply of the output unit, the D / A conversion unit, and the reference voltage unit is set to be the same as the minimum potential of the charging potential of the liquid crystal panel. In the vertical scanning period, the output potential is set so that the highest potential of the driving voltage in the previous horizontal scanning period or vertical scanning period becomes the lowest potential of the driving power supply of the output means, the D / A conversion means, and the reference voltage means. Means, the D / A conversion means, and the reference voltage means are level-shifted to charge the liquid crystal display element, whereby the output means and the D / A A liquid crystal display device, wherein the liquid crystal display element is charged with a voltage corresponding to a maximum of twice the drive voltage width of the conversion means and the reference voltage means. 2. The level conversion means, wherein the output means comprises: a data register for taking in display data in synchronization with a clock; a latch circuit for holding the display data; and a charging circuit for charging a liquid crystal display panel. Display data sent through the
The D / A conversion means and the display data transmitted by the reference voltage means via the level conversion means,
2. The liquid crystal display device according to claim 1, wherein the analog signal subjected to the / A conversion is charged in a liquid crystal display panel. 3. The level conversion means includes an OR gate, a capacitor, and a data bus, and converts the level of the display signal to a floating level. The display signal is output to the output means via the level conversion means. The control signal of the output means is input to the latch circuit of the output means via the level conversion means, similarly to the display signal, and the OR gate of the level conversion means The display signal or the control signal having a low duty is subjected to a logical sum operation with a signal having a constant duty such as a horizontal synchronization signal, and then transmitted to the output means via the capacitor and the data bus. The liquid crystal display device according to claim 1, wherein 4. The level shift power supply means includes: a switch transistor;
The liquid crystal display device according to claim 1, further comprising a flip-flop. 5. The reference voltage means has a different configuration depending on whether the γ characteristic of the liquid crystal panel is symmetric or asymmetric with respect to the positive / negative polarity of the charging voltage. 2. The liquid crystal display device according to claim 1, wherein the liquid crystal display device comprises 2m reference power supplies and an analog switch for selecting and outputting m reference power supplies from 2m reference power supplies. 6. A plurality of pixels comprising a switch element and a liquid crystal display element arranged in an array in both the row and column directions, a plurality of data lines connecting these pixels in common for each column, and a plurality of pixels for each row. An active matrix type comprising: a liquid crystal display panel including a plurality of scanning lines connected to each other in common; a first driving unit for driving the data lines; and a second driving unit for driving the scanning lines. The liquid crystal display device of the above, further comprising means for level-shifting the drive voltage and the display signal of the first drive means for each horizontal scanning period or vertical scanning period, keeping the potential of the counter electrode constant, and keeping the potential of the counter electrode constant. A liquid crystal display device which does not require switching every horizontal scanning period or every vertical scanning period. 7. The method according to claim 1, wherein the first driving unit is configured to perform a horizontal scanning period or a vertical scanning period on the basis of a potential of the counter electrode.
Level shift power supply means for level-shifting the drive power supply voltage up and down; and level conversion for level-converting a display signal and a control signal supplied to an output circuit of the first drive means based on an output drive voltage of the level shift power supply means. 7. A liquid crystal display device according to claim 6, comprising: means. 8. A power supply voltage V _DD2 or V _DD1 as an output from a high potential (V _U ) terminal and a low potential (V _L ) as an output from a high potential (V _U ) terminal every horizontal scanning period or vertical scanning period.
The power supply voltage V _DD1 or V _SS1 (V _DD2
8. The liquid crystal display device according to claim 7, further comprising means for switching and outputting> V _DD1 > V _SS1 , where V _DD1 is the potential of the _common electrode. 9. The circuit according to claim 1, wherein said level conversion means inputs an input signal comprising said display signal or a control signal of said output circuit, and a signal having a constant duty such as a horizontal synchronizing signal. The output of the capacitor is pulled up / down to the output of the level shift power supply means and the capacity for coupling.
8. The liquid crystal display device according to claim 7, further comprising a resistor for pulling down, converting the display signal or the control signal of the output circuit to a floating level and supplying the floating signal to the output circuit.