JPH11121886A - Printed circuit board - Google Patents

Printed circuit board

Info

Publication number
JPH11121886A
JPH11121886A JP9287089A JP28708997A JPH11121886A JP H11121886 A JPH11121886 A JP H11121886A JP 9287089 A JP9287089 A JP 9287089A JP 28708997 A JP28708997 A JP 28708997A JP H11121886 A JPH11121886 A JP H11121886A
Authority
JP
Japan
Prior art keywords
circuit board
printed circuit
lead
marking
printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP9287089A
Other languages
Japanese (ja)
Inventor
Hiromi Koda
寛美 幸田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Machinery Ltd
Original Assignee
Murata Machinery Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Machinery Ltd filed Critical Murata Machinery Ltd
Priority to JP9287089A priority Critical patent/JPH11121886A/en
Publication of JPH11121886A publication Critical patent/JPH11121886A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452Solder masks

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To enable an inspector an inspector to recognize lead wire which number of fold it is merely by looking a printed circuit board by writing down a mark for identifying recognizing the number allotted to a lead wire, in the section where electronic parts are mounted, on a circuit board. SOLUTION: In an electronic part 1, a mark 4 is silk-printed on the surface of the solder resist of a printed wiring board, and this is of such scale marking that first ' ' is written down in the section corresponding to a first lead 3, and that '.' is written down at a specified interval, for example, every five numbers anticlockwise to the subsequent leads 3 in serial numbers. Since the printed circuit board is marked by this method, the discovery of the lead wire to be the target of test becomes easy at inspection, and if a user applies the test pin of a tester to the section between the lead and the land, he can perform the test on whether it is good or bad easily, as to the mounting condition or conductivity.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、多数のリードを有
した電子部品を実装した印刷回路基板において、特に検
査時等に検査者が特定番号のリードの発見を容易にする
ためになされたものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board on which electronic components having a large number of leads are mounted, and more particularly to a printed circuit board in which an inspector can easily find a lead having a specific number during an inspection or the like. It is.

【0002】[0002]

【従来の技術】印刷回路基板の製造工程においては、は
んだ層などを通して印刷回路基板に電子部品を実装する
が、電子部品を実装した後、検査者が電子部品の各リー
ドに、テスターのテストピンなどをあてることによっ
て、リードとランド(電子部品を装着する部分)とのシ
ョート、オープンなどを電気的に検査して、良品か不良
品かを判別している。
2. Description of the Related Art In a manufacturing process of a printed circuit board, electronic components are mounted on the printed circuit board through a solder layer or the like. After mounting the electronic components, an inspector applies test pins of a tester to each lead of the electronic components. In this way, a short or an open between the lead and the land (a part where the electronic component is mounted) is electrically inspected to determine whether the product is good or defective.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、実装す
る電子部品がコンデンサやトランジスタなどといったリ
ードの本数が2本もしくは3本の部品であれば、検査者
が、リードとランド(電子部品を装着する部分)とのシ
ョート、オープンなどを電気的に検査するときに、どの
リードとランド(電子部品を装着する部分)との装着状
態が良もしくは不良かを一目で判別することができる
が、実装する電子部品がICやLSIなどといった集積
回路である場合には、集積回路は、リードの数がますま
す増大しており、各リード間の間隔も非常に狭くなって
いるので、検査者が何番目のリードであるかを目で追っ
て識別するのが非常に困難でほとんど不可能に近い状況
となっている。
However, if the electronic component to be mounted is a component having two or three leads, such as a capacitor or a transistor, the inspector can use the lead and the land (the part where the electronic component is mounted). ) Can be determined at a glance which lead and land (the part where the electronic component is to be mounted) are in a good or bad mounting state. When the component is an integrated circuit such as an IC or an LSI, the number of leads of the integrated circuit is increasing and the interval between each lead is very narrow. It is very difficult and almost impossible to identify the lead visually.

【0004】本発明は、上記の問題を解決するために提
案されるものであり、例えば工場で、多数のリードを有
した、ICチップなどの集積回路などの電子部品を実装
した印刷回路基板を検査する時に、検査者が印刷回路基
板を見ただけで、何番目のリードかを容易に識別できる
印刷回路基板を提供することを目的としている。
The present invention has been proposed to solve the above-mentioned problem. For example, a printed circuit board having a large number of leads and having mounted thereon electronic parts such as integrated circuits such as IC chips is provided at a factory. It is an object of the present invention to provide a printed circuit board that allows an inspector to easily identify the number of a lead only by looking at the printed circuit board during inspection.

【0005】[0005]

【課題を解決するための手段】上記目的を解決するため
に、請求項1に記載の印刷回路基板は、多数のリードを
有した電子部品を実装した印刷回路基板において、回路
基板上の電子部品を実装した部分には、リードに割り付
けられた番号の識別を容易にするためのマーキングを記
していることを特徴としている。
According to a first aspect of the present invention, there is provided a printed circuit board on which an electronic component having a large number of leads is mounted. Is characterized in that markings for facilitating the identification of the numbers assigned to the leads are marked on the parts where.

【0006】請求項2に記載の印刷回路基板は、請求項
1において、マーキングは、特定のリードを基準にし
て、所定の間隔ごとに記されたスケールマーキングであ
ることを特徴としている。請求項3に記載の印刷回路基
板は、請求項1または請求項2において、マーキングは
印刷回路基板にシルク印刷されていることを特徴として
いる。
A printed circuit board according to a second aspect is characterized in that, in the first aspect, the marking is a scale marking written at predetermined intervals on the basis of a specific lead. A printed circuit board according to a third aspect is characterized in that, in the first or second aspect, the marking is silk-printed on the printed circuit board.

【0007】[0007]

【発明の実施の形態】以下に、本発明の実施の形態につ
いて、図面を用いて説明する。図1は、印刷回路基板に
実装された電子部品の一例を示す平面図である。なお、
本発明では、印刷回路基板に実装する電子部品の一例と
して、QFP(Quadrate Flat Pack
age)型ICを用いて説明するが、ピン挿入タイプと
して、DIP(Dual In−line packa
ge)型IC、S−DIP(Shrink DIP)型
ICなどを、表面実装タイプとして、SOP(Smal
l Outline Package)型IC、TQF
P(Thin QFP)型ICなどを用いてもよいこと
はいうまでもない。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view illustrating an example of an electronic component mounted on a printed circuit board. In addition,
In the present invention, a QFP (Quadrate Flat Pack Pack) is used as an example of an electronic component mounted on a printed circuit board.
An explanation will be given using an IC (Age) type IC. As a pin insertion type, a DIP (Dual In-line packa) is used.
ge (type) IC, S-DIP (Shrink DIP) type IC, etc., as SOP (Smal
l Outline Package) type IC, TQF
It goes without saying that a P (Thin QFP) type IC may be used.

【0008】電子部品1において、2は本体、3はリー
ドである。マーク4は、印刷回路基板の作成時に、印刷
回路基板のソルダレジストの表面上にシルク印刷され、
まず第1番目のリード3に対応する部分に、「◎」を記
し、続く連続番号のリード3に対して反時計回りに、所
定の間隔、例えば5番ごとに、「・」を記したスケール
マーキングとなっている。
In the electronic component 1, 2 is a main body, and 3 is a lead. The mark 4 is silk-printed on the surface of the solder resist of the printed circuit board when the printed circuit board is created,
First, the scale corresponding to the first lead 3 is marked with “◎”, and the next consecutive lead 3 is marked counterclockwise at predetermined intervals, for example, at every 5th scale. Marking.

【0009】ここにスケールマーキングは、リードに割
り当てた数字を直接記さず、ドットや線分の目盛で記せ
ばよく、狭いスペースでも十分に識別表示として用いる
ことができる。このようなマーキングは、サブトラクテ
ィブ法で作成された印刷回路基板はもちろんのこと、ア
ディティブ法で作成された印刷回路基板のいずれにも適
用できる。
[0009] Here, the scale marking may be indicated by a dot or line scale without directly writing the number assigned to the lead, and can be sufficiently used as an identification display even in a narrow space. Such a marking can be applied to any printed circuit board prepared by an additive method as well as a printed circuit board prepared by a subtractive method.

【0010】本発明においては、このような方法で、印
刷回路基板にマーキングを記しているので、検査時にお
いて、試験の対象とすべきリードの発見が容易となり、
そのリードとランド(電子部品を装着する部分)との間
にテスターのテストピンを当てがえば、装着状態や導電
性について、良もしくは不良かの試験を容易に行うこと
ができる。
[0010] In the present invention, since the marking is written on the printed circuit board by such a method, it is easy to find the lead to be tested at the time of inspection.
If a test pin of a tester is applied between the lead and a land (a part on which an electronic component is mounted), it is possible to easily test whether the mounting state or conductivity is good or bad.

【0011】マーキングは、図示例では、電子部品1の
反時計回りに、リード3を数えて5本おきにマーキング
4をシルク印刷しているが、電子部品1の時計回りに数
えてもよいし、間隔を変えてもよい。また、マーキング
4を印刷回路基板に記す方法としては、シルク印刷のみ
ならず、導体パターンで記す方法、ソルダレジストを形
成しない方法などがあり、適宣選択すればよい。
In the illustrated example, the markings 4 are silk-printed every five leads 3 by counting the leads 3 in the counterclockwise direction of the electronic component 1. However, the markings may be counted in the clockwise direction of the electronic component 1. The interval may be changed. In addition, as a method of writing the marking 4 on the printed circuit board, not only silk printing, but also a method of writing with a conductor pattern, a method of not forming a solder resist, and the like may be appropriately selected.

【0012】導体パターンで記す方法としては、サブト
ラクティブ法で印刷回路基板を作成し、その際、銅箔上
にマーキング4を記したい位置に所望の形状でエッチン
グレジストを施し、エッチング処理を施せばよい。一
方、アディティブ法で印刷回路基板を作成する時には、
絶縁基板上にめっきレジストを施す際に、マーキング4
を記したい位置に所望の形状で、めっきレジストを施さ
ない部分を設け、無電解銅めっきを施せばよい。
As a method of writing with a conductor pattern, a printed circuit board is prepared by a subtractive method, and at this time, an etching resist is applied in a desired shape to a position where a marking 4 is to be written on a copper foil, and an etching process is performed. Good. On the other hand, when making a printed circuit board by the additive method,
When applying plating resist on an insulating substrate, the marking 4
Is provided in a desired shape at a position where a plating resist is not to be applied, and electroless copper plating may be applied.

【0013】なお、サブトラクティブ法、アディティブ
法のどちらの方法で印刷回路基板を作成する時において
も、導体パターンでマーキング4を記した後、マーキン
グ4が印刷回路基板表面に露出していては、導体パター
ンは、はんだが乗りやすい性質を持っているので、電子
部品をはんだ付けする際に、マーキングとマーキングと
の間、リードとマーキングとの間にはんだブリッジがで
きてしまう可能性があるので、マーキング4の上方より
ソルダレジストを施すことが望ましい。
In addition, when the printed circuit board is formed by either the subtractive method or the additive method, after the marking 4 is written with the conductor pattern, if the marking 4 is exposed on the surface of the printed circuit board, Since the conductor pattern has the property that solder is easy to ride, when soldering electronic components, there is a possibility that a solder bridge may be formed between the marking and the lead and the marking, It is desirable to apply a solder resist from above the marking 4.

【0014】ソルダレジストを形成しない方法として
は、マーキング4を記したい位置に所望の形状でソルダ
レジストがのらないようにしたマスクを使用しソルダレ
ジストを塗布して、印刷回路基板にマーキング4を記す
ことができるが、マーキング4を記す場所としては、ソ
ルダレジストを形成する際に、下に導体パターンが存在
している部分を選ぶと、導体パターンが印刷回路基板表
面に露出してしまい、電子部品をはんだ付けする際に、
マーキングとマーキングとの間、リードとマーキングと
の間にはんだブリッジができてしまう可能性がある。し
たがって、マーキング4を記す場所としては、マーキン
グの下に、導体パターンが存在しない場所であることが
望ましい。
As a method of not forming the solder resist, a solder resist is applied to a position where the marking 4 is to be written in a desired shape using a mask in which the solder resist is not applied, and the marking 4 is formed on the printed circuit board. As a place for marking 4, if a portion where a conductor pattern is present is selected at the time of forming a solder resist, the conductor pattern is exposed on the surface of the printed circuit board. When soldering parts,
A solder bridge may be formed between the markings and between the lead and the marking. Therefore, it is desirable that the place where the marking 4 is described is a place where there is no conductor pattern below the marking.

【0015】図2は、印刷回路基板に実装された電子部
品の他の例を示す平面図である。なお、図において、図
1に示す印刷回路基板に実装された電子部品と同一の構
成要素については、参照符号を付して説明を省略する。
マーキング4は、印刷回路基板の作成時に、印刷回路基
板のソルダレジストの表面上に記され、まず第1番目の
リード3に対応する箇所に「(1)」を記し、「(1)」から
始まって電子部品1の反時計回りに、リード3を数えて
5本おきに、そのリード3に対して割り付けられた番号
「(5)」、「(10)」、「(15)」、「(20)」・・・を記し
ている。
FIG. 2 is a plan view showing another example of an electronic component mounted on a printed circuit board. In the figure, the same components as those of the electronic component mounted on the printed circuit board shown in FIG.
The marking 4 is written on the surface of the solder resist of the printed circuit board when the printed circuit board is created. First, "(1)" is written at a position corresponding to the first lead 3, and "(1)" Starting from the counterclockwise direction of the electronic component 1, every three leads 3 are counted, and the numbers “(5)”, “(10)”, “(15)”, “ (20) "...

【0016】図3は、印刷回路基板に実装された電子部
品の更に他の例を示す平面図である。なお、図におい
て、図1に示す印刷回路基板に実装された電子部品と同
一の構成要素については、参照符号を付して説明を省略
する。図中に示すように、各々のリード3に対応して、
第1番目のリード3には、「・」を記し、他のリード3
には、一定の間隔で縦ラインのスケールマーキングを記
して、検査者が何番目のリードかを容易に識別できるよ
うにしている。
FIG. 3 is a plan view showing still another example of the electronic component mounted on the printed circuit board. In the figure, the same components as those of the electronic component mounted on the printed circuit board shown in FIG. As shown in the figure, corresponding to each lead 3,
The first lead 3 is marked with “•” and the other leads 3
, Vertical scale markings are written at regular intervals so that the inspector can easily identify the lead number.

【0017】なお、スケールマーキングは、5本間隔ご
とに細線、10本間隔ごとに太線などで区分すれば、特
定番号の割り付けられたリードの発見がより容易に行う
ことができる。更に、図には示していないが、印刷回路
基板の作成時に、所定のリードごとに、その対応する導
体パターンの端部の形状を太くしてもよい。
If the scale marking is divided into thin lines at intervals of five lines and thick lines at intervals of ten lines, it is possible to more easily find leads to which specific numbers are assigned. Furthermore, although not shown in the drawings, the shape of the end of the corresponding conductor pattern may be thickened for each predetermined lead when the printed circuit board is formed.

【0018】[0018]

【発明の効果】以上の説明から理解できるように、請求
項1に記載の印刷回路基板によれば、回路基板上の電子
部品を実装した部分には、リードに割り付けられた番号
の識別を容易にするためのマーキングを記しているの
で、検査時等に検査者が特定のリードの発見が容易にで
きる。
As can be understood from the above description, according to the printed circuit board of the first aspect, it is easy to identify the number assigned to the lead on the part on which the electronic component is mounted on the circuit board. Since the markings are written for the inspection, the inspector can easily find a specific lead at the time of inspection or the like.

【0019】請求項2に記載の印刷回路基板は、請求項
1の発揮する効果に加えて、マーキングは、特定のリー
ドを基準にして、所定の間隔ごとに記されたスケールマ
ーキングになっているので、狭い場所でも容易に回路基
板上にマーキングを記すことができる。請求項3に記載
の印刷回路基板は、請求項1または請求項2の発揮する
効果に加えて、マーキングは印刷回路基板にシルク印刷
されているので、簡単に、かつ、低コストでマーキング
を記すことができる。
In the printed circuit board according to the second aspect, in addition to the effect of the first aspect, the marking is a scale marking written at predetermined intervals on the basis of a specific lead. Therefore, marking can be easily marked on the circuit board even in a narrow place. In the printed circuit board according to the third aspect, in addition to the effects of the first or second aspect, the marking is printed on the printed circuit board by silk-screening, so that the marking can be performed easily and at low cost. be able to.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例を示し、印刷回路基板に実装
された電子部品例を示す平面図である。
FIG. 1 is a plan view illustrating an example of an electronic component mounted on a printed circuit board according to an embodiment of the present invention.

【図2】本発明の他例を示し、印刷回路基板に実装され
た電子部品例を示す平面図である。
FIG. 2 is a plan view showing another example of the present invention and showing an example of an electronic component mounted on a printed circuit board.

【図3】本発明の更に他例を示し、印刷回路基板に実装
された電子部品例を示す平面図である。
FIG. 3 is a plan view showing still another example of the present invention and showing an example of an electronic component mounted on a printed circuit board.

【符号の説明】[Explanation of symbols]

1 電子部品 3 リード 4 マーキング 1 electronic component 3 lead 4 marking

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】多数のリードを有した電子部品を実装した
印刷回路基板において、上記回路基板上の電子部品を実
装した部分には、リードに割り付けられた番号の識別を
容易にするためのマーキングを記していることを特徴と
する印刷回路基板。
1. A printed circuit board on which electronic components having a large number of leads are mounted, on a portion of the circuit board on which the electronic components are mounted, a marking for facilitating identification of a number assigned to the lead. A printed circuit board characterized by the following.
【請求項2】請求項1において、前記マーキングは、特
定のリードを基準にして、所定の間隔ごとに記されたス
ケールマーキングであることを特徴とする印刷回路基
板。
2. The printed circuit board according to claim 1, wherein the marking is a scale marking written at predetermined intervals based on a specific lead.
【請求項3】請求項1または請求項2において、前記マ
ーキングは前記印刷回路基板にシルク印刷されているこ
とを特徴とする印刷回路基板。
3. The printed circuit board according to claim 1, wherein the marking is silk-printed on the printed circuit board.
JP9287089A 1997-10-20 1997-10-20 Printed circuit board Withdrawn JPH11121886A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9287089A JPH11121886A (en) 1997-10-20 1997-10-20 Printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9287089A JPH11121886A (en) 1997-10-20 1997-10-20 Printed circuit board

Publications (1)

Publication Number Publication Date
JPH11121886A true JPH11121886A (en) 1999-04-30

Family

ID=17712921

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9287089A Withdrawn JPH11121886A (en) 1997-10-20 1997-10-20 Printed circuit board

Country Status (1)

Country Link
JP (1) JPH11121886A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030029427A (en) * 2001-10-08 2003-04-14 삼신써키트 주식회사 Design and Manufacturing method of FPC & PCB for the decomposition and selective recombination of the product
US8242615B2 (en) * 2007-02-27 2012-08-14 Oki Semiconductor Co., Ltd. Semiconductor chip on film package with dummy patterns and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030029427A (en) * 2001-10-08 2003-04-14 삼신써키트 주식회사 Design and Manufacturing method of FPC & PCB for the decomposition and selective recombination of the product
US8242615B2 (en) * 2007-02-27 2012-08-14 Oki Semiconductor Co., Ltd. Semiconductor chip on film package with dummy patterns and manufacturing method thereof

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Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20050104