JPH11121692A - Manufacture of resistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a resistor which is capable of obtaining a specified resistance value, even when an alignment error occurs and can be made fine. SOLUTION: This resistor 20, having a first resistance 21 of a width W1 ' and length L1 ' and second resistance 22 which is connected to both ends of the resistance 21 and has a width W' and electrodes, comprises a photoresists 15 formed over the second resistance 22 to prevent an impurity from reaching a polycrystalline Si film 14, such that a length K of the resist 15 to the second resistance 22 from the first resistance 21, is longer than the sum of a max. of relative alignment deviation of a photoresist 15 pattern from a photoresist pattern forming the outline of the resistor 20 and the length of a diffused region formed at heat treating, and the second resistance 22 is doped with an impurity to form low- and high-concn. regions 14a, 14b, so that the photoresist 15 is not formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a resistor, and more particularly, to a method of manufacturing a resistor mounted on a semiconductor device.

[0002]

2. Description of the Related Art As a resistor used in a semiconductor integrated circuit, a resistor using a diffusion layer formed by an impurity introduced into a silicon substrate and a polycrystalline silicon film formed on the substrate via an insulating film, for example, are used. There is a used resistor. Among these, in the resistance using the diffusion layer in the silicon substrate, for example, since a portion having an N-type impurity and a portion having a P-type impurity exist in the silicon substrate, there is a parasitic capacitance, and the FET effect is reduced. And there are bias limitations. On the other hand, a resistor using a polycrystalline silicon film formed on a substrate does not have such a problem. Therefore, the resistor is often manufactured as a resistor of a semiconductor integrated circuit.

FIG. 10 is a sectional view of a resistor 1 using general polycrystalline silicon. This is because on the silicon oxide films 3 and 3 ′ formed on the silicon substrate 2,
It is formed of a polycrystalline silicon film having a predetermined first pattern and having a predetermined impurity doped therein. An insulating film 4 having contact holes 4a and 4b at both ends 1a and 1b is formed on the resistor 1, and the insulating film 4 is further filled so as to fill the contact holes 4a and 4b.
Wiring layers 5a and 5b made of metal are formed. That is, the resistor 1 has the wiring layers 5a at both ends 1a and 1b.
5b is connected.

In order to form a high-resistance resistor using a polycrystalline silicon film, it is an easy method to increase the length of the polycrystalline silicon. This is contrary to the recent demand for miniaturization of circuits. Therefore, there is a method of reducing the concentration of impurities in polycrystalline silicon and increasing the sheet resistance to create a high resistance. However, in this case, since the impurity concentration is low, that is, the impurities are sparsely present,
Variations occur in the contact resistance between the resistor 1 and the wiring layers 5a and 5b, and the characteristics of the manufactured semiconductor integrated circuit vary. In order to prevent this, as shown in FIG. 11 (this figure shows the plan shape of the resistor 1), the wiring layers 5a, 5a
In some cases, the resistance may be reduced by increasing the impurity concentration at both ends 1a and 1b (in the figure, for example, indicated by oblique lines) connected to the contact b. Note that in FIG.
The portions shown as c and 1d are the wiring layers 5a and 5b
Is an electrode part formed. On the other hand, in order to create a high-resistance resistor using a polycrystalline silicon film, it is conceivable to reduce the width of the polycrystalline silicon. However, the limit of the contact area due to the contact resistance between the crystalline silicon film and the wiring layer, There is a limit to narrowing the width due to an alignment error between the contact portion and the polycrystalline silicon film.

Therefore, as shown in FIG.
a, the width Wc of both ends 1a ', 1b' of the resistor 1 'with which the contacts 5a and 5b are made larger than the width Wt of the central portion t;
In other words, a dock bone type resistor 1 'is provided. In this way, even if the resistors have the same sheet resistance, the resistance between the wiring layers 5a and 5b can be increased. Further, in order to obtain a higher resistance value, the impurity concentration in the central portion t may be reduced, but the wiring layers 5a, 5a
part where b is formed (that is, both ends 1a ', 1b')
As for the above, the impurity concentration needs to be increased for the above-mentioned reason. In this case, for example, after the patterning of the resistor 1 'is performed, as shown in A of FIG. 13, to cover the central portion t a photoresist film 6 having a length L _t of the central portion t, impurities Doping. By the heat treatment performed to activate the impurities, the impurities are diffused from the high-concentration regions (that is, both end portions 1a 'and 1b') to the low-concentration regions (that is, the central portion t). 1
As shown in FIG. 3B, a diffusion region d is formed at the boundary between the high-density region and the low-density region. That is, the resistor 1 ′ has both ends 1 a ′, which are regions with a high impurity concentration,
1b ', a diffusion region d, and a central portion t including a region having a low impurity concentration.

[0006]

However, FIG.
As shown in (1), it is rare that the end portion of the photoresist film 6 and the center portion t of the resistor 1 'are perfectly matched, and there is usually misalignment. For example, FIG. 14 shows a case where the photoresist film 6 is shifted to the right. In this case, a central portion t ′ where a portion h with a high impurity concentration is formed on the left and an impurity concentration Is a resistor 1 "having an end 1b" where a low portion 1 is formed. Note that the heat treatment for activating the doped impurity causes a diffusion region d between the high-concentration region and the low-concentration region of the impurity.
₁ and d ₂ are formed. That is, the photoresist film 6
When the misalignment occurs, the impurity concentration exists in an asymmetrical shape. Therefore, when the misalignment shown in FIG. 14B occurs, the resistance value of the resistor 1 ″ is the same as the misalignment shown in FIG. 13B. Since the amount of misalignment usually varies, the resistance value of the manufactured resistor differs depending on the occasion, that is, a desired value. There was a problem that a resistance value could not always be obtained.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and can miniaturize a semiconductor integrated circuit, and can always form a high-resistance resistor having a reduced contact resistance with a desired resistance value. It is an object to provide a method for manufacturing a resistor.

[0008]

The above object is achieved by connecting a semiconductor film containing impurities to a first resistance portion having a predetermined width and length and to both ends of the first resistance portion, Having a width larger than the width of the first portion and having a second resistor portion on which an electrode portion is formed, and doped from above to produce a resistor having a high-concentration region and a low-concentration region of an impurity. In the step of forming a shielding film for covering the impurities so that the impurity does not reach the portion, the shielding film has a width larger than the width of the second resistance portion, covers the first resistance portion, and is formed over the second resistance portion. The length of this portion of the second resistance portion from the first resistance portion is the relative misalignment between the first pattern of the external shape of the resistor and the second pattern of the external shape of the shielding film. Maximum length and heat treatment to activate doped impurities The second resistor portion is formed so as to be longer than the sum of the length of a diffusion region formed by diffusion of the impurity from the high concentration region of the impurity to the low concentration region, and is not covered by this portion. In order to prevent the formation of the shielding film, the problem is solved by forming the semiconductor film on a semiconductor film containing impurities and doping impurities in this state.

[0009] By forming the resistor in this way, even if the impurity is doped to make the impurity high concentration region in a state where the shielding film is formed shifted, it is always desired. A resistance value can be obtained. Further, even when a higher resistance value is obtained, all the first resistance portions having a small width can be formed as high resistance portions having a low impurity concentration, so that it is not necessary to increase the resistance value more than necessary. That is, the area used for the resistor can be reduced, and the resistor can be miniaturized. Therefore, for example, a semiconductor device equipped with this resistor can be miniaturized.

[0010]

In DETAILED DESCRIPTION OF THE INVENTION The present invention, as shown in FIGS. 8 and 9, for obtaining a high resistance, the predetermined width W ₁ and the length L
₁ and the first resistor R ₁ , R ₁ ′
₁ , R ₁ ′, and connected to both ends of the first resistor R ₁ , R _1
1 Left 'second resistor portion R _2L forming the electrode portion has a width W ₁ greater than the width W _{2 of, R 2L', R 2R,} R 2R '( the first resistance portion in FIG R _1, R _1' The second resistance part is R _2L ,
R _2L ′, and the second resistor part on the right is R _2R , R _2R ′)
A step of forming a semiconductor film containing an impurity serving as a resistor when forming a resistor having a shape having a resistance, that is, a so-called dockbone type resistor; and forming the film (which has a length L) into a first resistor Parts R ₁ , R ₁ ′ and second resistance parts R _2L , R _2L ′, R _2R ,
A first pattern having R _2R ′, that is, a patterning step for determining the shape of the resistor, and a semiconductor film containing an impurity is covered so that the impurity does not reach the film, and a second resistor portion R _2L , R _2L ′, R _2R , R _2R ′, the first resistance part of the second resistance parts R _2L , R _2L ′, R _2R , R _2R ′ of the shielding film F having the second pattern. R
₁ , the length a from R ₁ ′ is defined as the maximum value of the relative misalignment between the first pattern and the second pattern (this is the accuracy of the apparatus used to form the first and second patterns). And diffusion regions R _ML , R _ML ′, which are formed by diffusing the impurity from the high-concentration region to the low-concentration region in the subsequent heat treatment step.
R _MR , R _MR 'length (this is the high concentration region R _H , R _H '
Density difference between the low density regions R _LL , R _LL ′, R _LR , R _LR ′,
(Determined by the temperature and time during the heat treatment) and longer than the sum of c, and the other second resistance portions R _2L , R _2L ′, R _2R ,
A step of forming it so as not to be formed on R _2R ′, a step of doping impurities with this shielding film F being formed on the semiconductor film containing impurities in the second pattern, and activating the doped impurities. And a step of performing a heat treatment for the formation.

That is, FIG. 8B shows the case where there is no misalignment between the pattern for patterning the shielding film F and the pattern for patterning the semiconductor film containing impurities, ie, the shielding film F is ideally patterned. A resistance 9 'manufactured by doping an impurity in a state where the patterned shielding film F is formed is shown. The resistance value r' of the resistance 9 'is r' = r _LL '+ r _ML '+ r
_H '+ r _MR ' + r _LR '. Where r _LL '
Is the resistance of the high-concentration region R _LL ′ of the second resistance portion R _2L ′ formed on the left in FIG. 8, and r _ML ′ is the resistance of the diffusion region R _ML ′ formed on the left in FIG. , R _H ′ is the second
The resistance value of the portion covered with the shielding film F over the resistance portions R _2L ′ and R _2R ′ and becoming the impurity low concentration region R _H ′, r _MR ′
Is the resistance value of the diffusion region R _MR ′ formed on the right side in the figure, and r _LR ′ is the resistance value of the high-concentration region R _LR ′ of the second resistance part R _2R ′ formed on the right side in the figure. It is. And
In FIG. 9, the shielding film F is formed in a state where the misalignment between the patterns occurs at the maximum value length b (to the right), and impurities are doped in the state where the shielding film F is formed. shows the manufactured resistor 9, the resistance value r of the resistor 9 is expressed by _{r = r LL + r ML +} r H + r MR + r LR. Here, r _LL is the resistance value of the high-concentration region R _LL of the second resistance portion R _2R formed on the left side in FIG. 9, and r _ML is the resistance value of the diffusion region R _ML formed on the left side in FIG. Resistance value, r _H
Is the resistance value of the impurity low-concentration region R _H because the shielding film F is formed over the second resistance portions R _2R and R _2L , and r _MR is the diffusion region R _MR formed on the right side in FIG. Resistance value of r
_LR is the resistance value of the high-density region R _LR second resistor portion R _2L formed in the right side in FIG.

[0012] Since the shielding film of the present invention has a length of above, the end portion of the shielding film F is always from the first end of the resistor portion R _1, is formed at a position apart from the length of the diffusion region . Therefore, for example, when the pattern of the shielding film is shifted to the right by the maximum length b from the pattern of the shape, the right second
Portion N which is covered with the shielding film F of the resistance portion R _2R, from partial N covered with a shielding film F of the second resistor portion R _2R 'not misalignment occurs, length × misalignment amount b the It is increased by an area S determined by the width of the two resistance portions R _2R . The portion N of the left second resistance portion R _2L covered with the shielding film F, that is, the low-concentration region has a smaller area by the same area as the area S increased by the second resistance portion R _2R. . That is,
Resistance value r in low concentration region when misalignment occurs
_H ′ is always the same as the resistance value r _H in the low concentration region where no misalignment occurs even if the shape is different.

Further, the exposed portion M of the second resistor portion R _2R of the right when the misalignment occurs, than exposed portion M of the combined second resistor portion R _2R of the right when the shift did not occur ' , The area S. However, when the misalignment occurs, the exposed portion M of the left second resistor portion R _2L is exposed.
Is smaller by the area S than the exposed portion M of the left second resistance portion R _2L ′ when no misalignment occurs. The left second resistance portions R _2L , R _2L ′ and the right second resistance portions R _2R , R _2R ′ have the same impurity concentration. Therefore, the sum of the resistance values r _LL and r _LR in the right and left second resistance portions R _2R and R _2L when misalignment occurs, that is, the resistance value obtained in the high impurity concentration region is The sum of the resistance values r _LL ′ and r _LR ′ in the right and left second resistance portions R _2R ′ and R _2L ′ when no displacement occurs, that is, the resistance value obtained in the high impurity concentration region in this case. Is always equal to

Further, the shielding film F covers the first resistance portion and covers the second resistance portion.
Since the portion formed over the resistance portions R _2L and R _2R has the above-described length, even if misalignment occurs, the impurity diffuses from the high-concentration region to the low-concentration region during the heat treatment even if the misalignment occurs. Diffusion regions R _MR , R _MR ′,
R _ML and R _ML ′ are always formed in the second resistance portions R _2L and R _2R . Further, the diffusion regions R _MR , R _MR ′, R _ML , R
The length of _ML 'is determined by the density difference between the high density area and the low density area,
Since they are determined by the temperature and time of the heat treatment, if they are the same, the shape and size of the diffusion regions R _MR , R _MR ′, R _ML , and R _ML ′ are always the same. , Always equal.

Therefore, as shown in FIG. 9, even if the maximum misalignment b occurs between the pattern for patterning the shielding film F and the pattern for patterning the semiconductor film containing impurities, the shielding film F at that time still has As in the case where the misalignment does not occur at all in FIG.
₁ , R ₁ ′, second resistance portions R _2R , R _2R ′, R _2L , R
Formed over _2L '. Since the exposed portion M not covered with the shielding film F is doped with an impurity, the portion N covered with the shielding film F has a lower impurity concentration than the exposed portion, and has a high sheet resistance. Have. Also, in the part where the high density area and the low density area are in contact,
The diffusion region formed by diffusing the impurity in the high concentration region to the low concentration region by the heat treatment at the time of activating the doped impurity always has the second resistance portions R _2R , R _2R ′, R _2L , R _2L ′. That is, all the regions of the first resistance portions R ₁ , R ₁ ′ having a width L ₁ smaller than the second resistance portions R _2R , R _2R ′, R _2L , R _2L ′ are made to be low-density high-resistance regions. Can be. Therefore, for example, the resistor 9 formed when the maximum misalignment b occurs.
And the resistance value r ′ of the ideally formed resistor 9 ′ in which no misalignment occurs at all times always has the same value. Obtainable. That is, the resistors 9 and 9 'can always be manufactured with a desired resistance value.

Conventionally, ion implantation has been performed on the electrode portion in order to reduce the contact resistance. However, since the ion implantation for forming the second resistance portion having a low sheet resistance can also be used, the manufacturing process can be performed. It does not have to increase further. Further, 'in order to obtain a high resistance value in the resistance 9,9' resistance 9,9 first has a narrow width in the resistance portion R _1,
Since the whole of R ₁ ′ is a low impurity concentration region, even if it is desired to obtain a higher resistance value, the resistances 9 and 9 ′ can be obtained.
It is not necessary to increase the length, and the area used for the resistor can be reduced. Therefore, it is possible to miniaturize a semiconductor integrated circuit equipped with this resistor.

The shielding film F is formed of a second resistance portion R _2L ,
_{R 2L ', R 2R, R} 2R' first has a width W ₂ larger than the width of the
The second resistor portions R _2L , R _2L ′, R 2 cover the resistor portions R ₁ , R ₁ ′.
_2R , R _2R ′, and a portion of the second resistor portions R _2L , R _2L ′, R _2R , R _2R ′ from the first resistor portions R ₁ , R ₁ ′. The length b of the maximum value of the relative misalignment between the first pattern and the second pattern;
A diffusion region R _ML formed by diffusing the impurity from the high-concentration region to the low-concentration region during the heat treatment;
Any shape may be used as long as it is longer than the sum of the lengths c of R _ML ′, R _MR , and R _MR ′ and is not formed on the other second resistance portions. Therefore, as shown in FIG. 2B, for example, this shielding film F covers the first resistor portion of the resistor and has a shape in which only the portion formed over the second resistor portion 22 is formed (hereinafter, the remaining portion is formed). However, as shown in FIG. 7B, an opening 15b 'may be formed in a part of the second resistor portion 22 of the resistor.
(Hereinafter, referred to as a punched shape). In the case of the remaining shape, the pattern of patterning the shielding film and the outer shape of the resistor are patterned so that the width of the portion of the shielding film formed over the second resistance portion is larger than the width of the second resistance portion. It is preferable that the misalignment amount is larger than the amount of misalignment with the pattern. In the case of the blank shape, the width of the opening formed on the second resistor portion is set to the width of the pattern for patterning the shielding film and the outer shape of the resistor. It is preferable that the distance be larger than the amount of misalignment with the pattern to be patterned. In this case, even if an amount of misalignment occurs in the width direction, a predetermined resistance value can be obtained more reliably.

Further, in the manufacturing method of the present invention, the order in which the respective steps are performed does not need to be in the order listed. For example, the shape of the resistor is such that after the shielding film is formed in the second pattern, impurities are doped. This may be performed later, or when forming three or more portions having different impurity concentrations in the diffusion region,
The step of forming the shielding film and the step of doping impurities with the shielding film formed in the second pattern may be performed a plurality of times.

Further, in the step of forming a semiconductor film containing an impurity, when the semiconductor film is formed on a semiconductor substrate by, for example, a CVD method, the impurity is added as a material and the semiconductor film is formed at the same time. An impurity may be contained, or, for example, after a polysilicon film is formed, the entire surface of the film may be doped with an impurity.

The semiconductor film containing the impurity constituting the resistor of the present invention has a P-type or N-type impurity.
It does not mean that only one of the molds contains the same impurity, and that the impurity contains only the same impurity. That is, if the semiconductor film contains N-type impurities, P (phosphorus)
P (phosphorus) and As (arsenic)
A semiconductor film containing B (boron) and Ga (gallium) as well as a semiconductor film containing only B (boron) as long as it is a semiconductor film containing P-type impurities It may be.

When performing a heat treatment for activating the doped impurity, a film having a low impurity diffusion rate (for example, a SiO ₂ film or a nitride film) is formed on the semiconductor film containing the impurity doped with the activating impurity. If the heat treatment is performed in a state where the film is formed, the film diffuses the impurity from the semiconductor film containing the impurity into the air, thereby fluctuating the resistance value. Can be prevented.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIGS.

First, as shown in FIG. 1, a known LOCOS method (selective acid method) is formed on a P-type silicon substrate 11, for example.
Thus, a SiO ₂ (silicon oxide) film 12 is formed. Further, on this SiO ₂ film 12, for example, SiH
SiO + by a CVD method using a mixed gas of ₄ + O _2
Two films 13 are formed. And 6 using SiH ₄ gas.
A polycrystalline silicon film is deposited by a known CVD method at about 00 ° C., and for example, 2 ×
At a dose of about 10 ¹⁴ , BF ₂ is ion-implanted to form a P-type silicon film 14.

Next, as shown in FIG. 2A, a thin width L ₁ ′ of a dog-bone type resistor 20 to be formed later is formed on the silicon film 14 by using a known photolithography technique. A substantially rectangular photoresist 15 having a length L ′ and a width W ′ is formed so as to cover the first resistance portion 21. The length L ′ of the photoresist 15 is B ′ in FIG.
As shown in FIG.
A predetermined value K (in this embodiment, K = 1.
0 μm). In the present embodiment, the maximum value of the relative misalignment with the pattern when the resistor 20 is patterned in a later step is about 0.5 due to the characteristics of the patterning apparatus used in the present embodiment. 4 .mu.m, and the length c 'of the diffusion region 14c formed by heat treatment in a further step is about 0.3.
It is about 4 μm. That is, the length K of the photoresist 15 of the present embodiment is equal to the length L of the first resistance portion 21 of the resistor 20.
₁ ′, the maximum misalignment value b ′ and the diffusion region 14 c
Is larger than the sum of the lengths c ′. Also, the width W of the photoresist 15 is larger than the maximum value (0.4 μm) of the relative misalignment with the pattern when patterning the resistor 20 than the width W ₂ where the second resistance portion 22 is formed. Width.

Then, with the photoresist 15 formed, BF ₂ is applied at a dose of about 2 × 10 ¹⁵ .
Ions are implanted. That is, the photoresist 15 functions as a shielding film. Therefore, in the silicon film 14,
The portion covered with the photoresist 15 has a low concentration of the ion-implanted impurity, and becomes a low concentration region 14a.
Further, the exposed portion becomes the high concentration region 14b because the concentration of the ion-implanted impurity is high. Thereafter, the photoresist 15 is removed by, for example, known ashing.

Next, a photoresist 16 having the shape of the resistor 20 is formed on the silicon film 14 by using a known photolithography technique. And, for example, CH
The silicon film 14 is patterned by well-known RIE (reactive ion etching) using F ₃ or a chlorine-based gas to form the resistor 20 having a predetermined shape as shown in FIG. That is, the first resistance portion 21 having the predetermined width W ₁ ′ and the predetermined length L ₁ ′, and the first resistance portion 2
1 and is formed in a dogbone shape having a second resistor 22 having a width W ₂ ′ larger than the width W ₁ ′. That is, the first resistance portion 21 composed of the low concentration region 14a, the low concentration region 14a and the high concentration region 14a.
b and the second resistor portion 22 composed of
Is patterned.

Next, as shown in FIG.
_An SiO ₂ film 17 is formed on the entire surface by CVD or the like using a mixed gas of ₄ + O ₂ . In this state,
High-temperature annealing at 800 to 1000 ° C., for example, annealing at 900 ° C. for about 30 minutes is performed. Thereby, the impurity doped in the silicon film 14 is activated. At this time, at the interface between the low-concentration region 14a and the high-concentration region 14b, the high-concentration region 1
The impurity is diffused from 4b to low concentration region 14a to form diffusion region 14c having a different impurity concentration from low concentration region 14a and high concentration region 14b. This diffusion area 1
The length of 4c is determined by the concentration difference between the low-concentration region 14a and the high-concentration region 14b and the annealing heat treatment. In this embodiment, the length of 4c is about 0.4 μm. That is, in this step, the second resistance portion 22 of the resistor 20 is
a, a high-concentration region 14b, and a diffusion region 14c formed between the high-concentration regions 14b.

Next, the contact holes 17a, 17a are formed in the SiO ₂ film 17 by using a known photolithography technique.
b is provided. Then, for example, by sputtering Al
After an (aluminum) film is formed on the entire surface and a patterned photoresist is formed by using a known photolithography technique, the Al film is formed into a predetermined shape by RIE to form wiring layers 18a and 18b. The electrode portions e and e 'are formed in the low concentration region 14a of the silicon film 14.

In the present embodiment, when manufacturing the resistor 20 having regions with different impurity concentrations, the high impurity concentration region 1 is used.
In forming the 4b and the low concentration region 14a, but forming a photoresist 15 covering the portion to be a low concentration region, the photoresist 15, a has a width W ₂ larger than the width of the second resistance portion 22 The second resistance portion 22 has a portion formed over the second resistance portion 22.
The length K from the resistor portion 21 is determined by the length of the maximum value of the amount of misalignment between the pattern of the photoresist 15 and the pattern of the photoresist 16 formed for patterning the outer shape of the resistor 20, High concentration area 1
4b, which is longer than the sum of the length c ′ of the diffusion region 14c formed to diffuse impurities from the low concentration region 14a,
Further, it is not formed on the other second resistance portion 14b. Therefore, even if misalignment occurs between the pattern of the photoresist 15 and the pattern 16 of the silicon film 14, a desired resistance value can always be obtained. Furthermore, in order to reliably obtain a desired resistance value, it is not necessary to form a portion having a long impurity shape, that is, a portion having a high impurity concentration, that is, a portion having a low sheet resistance, in the first resistor portion. Therefore, even if an attempt is made to obtain a higher resistance value, it is not necessary to increase the area of the resistance. That is, since the area used for the resistor can be reduced, the semiconductor integrated circuit on which the resistor is mounted can be miniaturized. In this embodiment, when performing the annealing, the silicon film 1
4 is covered in a state of being covered with the SiO ₂ film, the impurities doped in the silicon film 14 do not escape to the atmosphere, and a predetermined resistance value cannot be obtained.
Impurities that escape to the atmosphere do not contaminate other parts.

Next, a second embodiment of the present invention will be described with reference to FIGS. 1, 6 and 7. However, the first
The same parts as those of the embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

Also in this embodiment, as shown in FIG. 1, two SiO ₂ films 12 and 13 are formed on a P-type silicon substrate 11, and a polycrystalline silicon film is deposited thereon, For example, BF ₂ is ion-implanted into the silicon film at a dose of about 2 × 10 ¹⁴ to form a P-type silicon film 14.
And Next, as shown in FIG. 6, the photoresist 16 is patterned by a known photolithography technique, and the silicon film 14 is formed into a predetermined shape by using a known RIE method as in the first embodiment. 20 is patterned. That is, as shown in FIG. 6B, the first resistance portion 21 having a predetermined width W ₁ ′ and a predetermined length L ₁ ′
And the width W ₁ ′ of the first resistor 21 connected to both ends thereof.
And a second resistor portion 22 having a larger width W ′. Then, the photoresist 16 is removed by, for example, ashing.

Next, as shown in FIG. 7A, a first resistor portion 21 having a narrow width L ₁ ′ of the resistor 20 is covered on the silicon film 14 by using a known photolithography technique. A photoresist 15 ′ formed over the second resistance portion 22 is formed. This photoresist 15 'is formed as shown in FIG.
2B, the second resistance portion 22 has a shape having an opening 15b 'in a part thereof. That is, the photoresist 15 ′ has the first resistance portion 2 having the length L ₁ ′.
From the end of 1, a predetermined length K (K = about 0.4 μm) longer,
Portion 1 having a width larger than width W ₂ ′ of second resistance portion 22
5a '. In this embodiment, the photoresist 16 formed in the step of patterning the resistor 20 is used.
, The maximum value of the amount of misalignment of the photoresist 15 ′ is about 0.4 μm, as in the first embodiment, and the length of the diffusion region 14 c formed by heat treatment in a later step. c ′ is about 0.4 μm as in the first embodiment.

Then, with the photoresist 15 'formed, BF ₂ is ion-implanted at a dose of about 2 × 10 ¹⁵ . That is, the photoresist 15 '
Acts as a shielding film.
In this step, impurities are not ion-implanted in the portion 14a covered with 5 ′, and the portion 14a becomes a low-concentration region where the impurity concentration is low. Also, the opening 15b 'of the photoresist 15'
In this step, since impurities are ion-implanted in this step, a high-concentration region having a high impurity concentration is formed. That is, the exposed portion of the second resistance portion 22 becomes the high concentration region 14b. Thereafter, the photoresist 15 'is removed by, for example, known ashing.

Thereafter, the steps shown in FIGS. 4 and 5 are performed in the same manner as in the first embodiment. That is, as shown in FIG. 4, an SiO ₂ film 17 is formed on the entire surface, and activation of impurities implanted in the silicon film 14 is performed.
For example, high-temperature annealing is performed at 900 ° C. for about 30 minutes. Thus, the impurity is diffused between the high-concentration region 14b and the low-concentration region 14a due to the impurity concentration difference, and the diffusion region 14c is formed as in the above-described embodiment. Next, contact holes 17a and 17b are provided in the SiO ₂ film 17 using a known photolithography technique. Thereafter, an Al (aluminum) film is formed on the entire surface by, for example, sputtering, and a photoresist patterned by using a known photolithography technique is formed thereon, and RIE is performed.
The Al film is formed into a predetermined shape by the
8b are formed, and electrode portions e and e ′ are formed in the low concentration region 14a of the silicon film 14.

In this embodiment, the same effects as in the first embodiment can be obtained.

Although the embodiments of the present invention have been described above, the present invention is, of course, not limited thereto, and various modifications can be made based on the technical concept of the present invention.

For example, in the first embodiment, the photoresist 15 serving as a shielding film is patterned using the remaining pattern, and after patterning the shielding film, an impurity is doped, and then the resistance is formed. In the manufacturing method performed in such an order, the shielding film may be patterned by using the cut pattern as in the second embodiment. Further, in the second embodiment, after patterning the shape of the resistor, a photoresist 15 ′ serving as a shielding film is patterned by using a blank pattern.
After patterning 5 ', it was doped with impurities,
In the manufacturing method performed in such an order, the photoresist 15 ′ may be patterned using the remaining pattern. That is, the length of the portion formed over the second resistance portion of the shielding film from the first resistance portion in the second resistance portion is equal to the maximum amount of relative misalignment between the first pattern and the second pattern. The length of the second resistance portion, which is longer than the sum of the length of the value and the length of the diffusion region formed by diffusion of the impurity from the high concentration region to the low concentration region during the heat treatment, is not covered by this portion. Any pattern may be used as long as the condition that the shielding film is not formed is satisfied.

In the first and second embodiments, a photoresist is used as a shielding film formed on the semiconductor film 14 containing impurities so as to prevent the impurity to be doped from reaching the semiconductor film 14. However, other films are used. However, for example, instead of this photoresist, an SiO ₂ film may be used, and this film may act as a shielding film.

Further, in the above embodiment, when activating the impurities, the heat treatment was performed with the SiO ₂ film 17 formed on the silicon film 14 so that the doped impurities did not escape to the atmosphere. The same effect can be obtained by performing a heat treatment in a state where another film having a slow impurity, such as a nitride film, is formed on the silicon film 14.

In the above embodiment, a P-type silicon film containing B (boron) is used as the semiconductor film containing impurities. However, another film may be used. For example, P-type or N-type impurities are contained. However, an amorphous silicon film may be used.

[0041]

As described above, according to the method of manufacturing a resistor of the present invention, a desired resistance value can always be obtained.
Further, even if the area of the resistor is the same as that of the prior art, a higher resistance value can be obtained, so that the resistance can be miniaturized and downsized. Reduction can be performed.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing an incomplete resistor in a first manufacturing process in a first embodiment and a second embodiment of the present invention.

FIG. 2 is a view showing an incomplete resistor in a second manufacturing process in the first embodiment of the present invention, wherein A is a cross-sectional view, and B is a cross-sectional view of A taken along the line [B]-[B]. ing.

3A and 3B are diagrams showing an incomplete resistor in a third manufacturing process in the first embodiment of the present invention, wherein A is a cross-sectional view, and B is a plan view of A in the [B]-[B] line direction. ing.

FIG. 4 is a view showing an incomplete resistor in a fourth manufacturing process in the first embodiment and the second embodiment of the present invention, where A is a cross-sectional view and B is the [B]-[B] line direction in A. FIG.

FIG. 5 is a view showing an incomplete resistor in a fifth manufacturing process in the first embodiment and the second embodiment of the present invention, where A is a cross-sectional view and B is the [B]-[B] line direction in A. FIG.

FIG. 6 is a view showing an incomplete resistor in a second manufacturing process in the second embodiment of the present invention, wherein A is a cross-sectional view, and B is a plan view in the [B]-[B] line direction of A. ing.

FIG. 7 is a view showing an uncompleted resistance in a third manufacturing direction in the second embodiment of the present invention, wherein A is a cross-sectional view, and B is a cross-sectional view of A in the [B]-[B] direction. I have.

FIG. 8 is a diagram showing a planar shape of a resistor in the case where there is no misalignment according to the present invention. FIG. 8A shows a state in which a shielding film is formed in a predetermined second pattern when doping impurities, and FIG. Shows a state after the heat treatment in which the diffusion region is formed.

FIG. 9 is a diagram showing a planar shape of a resistor when misalignment occurs in the present invention, wherein A shows a state in which a shielding film is formed in a predetermined second pattern when doping impurities; B shows a state after the heat treatment in which the diffusion region is formed.

FIG. 10 is a partial cross-sectional view of a conventional semiconductor integrated circuit on which a resistor is formed.

FIG. 11 is a plan view of a resistor in a conventional example.

FIG. 12 is a plan view of a conventional dog-bone type resistor.

FIG. 13 is a plan view of a conventional dog-bone type resistor when no misalignment occurs, in which A shows a state in which a shielding film is formed, and B shows a state after heat treatment in which a diffusion region is formed. I have.

14A and 14B are plan views when a misalignment occurs in a dog-bone type resistor in a conventional example, where A shows a state in which a shielding film is formed, and B shows a state after heat treatment in which a diffusion region is formed. ing.

[Explanation of symbols]

11 ... P-type silicon substrate, 14 ... Silicon film, 14
a... low density area, 14b... high density area, 14c.
Diffusion region, 15, 15 ', 16 ... photoresist, 1
7: SiO ₂ film, 20: resistance, 21: first resistance portion, 22: second resistance film, b: maximum value of relative misalignment between the first and second patterns, c, c '...
... Length of diffusion region, e, e '... Electrode part, L', L "...
... photoresist length, L _1, L 1 _'...... length of the first resistor section, L _2, L _2' ...... length of the second resistance portion, the second resistive portion of the K ...... photoresist Length from the first resistance portion, W: width of shielding film, W ': width of photoresist,
W ₁ , W ₁ ′: width of the first resistance portion, W ₂ , W ₂ ′: width of the second resistance portion.

Claims (8)

[Claims] A first resistor having a predetermined width and length, connected to both ends of the first resistor, and having a width larger than the predetermined width; A method for manufacturing a resistor having a shape having a second resistance portion having an electrode portion formed thereon, and having a high-concentration region and a low-concentration region of an impurity, wherein at least a semiconductor film containing the impurity is formed. Performing the step of: patterning the semiconductor film containing the impurity into a first pattern having the first resistance portion and the second resistance portion; and doping the semiconductor film containing the impurity from above the semiconductor film. Forming a shielding film covering the impurity film to prevent the impurities from reaching the semiconductor film containing the impurity in a predetermined second pattern; and forming the shielding film in the second pattern. Including the impurities A step of doping the impurity in a state of being formed in contact with the semiconductor film, and a step of performing a heat treatment for activating the doped impurity; In the step, the shielding film has a width larger than the width of the second resistance portion, and has a portion that covers the first resistance portion and is formed over the second resistance portion. The length of the resistance portion from the first resistance portion is the length of the maximum value of the amount of relative misalignment between the first pattern and the second pattern, and the length of the impurity is increased from the high concentration region of the impurity during the heat treatment. On the second resistance portion, which is longer than the sum of the length of the diffusion region formed by the diffusion of the impurity into the region and is not covered by this portion,
A method for manufacturing a resistor, wherein the shielding film is not formed. 2. The method according to claim 1, wherein the width of the portion of the shielding film which covers the first resistance portion and is formed over the second resistance portion is smaller than the width of the second resistance portion. 2. The method for manufacturing a resistor according to claim 1, wherein the width of the amount of misalignment with the two patterns is larger than the width. 3. The device according to claim 1, wherein the distance between the electrode portions of the second resistance portion is such that the electrode portion is always formed in the low resistance region. The method of manufacturing the resistor. 4. The method according to claim 1, wherein the semiconductor film containing the impurity is formed by doping the impurity after forming the semiconductor film. 5. The method according to claim 1, wherein the semiconductor film is formed in the predetermined pattern before the step of forming the shielding film. 6. The method according to claim 1, wherein the semiconductor film is formed in a predetermined pattern after the step of doping the impurity with the shielding film formed. 7. A step of performing a heat treatment for activating the doped impurity, wherein a film having a low diffusion rate of the impurity is formed on the semiconductor film including the impurity doped with the impurity to be activated. The method according to claim 1, wherein the heat treatment is performed in a state where the resistor is formed. 8. The method according to claim 1, wherein the semiconductor film is made of polycrystalline silicon or amorphous silicon.