JP3415360B2 - Method for manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device including a first transistor and a second transistor stacked on the first transistor.

[0002]

2. Description of the Related Art FIG. 2 shows a conventional example of a method of manufacturing a semiconductor device including a bulk transistor and a thin film transistor stacked thereon. In this one conventional example,
As shown in FIG. 2A, a SiO ₂ film 12 as a gate oxide film and a polycrystalline Si film 1 containing impurities are formed on a Si substrate 11.
3. A tungsten silicide film 14 and a SiO ₂ film 15 as a gate oxide film are sequentially formed.

Then, a resist (not shown) is processed on the SiO ₂ film 15 so as to have a pattern of the gate electrode, and the SiO ₂ film 15, the tungsten silicide film 14 and the polycrystalline Si film 13 are processed using the resist as a mask. Is anisotropically etched to form a gate electrode 1 having a polycide structure including a polycrystalline Si film 13 and a tungsten silicide film 14.
6 is formed.

After that, the SiO ₂ film 17 containing no impurities
Was deposited on the entire surface, anisotropic etching is performed with respect to the SiO ₂ film 17, as shown in FIG. 2 (b), SiO ₂
The sidewall insulating film formed of the film 17 is used as the gate electrode 16 and the SiO 2.
₂ Formed on the film 15. Then, impurities are ion-implanted into the Si substrate 11 using the SiO ₂ film 17 and the gate electrode 16 as a mask to form source / drain regions 21 which are impurity diffusion layers, as shown in FIG. 2C. hand,
The bulk transistor 22 is manufactured.

After that, a polycrystal Si film 23 is deposited, a resist (not shown) is processed on the polycrystal Si film 23 in a pattern of an active layer of a thin film transistor, and the polycrystal Si film 23 is used as a mask. Is anisotropically etched. Then, the resist 24 is processed into a pattern corresponding to the SiO ₂ film 15 on the polycrystalline Si film 23, and the resist 24 is used as a mask to form the source / drain regions.
Same conductivity type but higher impurity concentration than source / drain regions
Impurities for forming the offset region 25 of low degree are ion-implanted into the polycrystalline Si film 23.

After that, the resist 24 is removed and heat treatment is performed to diffuse the impurities from the source / drain regions 21 into the polycrystalline Si film 23 in contact with the Si substrate 11, thereby forming the source / drain in the polycrystalline Si film 23. Area 26
To form. As a result, a thin film transistor 28 having a channel region 27 of the polycrystalline Si film 23 covered with the resist 24 is manufactured.

If the impurity concentration in the source / drain regions 26 is insufficient only by diffusing the impurities from the source / drain regions 21, the offset region 25 and the portion of the polycrystalline Si film 23 to be the channel region 27 are covered. In some cases, a patterned resist (not shown) is formed and impurities are ion-implanted into the polycrystalline Si film 23 using the resist as a mask.

[0008]

However, in the conventional example shown in FIG. 2, the resist 2 in the polycrystalline Si film 23 is used.
4 is used as a channel region 27 of the thin film transistor 28, and a portion between the channel region 27 and the source / drain region 26 is offset region 25.
Therefore, the channel region 27 and the offset region 25 of the thin film transistor 28 are displaced with respect to the gate electrode 16 of the bulk transistor 22 due to misalignment when the resist 24 is patterned.

When such displacement occurs, the characteristics of the thin film transistor 28 fluctuate from desired values, and the influence of this displacement increases as the semiconductor device is miniaturized.
Moreover, the resist 24 is patterned to form the resist 2
When the ion implantation is performed by using 4 as a mask, the number of steps increases by that amount. Therefore, in the conventional example shown in FIG.
It was difficult to manufacture a fine thin film transistor 28 with a small number of steps.

On the other hand, instead of the SiO ₂ film 17, a PSG film or a BPSG which is an SiO ₂ film containing impurities.
A side wall insulating film of the gate electrode 16 is formed of a film or the like, and impurities are diffused from the PSG film, the BPSG film, or the like into the polycrystalline Si film 23 to form the offset region 25, thereby forming the channel region 27 and the offset region 25. A method of forming the gate electrode in a self-aligned manner with the gate electrode 16 is considered.

However, in this method, impurities are diffused not only from the polycrystalline Si film 23 but also from the gate electrode 16 and the Si substrate 11 from the side wall insulating film such as the PSG film and the BPSG film. The characteristics of the bulk transistor 22 also varied from the desired values.

[0012]

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: a source / drain region formed in a semiconductor substrate; and a gate formed on the semiconductor substrate and provided with a sidewall insulating film. A first transistor having an electrode, and a second transistor having a source / drain region formed in a semiconductor film laminated on the first transistor via a gate insulating film on the gate electrode the method of manufacturing a semiconductor device including the first insulating film containing no impurities gate electrode and the semi
Before the step of covering the conductor substrate and the second insulating film containing impurities
The step of laminating on the first insulating film, the second and the second
By anisotropic etching for the first insulating film,
Forming a sidewall insulating film made of a first insulating film and a second insulating film; and forming the semiconductor film straddling the gate insulating film and the sidewall insulating film and in contact with the source / drain regions of the first transistor. And a step of diffusing impurities from the source / drain regions of the first transistor into the semiconductor film to form the source / drain regions of the second transistor, and from the second insulating film to the semiconductor film. The impurities are diffused into the second
And a step of forming an offset region of the transistor.

According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein the diffusion of impurities from the source / drain regions of the first transistor into the semiconductor film and the diffusion of impurities from the second insulating film into the semiconductor film. It is characterized in that the diffusion is performed by heat treatment.

In the method of manufacturing a semiconductor device according to the present invention,
Impurities are diffused from the source / drain region of the first transistor to the semiconductor film to form the source / drain of the second transistor.
While forming the drain region, impurities are diffused from the second insulating film forming the sidewall insulating film of the gate electrode of the first transistor into the semiconductor film to form the offset region of the second transistor.

On the other hand, since the gate insulating film of the second transistor is provided between the semiconductor film and the gate electrode, not only the side wall insulating film but also the gate electrode is provided on the portion of the semiconductor film above the gate electrode. Impurities do not diffuse from here, and this portion becomes the channel region of the second transistor.

Therefore, it is not necessary to form a mask layer for separately forming the channel region and the offset region of the second transistor and to introduce impurities using this mask layer. In addition, the source / drain region, the channel region, and the offset region of the second transistor may be the first
Can be formed in a self-aligned manner with respect to the transistor.

A second insulating film containing impurities is laminated on the first insulating film containing no impurities, and the sidewall insulating film of the gate electrode is formed by these first and second insulating films. Therefore, diffusion of impurities from the sidewall insulating film to the gate electrode and the semiconductor substrate can be prevented by the first insulating film.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention applied to the manufacture of a semiconductor device including a bulk transistor and a thin film transistor stacked thereon will be described below with reference to FIG. In this embodiment, as shown in FIG. 1A, SiO ₂ as a gate oxide film is formed on the Si substrate 31.
A film 32, a polycrystalline Si film 33 containing impurities, a tungsten silicide film 34, and a SiO ₂ film 35 as a gate oxide film are sequentially formed.

Then, a resist (not shown) is processed on the SiO ₂ film 35 in the pattern of the gate electrode, and the resist is used as a mask for the SiO ₂ film 35, the tungsten silicide film 34 and the polycrystalline Si film 33. Anisotropic etching is performed to form a gate electrode 3 having a polycide structure including a polycrystalline Si film 33 and a tungsten silicide film 34.
6 is formed.

Then, the SiO ₂ film 37 containing no impurities is formed.
And a SiO ₂ film 38 containing impurities, for example, a BPSG film, are sequentially deposited on the entire surface, and these SiO ₂ films 38 and 37 are deposited.
Then, anisotropic etching is performed on the gate electrode 36 and the SiO ₂ film 35 to form a sidewall insulating film composed of the SiO ₂ films 37 and 38, as shown in FIG.

Next, impurities are ion-implanted into the Si substrate 31 by using the SiO ₂ films 37, 38 and the gate electrode 36 as a mask, as shown in FIG. A drain region 41 is formed and a bulk transistor 42 is manufactured.

After that, a polycrystalline Si film 43 is deposited, a resist (not shown) is processed on the polycrystalline Si film 43 in a pattern of an active layer of a thin film transistor, and the polycrystalline Si film 43 is used as a mask. Is anisotropically etched.

Then, an appropriate heat treatment is performed to make the Si substrate 3
Impurities are diffused from the source / drain regions 41 to the polycrystalline Si film 43 which is in contact with 1 to form the source / drain regions 46 in the polycrystalline Si film 43, and at the same time from the SiO ₂ film 38 to the polycrystalline Si film 43. The offset region 45 is formed by diffusing impurities. As a result, the polycrystalline Si film 43
Among them, a thin film transistor 48 having a portion on the SiO ₂ film 35 as a channel region 47 is manufactured.

In the above embodiment, the bulk transistor 42 and the thin film transistor 4 laminated thereon are arranged.
The present invention is applied to the manufacture of a semiconductor device including a semiconductor substrate including a semiconductor substrate formed on an insulating substrate or the like.
1 instead of 1, and a thin film transistor formed on this semiconductor film and a thin film transistor 4 stacked thereon.
The present invention can be applied to the manufacture of a semiconductor device or the like including

[0025]

In the method for manufacturing a semiconductor device according to the present invention, the mask layer for forming the channel region and the offset region of the second transistor stacked on the first transistor is formed, and this mask layer is used. There is no need to introduce impurities. Moreover, any of the source / drain region, the channel region, and the offset region of the second transistor can be formed in a self-aligned manner with respect to the first transistor.

Further, diffusion of impurities from the side wall insulating film to the gate electrode and the semiconductor substrate can be prevented. Therefore, it is possible to manufacture a fine second transistor with a small number of steps while preventing characteristic variations of the first and second transistors.

[Brief description of drawings]

FIG. 1 is a side sectional view showing an embodiment of the present invention in process order.

FIG. 2 is a side sectional view showing a conventional example of the present invention in the order of steps.

[Explanation of symbols]

31 Si Substrate 35 SiO ₂ Film 36 Gate Electrode 37 SiO ₂ Film 38 SiO ₂ Film 41 Source / Drain Region 42 Bulk Transistor 43 Polycrystalline Si Film 45 Offset Region 46 Source / Drain Region 48 Thin Film Transistor

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Claims (2)

(57) [Claims] 1. A first transistor having source / drain regions formed on a semiconductor substrate and a gate electrode formed on the semiconductor substrate and provided with a sidewall insulating film; and a first transistor on the gate electrode. A method of manufacturing a semiconductor device, comprising: a second transistor having a source / drain region formed in a semiconductor film laminated on the first transistor via a gate insulating film; Insulating film of the gate electrode and before
And as factories to cover the serial semiconductor substrate, laminating a second insulating film containing an impurity on the first insulating film
And the anisotropic etching for the second and first insulating films.
Therefore, the step of forming the sidewall insulating film formed of these first and second insulating films, and the semiconductor film that straddles the gate insulating film and the sidewall insulating film and is in contact with the source / drain region of the first transistor And diffusing impurities from the source / drain regions of the first transistor into the semiconductor film to form the source / drain regions of the second transistor,
A step of diffusing impurities from the second insulating film into the semiconductor film to form an offset region of the second transistor. 2. The source / source of the first transistor
2. The method for manufacturing a semiconductor device according to claim 1, wherein the diffusion of impurities from the drain region to the semiconductor film and the diffusion of impurities from the second insulating film to the semiconductor film are performed by heat treatment.