JPH11121613A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a self-alignment wiring, by providing a conductive film buried in a contact hole provided in a first insulation film; a third insulation film provided on an underlayer wiring provided so as to come into contact with a side face of a second insulation film provided on a side face of an upper part from a middle vicinity of the conductive film; and an upper layer wiring provided so as to come into contact with an upper face of the third insulation film and the conductive film. SOLUTION: An oxide film 2 is provided as an interlayer insulation film (a first insulation film) on a semiconductor substrate 1, a contact hole 3 is formed by dry etching to bury a polycrystal silicon 4, and a contact plug is formed by etching-back to form a plug of the polycrystal silicon 4, so that a nitride film (a second insulation film) 5 is provided. Thereafter, a tungsten film (a second conductive film) 6 is provided. Next, a surface of the tungsten film 6 is ground and an underlayer wiring 7 is formed by etching-back, and a BSG film 8 is provided as an interlayer insulation film (a third insulation film) and flatted. Thereafter, a part of the BSG film 8 and the nitride film 5 is removed, and a part of the contact plug by the polycrystal silicon 4 is exposed to form an upper layer wiring 9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, for example, a technique disclosed in Japanese Patent Application Laid-Open No. 02-285658 has been proposed in order to prevent a short circuit between a wiring and a contact plug due to a severe formation margin due to miniaturization of a semiconductor. A conventional example will be described with reference to FIG. FIG. 4 is a cross-sectional view for explaining the manufacturing method of the first conventional example.

First, as shown in FIG. 4A, an oxide film 21 is formed on a semiconductor substrate 1 as an interlayer insulating film. Next, a wiring conductive film is deposited and etched into a predetermined shape to form a lower wiring 22 made of the conductive film. Next, as shown in FIG. 4B, an oxide film 24 is formed as an interlayer insulating film, and the oxide films 24 and 21 are etched by photolithography to form a contact hole 23.

[0006] Next, as shown in FIG. 4 C, an oxide film or a nitride film is deposited and etched back to form a sidewall film 25. Next, as shown in FIG. 4D, polycrystalline silicon 26 is buried in the contact hole 23, etched back to form a contact plug of polycrystalline silicon 26, and then an upper wiring 27 is formed.

Next, a second conventional example will be described with reference to FIG. First, as shown in FIG. 5A, an oxide film 21 is formed on a semiconductor substrate 1 as an interlayer insulating film. Next, a conductive film for wiring and a nitride film 28 are deposited and etched into a predetermined shape to form a lower wiring 22 made of a conductive film. Next, FIG.
As shown in (b), a nitride film is deposited and etched back to form a sidewall film 29 made of a nitride film.

Next, as shown in FIG. 5C, an oxide film 30 is formed as an interlayer insulating film, and an oxide film having a high selectivity with respect to a nitride film is formed by photolithography using, for example, CHF ₃ and CO gas as etching conditions. Oxide films 30 and 2
1 is etched to form a contact hole 23. Next, as shown in FIG. 5D, polycrystalline silicon 26 is buried in the contact hole 23, etched back to form a contact plug of polycrystalline silicon 26, and then an upper wiring 27 is formed.

[0007]

A problem of the first conventional example is that the diameter of the contact plug becomes small. The reason is that the sidewall film is formed in the contact hole after the formation of the contact hole.

The problem of the second conventional example is that the wiring capacitance increases. The reason is that a nitride film is formed so as to surround the wiring.

An object of the present invention is to provide a semiconductor device which does not cause a short circuit with a wiring without reducing the diameter of a contact plug and does not increase a wiring capacity, and a method of manufacturing the same.

[0010]

According to a first aspect of the present invention, there is provided a semiconductor device comprising: a first insulating film formed on a conductive substrate;
A contact hole provided in the insulating film, a conductive film buried in the contact hole, a second insulating film formed on the upper side surface from near the center of the conductive film, and a second insulating film formed on the second insulating film. Including a lower wiring provided in contact with the side surface, a third insulating film formed on the lower wiring, and an upper wiring formed in contact with at least the conductive film and an upper surface of the third insulating film It is characterized by the following.

According to a second aspect of the invention, there is provided a method of manufacturing a semiconductor device, wherein a contact hole is formed in a thick first insulating film formed on a semiconductor substrate, and a first conductive film is embedded in the contact hole. After that, the first insulating film is etched back to expose an upper portion of the first conductive film, and a thin second insulating film and a thick second conductive film are formed on the entire surface including the exposed surface of the first conductive film. A step of flattening the surface after formation, a step of etching back the flattened second conductive film to a predetermined thickness, and then patterning to form a lower wiring, and a step of forming a lower wiring on the entire surface including the lower wiring. Forming an insulating film of No. 3 and flattening it, and then etching the third insulating film and the second insulating film to expose an upper surface of the first conductive film. .

The first insulating film is a silicon oxide film or a silicon nitride film sandwiched between silicon oxide films.
This is a method for manufacturing a semiconductor device having a layered structure.

[0013] Further, there is provided a method of manufacturing a semiconductor device in which the second insulating film is a silicon nitride film or a silicon oxide film.

After the second insulating film is formed, the second insulating film is etched back, a sidewall made of the second insulating film is formed on the exposed side wall of the first conductive film, and then a thick second conductive film is formed. 6 shows a method for manufacturing a semiconductor device.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIGS. 1A to 1D are cross-sectional views of a semiconductor chip for explaining a first embodiment of the present invention.

First, as shown in FIG. 1A, an oxide film 2 having a thickness of 500 to 700 nm is formed as an interlayer insulating film on a semiconductor substrate 1, and the oxide film 2 is formed by using a photolithography technique.
Is dry-etched to form a contact hole 3 having a diameter of 0.2 to 0.4 μm. Thereafter, polycrystalline silicon is buried in the contact hole 3 by a CVD method, and etch back is performed to form a contact plug of polycrystalline silicon.

Next, as shown in FIG. 1B, the oxide film 2 is etched by about 400 μm to expose a plug made of polycrystalline silicon 4. After that, after a nitride film is formed to a thickness of about 100 nm by a CVD method, a 600 nm-thick tungsten film is formed as a conductive film for wiring. Next, CMP
(Chemical Mechanical Polis
(Hing) method so that the surface of the tungsten film 6 is polished so as to be flat.

Next, as shown in FIG. 1C, the tungsten film is formed to a thickness of 100 to 200 nm by RIE using dry etching conditions (for example, conditions using Cl ₂ ) having a selectivity with respect to the nitride film. Etch back until.
Thereafter, a tungsten wiring 7 is formed by patterning into a predetermined wiring shape using a photoresist and dry etching.

Next, as shown in FIG. 1D, a BPSG film 8 having a thickness of 500 nm is formed as an interlayer insulating film by a CVD method and flattened.
Etchback is performed by dry etching using ₃ or CF ₄ gas to remove a part of the BPSG film 8 and the nitride film 5 and to expose a part of the contact plug made of the polycrystalline silicon 4. After that, the upper wiring 9 made of an aluminum alloy or the like is formed.

FIG. 2 is a plan view showing the vicinity of the plug according to the first embodiment described with reference to FIG. A contact plug of polycrystalline silicon 4 is formed between tungsten wirings 7. The tungsten wiring 7 is insulated by the nitride film 5 formed around the contact plug.

According to the first embodiment configured as described above, the diameter of the contact plug can be reduced without reducing the diameter.
In addition, since no nitride film is formed on the wiring surface, the wiring capacity does not increase.

FIGS. 3A to 3D are cross-sectional views of a semiconductor chip for explaining a second embodiment of the present invention. First, as shown in FIG. 3A, an oxide film 2A having a thickness of 300 nm and a thickness of 100 nm are formed on a semiconductor substrate 1 as an interlayer insulating film.
Nitride film 10 and oxide film 2B having a thickness of 300 nm are formed,
Using the photoresist film as a mask, the oxide film 2B and the nitride film 10
Then, the contact hole 3 is formed by dry-etching the oxide film 2A. Thereafter, polycrystalline silicon is buried in the contact hole 3 and etched back to form a contact plug of polycrystalline silicon 4.

Next, as shown in FIG. 3B, the oxide film 2B
Is etched until the nitride film 10 is exposed to expose the plug of the polycrystalline silicon 4. Then, nitride film 5
Is formed to a thickness of 100 nm.

Next, as shown in FIG. 3C, the nitride film 5 is etched back to form sidewalls 12 made of nitride films 5 and 10 only on the side walls of the polycrystalline silicon 4.
Next, for example, a tungsten film 6 having a thickness of 600 nm is formed as a conductive film for wiring on the entire surface. Next, CMP (Chemi
The surface of the tungsten film 6 is polished using cal mechanical polishing (cal mechanical polishing). Further, the tungsten film 6 is formed to have a thickness of 100 to 20 under dry etching conditions (for example, conditions using Cl ₂ and O ₂ ) having a selectivity for both the nitride film and the polycrystalline silicon film.
Etch back to 0 nm.

Next, as shown in FIG. 3D, a tungsten wiring 7 is formed by patterning into a predetermined wiring shape using a photoresist and dry etching. Next, a BPSG film 8 is formed as an interlayer insulating film to a thickness of 500 nm and flattened, and then etched back by a wet etching method or a dry etching method to remove a part of the BPSG film 8 and to form a contact plug made of polycrystalline silicon 4. Expose part of After that, the upper wiring 9 made of an aluminum alloy or the like is formed.

The second embodiment differs from the first embodiment in that, when the oxide film 2B is etched, the nitride film 1
Since 0 is used as a stopper film for etching, variation due to etching of the oxide film 2B hardly occurs. Further, since the nitride films 5 and 10 are etched back so that the nitride film does not remain on the entire surface of the wafer, there is an advantage that the transistor characteristics are hardly deteriorated.

[0027]

The first effect is that a wiring can be formed in a self-aligned manner with respect to a contact plug without increasing the wiring capacitance. The reason is that a nitride film sidewall is formed in a part of the contact plug and a nitride film covering the wiring is not formed.

The second effect is that the diameter of the contact plug is not reduced. The reason is that a contact plug is formed first in a contact hole, an upper portion thereof is exposed, and a sidewall is formed in that portion.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a semiconductor chip for explaining a first embodiment of the present invention.

FIG. 2 is a plan view near a contact plug according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view of a semiconductor chip for explaining a second embodiment of the present invention.

FIG. 4 is a sectional view of a semiconductor chip for explaining a first conventional example.

FIG. 5 is a sectional view of a semiconductor chip for explaining a second conventional example.

[Explanation of symbols]

 Reference Signs List 1 semiconductor substrate 2, 2A, 2B oxide film 3 contact hole 4 polycrystalline silicon 5 nitride film 6 tungsten film 7 tungsten wire 8 BPSG film 9 upper layer wire 10 nitride film 12 sidewall 21 oxide film 22 lower layer wire 23 contact hole 24 oxide film 25 Side wall film 26 Polycrystalline silicon 27 Upper layer wiring

Claims (5)

[Claims] 1. A first insulating film formed on a semiconductor substrate, a contact hole provided in the first insulating film, a conductive film embedded in the contact hole, and a vicinity of a center of the conductive film. A second insulating film formed on the upper side surface from
A lower wiring provided in contact with a side surface of the second insulating film, a third insulating film formed on the lower wiring, and formed at least in contact with the conductive film and the upper surface of the third insulating film; A semiconductor device comprising: 2. A step of forming a contact hole in a thick first insulating film formed on a semiconductor substrate, and etching back the first insulating film after embedding a first conductive film in the contact hole. Exposing an upper portion of the first conductive film, forming a thin second insulating film and a thick second conductive film on the entire surface including the exposed surface of the first conductive film, and flattening the surface. Etching the flattened second conductive film to a predetermined thickness and then patterning to form a lower wiring, and forming a third insulating film on the entire surface including the lower wiring to planarize the second conductive film. Etching the third insulating film and the second insulating film to expose an upper surface of the first conductive film, and a method of manufacturing the semiconductor device. 3. The method according to claim 2, wherein the first insulating film is a silicon oxide film or a film having a three-layer structure in which a silicon nitride film is interposed between the silicon oxide films. 4. The method according to claim 2, wherein the second insulating film is a silicon nitride film or a silicon oxide film. 5. After forming a second insulating film, etch back, form a sidewall made of a second insulating film on a side wall of the exposed first conductive film, and then form a thick second conductive film. A method for manufacturing a semiconductor device according to claim 2.