JPH11119990A - Chip for game machine control capable of multitask - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a system for facilitating the analysis of a program and simplifying programming by executing respective tasks stored in a ROM, while performing task control in a memory for a game machine task management program and controlling a game machine by a CPU. SOLUTION: In a CPU 30, the program areas of a memory 32 for user program execution and a memory 36 for a management program are controlled by a game machine task management program and memory management circuit 24, so as not to make the respective tasks 1a-1i mutually interfere. Then, the programs of the respective tasks 1a-1i are successively executed by one time slice each in a multiplex processed state, and the output of the respective tasks 1a-1i is outputted through the CPU 30 to respective control equipment. Thus, the respective tasks 1a-1i are processed by the system of not supplying an execution order variable by the program and a control program is prepared as a series of the programs.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a pachinko game machine,
The present invention relates to an improvement in a gaming machine control chip for controlling each device of a spinning-type gaming machine.

[0002]

2. Description of the Related Art A gaming machine having a microprocessor includes a program for detecting a winning of a first-class starting port,
Ordinary electric accessory starting opening winning detection program, lottery program such as jackpot, small hit, display program for operating the liquid crystal display unit, sound effect program for generating a sound effect corresponding to the display program,
Various programs such as a lamp display program for controlling the lamp display are stored in a read-only memory (ROM), which is stored in an 8-bit central processing unit (CP).
U) reads the control program stored in the ROM and controls the gaming machine. On the other hand, gaming machines must not have gambling properties, so for gaming machines created by gaming machine development manufacturers, this is based on the regulations of customs business, etc. The system is designed so that only gaming machines that have passed a public test by a third-party testing institution to determine whether or not they conform to the rules for certification and type approval, etc., and that have passed this test are allowed to be shipped to the amusement arcade.

[0003]

However, the programs corresponding to the CPUs which have been used up to now have the above-mentioned control programs described as a series of programs in a machine language or the like, and the influence of noise or the like. In order to prevent runaway of the program, a reset signal is applied in units of 2 msec. To prevent runaway, for example. And performs processing according to the variables. Since the way in which the ordinal variables are given varies depending on the programmer, it is too complicated and difficult for a third-party inspection organization to decipher a program having the ordinal variables, and delays in inspections at the inspection institution are caused. Was causing it. SUMMARY OF THE INVENTION The present invention has been made in consideration of the above-described drawbacks of the related art, and has as its object to provide a system that can easily analyze a program and can easily perform programming.
In addition, the present invention provides an apparatus which can easily check the contents of a program and can notify the outside via a communication task whether or not the contents of a chip and a gaming machine are legitimate.

[0004]

That is, according to the present invention, a CPU incorporated in a gaming machine control chip is constituted by a CPU capable of time slicing (for example, 32 bits), and a ROM memory area is used for each necessary control task (game game). The function of communicating the output information of each task and the program and data) of the control unit of each device of the machine, the function of communicating the output information of each task to the outside, and checking whether the gaming machine control chip and the gaming machine are genuine and communicating the result Each task is assigned to an external communication task having a function and an inspection task for inspecting the contents of the program of the gaming machine, and is controlled so that a task in each assigned area does not interfere with a task in another area. After executing the task for one processing unit, the CP is executed while sequentially executing each task so that the next task is executed and executed for one processing unit. There is a game machine control chip capable multitasking configured to control the gaming machine. The invention according to claim 2 is characterized in that the program stored in the ROM is written in a high-level language. As the high-level language, for example, it is conceivable to use a C language or the like, prepare a function unique to the gaming machine, and support a more easily understandable program.

[0005]

In the gaming machine control chip according to the present invention capable of multitasking, a program for detecting a series of tasks, that is, a winning of a first-class starting port, a program for detecting an ordinary electric accessory starting port, a jackpot / small jackpot. Lottery program such as, a display program for operating the liquid crystal display unit, a sound effect program for generating a sound effect corresponding to the display program, a lamp display program for controlling a lamp display, etc. Control programs and external communication tasks for management are incorporated in the assigned area, and the programs of each task are controlled in a configuration that does not interfere with other programs. Only needs to check the program for each task, and the program certification at the inspection organization is efficient. Ukoto can. In addition, the execution processing of each task is executed independently, and the control system is processed in such a manner that the result is transmitted to each task through the gaming machine task management program. By confirming only the contents of (1), the operation of the control system can be confirmed, and the gaming machine can be controlled by the contents of the task (program). Since the output information of each control task is stored in the external communication task via the CPU, an event occurring in the control system of the gaming machine can be known later by external communication. In addition, the external communication task performs a security check on whether or not the program of the chip is legitimate via a security check circuit,
The result can be known by external communication. Further, in the chip of the present invention, since the inspection task of the ROM is stored, an arbitrary location of the arbitrary task is specified, and the operation of the program of the inspection target task, the contents of the memory, and the like can be inspected.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the illustrated embodiments. FIG. 1 is a block diagram of a gaming machine control chip according to an embodiment of the present invention. The chip includes a central processing unit (CPU) 30 that receives and drives a clock frequency generated by a clock generation circuit 22 and the CPU.
30, a memory (RAM) 26 for user task work, and a memory (E) for executing a user program in which a user program is stored.
EPROM or flash memory) 32, gaming machine task management program memory (ROM) 3 in which a management program for a gaming machine control program (task) is stored
4. Management program memory (ROM) in which the external communication task 1j and the inspection task 1k of the management task are stored
36, gaming machine task execution management memory (RAM) 3
8. Shared memory (RAM) 40 between each task, external communication circuit 42 for communication connection with an external device, inspection circuit for inspecting whether the chip is genuine or whether the gaming machine is genuine 44 and scans the program stored in the ROM 32 to check whether the program is a legitimate one that has passed the inspection by a third-party inspection organization, and executes the user program only when it is legitimate. Circuit 28 is connected via an internal bus, and when the security circuit 28 determines that the user program is not proper,
This is a reset circuit for resetting U30.

[0007] Each memory (ROM, R
Each of the tasks stored in the AM) is a gaming machine task management program (supervisor program) as shown in FIG.
Machine task management program memory 3 in which is stored
4 and the memory management circuit 24, are limited by walls that do not seem to interfere with each other, and are time-shared by one time slice, and the output result of each task is shared by the gaming machine task management program by the task management program. It is configured to be stored in 40 and then input to another task.

In FIG. 3, reference numeral 1 denotes a read-only memory (ROM) in which a control program (task) is allocated to a predetermined area (address).
M1 is a user program execution memory (ROM) 3
2 and a management program memory (ROM) 36 having different configurations, and a user program execution memory 32 has a first type start-up which is a processing program written in a high-level language (for example, C language). Entry detection task 1
a, first-class start-up winning holding display task 1b, normal-power-start opening winning detection task 1c, normal-power-start opening winning display task 1d, normal-power handling task 1e, pachinko game main task 1f, lamp display task 1g, a display task 1h, and a sound effect task 1i, and the external communication task 1j,
The inspection task 1k incorporates a program. Each task 1a stored in both memories (ROM) 32, 36
1 to 1k are task control circuits 3 incorporated in the CPU 30.
0a (the gaming machine task execution management memory 38) is configured to execute processing in a time slice.

In this embodiment, a central processing unit (CPU) 30
Is composed of 32 bits for executing each task (program) while performing time slicing, and is connected to a ROM 1 (each of the tasks 1a to 1k is stored) by a bus. The inter-task shared memory 40 (RA
M) is allocated to a first-class start-up winning holding memory 3 and a normal electric-running-start winning-winning memory 4 and a jackpot-information memory 6. The winning a prize holding memory 4 is connected to the first-class starting opening prize detecting task 1a and the ordinary electric winning opening winning prize detecting task 1c via the CPU 30. 5 and 5 'are prize ball sensors, respectively.
a, It is connected to the normal electrical actuation start opening winning detection task 1c, and is configured to receive winning information. Reference numeral 7 denotes a winning holding display, which is connected via the CPU 30 to the first-type starting opening winning holding display task 1b. Reference numeral 8 denotes a first-class winning port, which is connected to the pachinko game main task 1f via the CPU 30. Reference numeral 9 denotes a winning combination display for a normal electric winning combination, which is connected to the normal electric winning opening winning holding display task 1d via the CPU 30. Reference numeral 10 denotes a normal electric winning winning port, and 11 denotes a normal electric winning display (7-segment), which is connected to the normal electric winning processing task 1e via the CPU 30.

Reference numeral 12 denotes a lamp display device, 13 denotes a symbol display device, 14 denotes a sound source device, and 15 denotes a communication device. Each device input side receives a lamp display task 1g, a display task 1h, and a sound effect task 1i via the CPU 30.
And the external communication task 1j, and each device 12 to
The output side of 15 is a lamp display 16, a symbol display 17,
The speaker 18 and the hall computer 19 are connected.

Reference numeral 20 denotes an inspection device for a third party to inspect the gaming machine, which is configured to be connected to an inspection task 1k via the CPU 30, and the inspection task 1k is input from the inspection device 20. Task (1a-1)
By designating an arbitrary location in j), the contents of the program of the task can be checked.

In the configuration described above, in the chip according to the present embodiment, the CPU 30 stores the ROM 1 (the memory 32 for executing the user program and the memory 3 for the management program).
The program area of 6) is controlled by the gaming machine task management program and the memory management circuit 24 so that the respective tasks do not interfere with each other. In the time sliced state, the program of each task is sequentially executed for each time slice. The execution process is performed, and the outputs of the tasks 1a to 1i are output to the respective control devices via the CPU 30. In this embodiment, as shown in FIGS. 3 and 4, the memory management circuit 24 in the chip allocates each of the tasks 1a to 1k and manages the memory so that each task does not affect other tasks. The task control circuit 30a of the CPU 30 (the ROM 34 in which the gaming machine task management program is stored) is configured to perform time slicing and parallel processing, and each task is, for example, 1a, 1
b, 1f, 1c, 1d, 1e, 1i, 1h, 1g, 1
Execution processing is performed while cycling the order of j and 1k as one cycle.

That is, the first-class starting opening winning detection task 1a
It is detected in the execution processing of whether or not the first-type start opening has been won. When the first-type start opening has been won, it is output to the first-type start opening winning holding memory 3 via the CPU 30. When prize information is input to the first-type start-up prize holding memory 3, one prize is added from the memory 3 and output to the pachinko game main task 1f. After processing for one time slice, the first-class start-up prize holding display task 1
Then, the number of winnings stored in the winning holding memory 3 is counted, and the number of holdings is displayed on the winning holding display 7 via the CPU 30. After processing for one time slice, it shifts to the pachinko game main task 1f,
In the task, after subtracting the number of winnings stored in the first-class starting opening winning holding memory 3, a lottery or a small hit or a lottery is executed within a predetermined probability range,
The opening time of the first-type winning opening 8 is controlled via the CPU 30 according to the big hit and the small hit, and is output to the lamp display task 1g, the display task 1h, the sound effect task 1i, and the external communication task 1j. After the processing for one time slice, the process proceeds to the normal electric winning opening opening prize detection task 1c, in which the input information of the ball sensor 6 is detected to determine whether or not the normal electric winning opening is won, and the winning is detected. CPU 30
A process is performed to add one to the regular electric machine start opening prize holding memory 4 via. After processing one time slice,
The process shifts to the normal electric winning opening opening prize holding display task 1d, in which the number of holdings is displayed on the prize holding display 9 based on the data stored in the normal electric opening opening winning prize memory 4. After the processing for one time slice, the process proceeds to the normal electric winning process task 1e, in which the data stored in the normal electric winning opening prize holding memory 4 is subtracted by one and the normal electric winning prize opening 1 is subtracted.
0 is opened and the display 11 is displayed to that effect.
After processing for one time slice, the sound effect task 1i
The task 1i also causes the speaker 18 to output sound according to the output of the pachinko game main task 1f. After processing for one time slice, the process proceeds to the display task 1h, and the pachinko game main task 1f
The pattern is displayed according to the output of the big hit, small hit,
After the display of the loss and the processing for one time slice, the process proceeds to the lamp display task 1g, and the lamp display is performed according to the output of the pachinko game main task 1f.
After processing for one time slice, external communication task 1
The process proceeds to j, where the output data of the pachinko game main task 1f is stored in the communication device 15, and various information stored in the communication device 15 is output at the request of the hall computer 19 or the like. External communication task 1j
Also has a program checking function, performs a security check on the program stored in the ROM 32 via the security check circuit 28 to determine whether or not the program is legitimate, and makes the result transmittable via the communication device 15. . After processing for one time slice, inspection task 1
In step k, the inspection device 20 is connected to the chip, the designation is performed by inputting an arbitrary location of an arbitrary task from the inspection device 20, the program is activated, and the operation of the program of the task to be inspected is started. And the contents of the memory are output to the inspection device 20. After one cycle of the execution process of each task (1a to 1k) is completed,
In the second cycle, the first-class start-up winning detection task 1a is executed again, and the processing for one time slice is sequentially performed to function as a multitask program.

For a task whose execution processing is not completed within the time of one time slice, one task assigned to the next task after the processing of one cycle of the task is completed.
Processing subsequent to the time slice time is performed.
In this embodiment, the task execution processing is performed by 1a, 1b, 1
f, 1c, 1d, 1e, 1i, 1h, 1g, 1j, 1
Although the description has been given of the case where the processing is performed in the order of k and 1a, the present invention is not limited to this. Since the parallel processing is performed by multitasking, the order may be changed in any manner. Furthermore, each control task is described as 1a → 1b → 1f → 1
The time slice is performed in the order of c →,... → 1k. However, the present invention is not limited to this. Depending on the contents of the program, the priority may be changed, the program may be divided more finely, and the size may be increased. It may be configured by integrating them as described above.

In this embodiment, the execution of the program is shifted by one time slice by time slice. However, the time of one time slice may be appropriately determined based on the contents of the program. In the case of a program such as a game machine, the number of steps is smaller than that of a normal program, and when the CPU 30 is configured of 32 bits, the clock frequency is high.
Time slicing in ec. units or less is acceptable.
In the present embodiment, each task is executed and processed in one time slice. However, the present invention is not limited to this. The task may be processed in units of one event.

In the chip according to the present embodiment, since a control program for each device is stored in an area allocated to the ROM 1 for each task, a third-party testing organization that inspects the development device requires a chip testing program. It is not necessary to check all tasks, and the contents of the program may be verified for each task. In this embodiment, the case of the pachinko gaming machine has been described. However, other control tasks (the user program execution memory 32) except for the external communication task and the inspection task which are management tasks stored in the management program memory are described. ) Can be used as a gaming machine dedicated to a pachislot if the task is replaced with a control task for a gaming machine such as a pachislot.

[0017]

As described above, in the gaming machine dedicated chip according to the present invention, each task is written in the ROM so that multiple processing can be performed by performing task control, and each task acts on another task by performing memory control. Since the configuration is such that the program cannot be executed, it is possible for the program to process each task in a manner that does not give an execution order variable.
As a result, it is possible for the developer to create the control program as a series of programs, and for the third party inspection organization, since each task is independent, the inspection of the program becomes easy. Furthermore, since the external communication task and the inspection task make it possible to grasp the number of occurrences of each event of the control contents of the gaming machine (big hits, misses, etc.),
It becomes virtually impossible to perform unauthorized operations.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a chip according to the present invention.

FIG. 2 is a block flowchart showing the relationship between a control program stored in a ROM of a chip according to the present invention and each device.

FIG. 3 is a conceptual diagram showing a relationship between each program stored in a ROM of a chip according to the present invention and processing.

FIG. 4 is a block diagram showing a management state of a ROM storage program in a chip according to the present invention.

[Explanation of symbols]

1 ROM 1a First-Class Startup Winning Hold Display Task 1b First-Class Startup Winning Detection Task 1c Ordinary Electric Startup Winning Detection Task 1d Ordinary Electric Startup Winning Hold Display Task 1e Ordinary Electric Processing Processing Task 1f Pachinko Game Main Task 1g Lamp display task 1h Display task 1i Sound effect task 1j External communication task 1k Inspection task 3 First-class start-up prize-holding memory 4 Normal electric start-up prize-holding memory 5,5 'Ball sensor 6 Big hit information memory 7, 9 Winning Hold Indicator 8 First-Class Winning Port 10 Normal Electric Winning Port 11 Indicator 12 Lamp Display Device 13,17 Symbol Display Device 14 Sound Source Device 15 Communication Device 16 Lamp Display 18 Speaker 19 Hole Computer 20 Inspection Device 22 Clock Generation circuit 24 Memory management circuit 26 User task work memory (RAM) 28 Security circuit 30 Central processing unit (CPU) 32 User program execution memory (EE)
PROM) 34 Game machine task management program memory (ROM) 36 Management program memory (ROM) 38 Game machine task execution management memory (RA)
M) 40 Shared memory (RAM) between tasks 42 External communication circuit 44 Inspection circuit

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[Procedure amendment]

[Submission date] July 22, 1997

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Full text

[Correction method] Change

[Correction contents]

[Document Name] Statement

[Title of the Invention] A gaming machine control chip capable of multitasking

[Claims]

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a pachinko game machine,
The present invention relates to an improvement in a gaming machine control chip for controlling each device of a spinning-type gaming machine.

[0002]

2. Description of the Related Art A gaming machine having a microprocessor includes a program for detecting a winning of a first-class starting port,
Ordinary electric accessory starting opening winning detection program, lottery program such as jackpot, small hit, display program for operating the liquid crystal display unit, sound effect program for generating a sound effect corresponding to the display program,
Various programs such as a lamp display program for controlling the lamp display are stored in a read-only memory (ROM), which is stored in an 8-bit central processing unit (CP).
U) reads the control program stored in the ROM and controls the gaming machine. On the other hand, gaming machines must not have gambling properties, so for gaming machines created by gaming machine development manufacturers, this is based on the regulations of customs business, etc. The system is designed so that only gaming machines that have passed a public test by a third-party testing institution to determine whether or not they conform to the rules for certification and type approval, etc., and that have passed this test are allowed to be shipped to the amusement arcade.

[0003]

However, the programs corresponding to the CPUs which have been used up to now have the above-mentioned control programs described as a series of programs in a machine language or the like, and the influence of noise or the like. In order to prevent runaway of the program, a reset signal is applied in units of 2 msec. To prevent runaway, for example. And performs processing according to the variables. Since the way in which the ordinal variables are given varies depending on the programmer, it is too complicated and difficult for a third-party inspection organization to decipher a program having the ordinal variables, and delays in inspections at the inspection institution are caused. Was causing it. SUMMARY OF THE INVENTION The present invention has been made in consideration of the above-described drawbacks of the related art, and has as its object to provide a system that can easily analyze a program and can easily perform programming.
In addition, the present invention provides an apparatus which can easily check the contents of a program and can notify the outside via a communication task whether or not the contents of a chip and a gaming machine are legitimate.

[0004]

That is, according to the present invention, a CPU incorporated in a gaming machine control chip is constituted by a CPU capable of multiplex processing (for example, 32 bits), and a ROM memory area is used for each control task (game machine). A function of communicating the output information of each task to the program and data) of the control unit of each device, and a function of inspecting whether the gaming machine control chip and the gaming machine are genuine and communicating the result. The task is assigned to an external communication task having a task and an inspection task for inspecting the contents of the game machine, and is controlled so that tasks in each assigned area do not interfere with tasks in other areas. After executing the processing for one processing unit, the CPU proceeds to the next task and executes the processing for one processing unit. A game machine control chip capable multitasking configured as Gosuru. The invention according to claim 2 is characterized in that the program stored in the ROM is written in a high-level language. As the high-level language, for example, it is conceivable to use a C language or the like, prepare a function unique to the gaming machine, and support a more easily understandable program.

[0005]

In the gaming machine control chip according to the present invention capable of multitasking, a program for detecting a series of tasks, that is, a winning of a first-class starting port, a program for detecting an ordinary electric accessory starting port, a jackpot / small jackpot. Lottery program such as, a display program for operating the liquid crystal display unit, a sound effect program for generating a sound effect corresponding to the display program, a lamp display program for controlling a lamp display, etc. Control programs and external communication tasks for management are incorporated in the assigned area, and the programs of each task are controlled in a configuration that does not interfere with other programs. Only needs to check the program for each task, and the program certification at the inspection organization is efficient. Ukoto can. In addition, the execution processing of each task is executed independently, and the control system is processed in such a manner that the result is transmitted to each task through the gaming machine task management program. By confirming only the contents of (1), the operation of the control system can be confirmed, and the gaming machine can be controlled by the contents of the task (program). Since the output information of each control task is stored in the external communication task via the CPU, an event occurring in the control system of the gaming machine can be known later by external communication. In addition, the external communication task performs a security check on whether or not the program of the chip is legitimate via a security check circuit,
The result can be known by external communication. Further, in the chip of the present invention, since the inspection task of the ROM is stored, an arbitrary location of the arbitrary task is specified, and the operation of the program of the inspection target task, the contents of the memory, and the like can be inspected.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the illustrated embodiments. FIG. 1 is a block diagram of a gaming machine control chip according to an embodiment of the present invention. The chip includes a central processing unit (CPU) 30 that receives and drives a clock frequency generated by a clock generation circuit 22 and the CPU.
30, a memory (RAM) 26 for user task work, and a memory (E) for executing a user program in which a user program is stored.
EPROM or flash memory) 32, gaming machine task management program memory (ROM) 3 in which a management program for a gaming machine control program (task) is stored
4. Management program memory (ROM) in which the external communication task 1j and the inspection task 1k of the management task are stored
36, gaming machine task execution management memory (RAM) 3
8. Shared memory (RAM) 40 between each task, external communication circuit 42 for communication connection with an external device, inspection circuit for inspecting whether the chip is genuine or whether the gaming machine is genuine 44 and scans the program stored in the ROM 32 to check whether the program is a legitimate one that has passed the inspection by a third-party inspection organization, and executes the user program only when it is legitimate. Circuit 28 is connected via an internal bus, and when the security circuit 28 determines that the user program is not proper,
This is a reset circuit for resetting U30.

[0007] Each memory (ROM, R
Each of the tasks stored in the AM) is a gaming machine task management program (supervisor program) as shown in FIG.
Machine task management program memory 3 in which is stored
4 and the memory management circuit 24, are limited by walls that do not seem to interfere with each other, and are time-shared by one time slice, and the output result of each task is shared by the gaming machine task management program by the task management program. It is configured to be stored in 40 and then input to another task.

In FIG. 3, reference numeral 1 denotes a read-only memory (ROM) in which a control program (task) is allocated to a predetermined area (address).
M1 is a user program execution memory (ROM) 3
2 and a management program memory (ROM) 36 having different configurations, and a user program execution memory 32 has a first type start-up which is a processing program written in a high-level language (for example, C language). Entry detection task 1
a, first-class start-up winning holding display task 1b, normal-power-start opening winning detection task 1c, normal-power-start opening winning display task 1d, normal-power handling task 1e, pachinko game main task 1f, lamp display task 1g, a display task 1h, and a sound effect task 1i, and the external communication task 1j,
The inspection task 1k incorporates a program. Each task 1a stored in both memories (ROM) 32, 36
1 to 1k are task control circuits 3 incorporated in the CPU 30.
0a (gaming machine task execution management memory 38) is configured to execute execution processing in multiple processing.

In this embodiment, a central processing unit (CPU) 30
Is composed of 32 bits for executing each task (program) while performing multiplex processing.
The bus is connected to M1 (each of the tasks 1a to 1k is stored). The shared memory 40 between tasks (RAM)
It is allocated to a first-class start-up prize-holding memory 3, a normal-electric-start-up prize-holding memory 4 and a jackpot-information memory 6. Are connected to the first-class start-up winning detection task 1a and the normal electric-running start-up winning detection task 1c via the CPU 30. 5,5 '
Are winning ball sensors, each of which has a CPU 30
Is connected to the first-class start-up winning detection task 1a and the normal electric-running start-up winning detection task 1c via the input terminal, so that the winning information is input. Reference numeral 7 denotes a winning holding display, which is connected via the CPU 30 to the first-type starting opening winning holding display task 1b. Reference numeral 8 denotes a first-class winning port, which is connected to the pachinko game main task 1f via the CPU 30. Reference numeral 9 denotes a winning combination display for a normal electric winning combination, which is connected to the normal electric winning opening winning holding display task 1d via the CPU 30. Reference numeral 10 denotes a normal electric winning winning port, and 11 denotes a normal electric winning display (7-segment), which is connected to the normal electric winning processing task 1e via the CPU 30.

Reference numeral 12 denotes a lamp display device, 13 denotes a symbol display device, 14 denotes a sound source device, and 15 denotes a communication device. Each device input side receives a lamp display task 1g, a display task 1h, and a sound effect task 1i via the CPU 30.
And the external communication task 1j, and each device 12 to
The output side of 15 is a lamp display 16, a symbol display 17,
The speaker 18 and the hall computer 19 are connected.

Reference numeral 20 denotes an inspection device for a third party to inspect the gaming machine, which is configured to be connected to an inspection task 1k via the CPU 30, and the inspection task 1k is input from the inspection device 20. Task (1a-1)
By designating an arbitrary location in j), the contents of the program of the task can be checked.

In the configuration described above, in the chip according to the present embodiment, the CPU 30 stores the ROM 1 (the memory 32 for executing the user program and the memory 3 for the management program).
The program area of 6) is controlled by the gaming machine task management program and the memory management circuit 24 so that the respective tasks do not interfere with each other, and sequentially executes the program of each task in one time slice in a multiplexed state. The output of each of the tasks 1a to 1i is
0 to each control device. In this embodiment, as shown in FIGS. 3 and 4, the memory management circuit 24 in the chip allocates each of the tasks 1a to 1k and manages the memory so that each task does not affect other tasks. Task control circuit 3 of CPU 30
0a (RO storing the gaming machine task management program)
M34) to perform time slicing and parallel processing, and each task is, for example, 1a, 1b, 1
f, 1c, 1d, 1e, 1i, 1h, 1g, 1j, 1k
Is executed while circulating the order of one cycle.

That is, the first-class starting opening winning detection task 1a
It is detected in the execution processing of whether or not the first-type start opening has been won. When the first-type start opening has been won, it is output to the first-type start opening winning holding memory 3 via the CPU 30. When prize information is input to the first-type start-up prize holding memory 3, one prize is added from the memory 3 and output to the pachinko game main task 1f. After processing for one time slice, the first-class start-up prize holding display task 1
Then, the number of winnings stored in the winning holding memory 3 is counted, and the number of holdings is displayed on the winning holding display 7 via the CPU 30. After processing for one time slice, it shifts to the pachinko game main task 1f,
In the task, after subtracting the number of winnings stored in the first-class starting opening winning holding memory 3, a lottery or a small hit or a lottery is executed within a predetermined probability range,
The opening time of the first-type winning opening 8 is controlled via the CPU 30 according to the big hit and the small hit, and is output to the lamp display task 1g, the display task 1h, the sound effect task 1i, and the external communication task 1j. After the processing for one time slice, the process proceeds to the normal electric winning opening opening prize detection task 1c, in which the input information of the ball sensor 6 is detected to determine whether or not the normal electric winning opening is won, and the winning is detected. CPU 30
A process is performed to add one to the regular electric machine start opening prize holding memory 4 via. After processing one time slice,
The process shifts to the normal electric winning opening opening prize holding display task 1d, in which the number of holdings is displayed on the prize holding display 9 based on the data stored in the normal electric opening opening winning prize memory 4. After the processing for one time slice, the process proceeds to the normal electric winning process task 1e, in which the data stored in the normal electric winning opening prize holding memory 4 is subtracted by one and the normal electric winning prize opening 1 is subtracted.
0 is opened and the display 11 is displayed to that effect.
After processing for one time slice, the sound effect task 1i
The task 1i also causes the speaker 18 to output sound according to the output of the pachinko game main task 1f. After processing for one time slice, the process proceeds to the display task 1h, and the pachinko game main task 1f
The pattern is displayed according to the output of the big hit, small hit,
After the display of the loss and the processing for one time slice, the process proceeds to the lamp display task 1g, and the lamp display is performed according to the output of the pachinko game main task 1f.
After processing for one time slice, external communication task 1
The process proceeds to j, where the output data of the pachinko game main task 1f is stored in the communication device 15, and various information stored in the communication device 15 is output at the request of the hall computer 19 or the like. External communication task 1j
Also has a program checking function, performs a security check on the program stored in the ROM 32 via the security check circuit 28 to determine whether or not the program is legitimate, and makes the result transmittable via the communication device 15. . After processing for one time slice, inspection task 1
In step k, the inspection device 20 is connected to the chip, the designation is performed by inputting an arbitrary location of an arbitrary task from the inspection device 20, the program is activated, and the program operates for the task to be inspected. And the contents of the memory are output to the inspection device 20. After one cycle of the execution process of each task (1a to 1k) is completed,
In the second cycle, the first-class start-up winning detection task 1a is executed again, and the processing for one time slice is sequentially performed to function as a multitask program.

For a task whose execution processing is not completed within the time of one time slice, one task assigned to the next task after the processing of one cycle of the task is completed.
Processing subsequent to the time slice time is performed.
In this embodiment, the task execution processing is performed by 1a, 1b, 1
f, 1c, 1d, 1e, 1i, 1h, 1g, 1j, 1
Although the description has been given of the case where the processing is performed in the order of k and 1a, the present invention is not limited to this. Since the parallel processing is performed by multitasking, the order may be changed in any manner. Furthermore, each control task is described as 1a → 1b → 1f → 1
The configuration is such that multiplex processing is performed in the order of c →,... → 1k, but the present invention is not limited to this. Depending on the contents of the program, the priority may be changed, the program may be divided more finely, or the program may be enlarged. Alternatively, it may be configured by integrating them.

In this embodiment, the execution of the program is shifted by one time slice by multiplex processing. However, the time of one time slice may be determined as appropriate based on the contents of the program. In the case of a program such as a machine, the number of steps is smaller than that of a normal program, and in the case where the CPU 30 is formed of 32 bits, the clock frequency is high. . In this embodiment,
Each task is configured to be executed in one time slice. However, the present invention is not limited to this. The task may be configured to be processed in units of one event.

In the chip according to the present embodiment, since a control program for each device is stored in an area allocated to the ROM 1 for each task, a third-party testing organization that inspects the development device requires a chip testing program. It is not necessary to check all tasks, and the contents of the program may be verified for each task. In this embodiment, the case of the pachinko gaming machine has been described. However, other control tasks (the user program execution memory 32) except for the external communication task and the inspection task which are management tasks stored in the management program memory are described. ) Can be used as a gaming machine dedicated to a pachislot if the task is replaced with a control task for a gaming machine such as a pachislot.

[0017]

As described above, in the gaming machine dedicated chip according to the present invention, each task is written in the ROM so that multiple processing can be performed by performing task control, and each task acts on another task by performing memory control. Since the configuration is such that the program cannot be executed, it is possible for the program to process each task in a manner that does not give an execution order variable.
As a result, it is possible for the developer to create the control program as a series of programs, and for the third party inspection organization, since each task is independent, the inspection of the program becomes easy. Furthermore, since the external communication task and the inspection task make it possible to grasp the number of occurrences of each event of the control contents of the gaming machine (big hits, misses, etc.),
It becomes virtually impossible to perform unauthorized operations.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a chip according to the present invention.

FIG. 2 is a block flowchart showing the relationship between a control program stored in a ROM of a chip according to the present invention and each device.

FIG. 3 is a conceptual diagram showing a relationship between each program stored in a ROM of a chip according to the present invention and processing.

FIG. 4 is a block diagram showing a management state of a ROM storage program in a chip according to the present invention.

[Description of Signs] 1 ROM 1a First-Class Startup Winning Hold Display Task 1b First-Class Startup Winning Detection Task 1c Normal Electric Startup Winning Detection Task 1d Normal Electric Startup Winning Hold Display Task 1e Normal Electric Processing Task 1f Pachinko game main task 1g Lamp display task 1h Display task 1i Sound effect task 1j External communication task 1k Inspection task 3 First-class start-up prize-holding memory 4 Normal electric start-up prize-holding memory 5,5 'Ball sensor 6 Jackpot information memory 7,9 prize holding display 8 first-class prize opening 10 normal electric prize winning opening 11 display 12 lamp display device 13,17 symbol display device 14 sound source device 15 communication device 16 lamp display 18 speaker 19 hole computer Reference Signs List 20 inspection device 22 clock generation circuit 24 memory -Management circuit 26 User task work memory (RAM) 28 Security circuit 30 Central processing unit (CPU) 32 User program execution memory (EE)
PROM) 34 Game machine task management program memory (ROM) 36 Management program memory (ROM) 38 Game machine task execution management memory (RA)
M) 40 Shared memory (RAM) between tasks 42 External communication circuit 44 Inspection circuit

Claims (2)

[Claims] 1. A central processing unit (CP) capable of controlling tasks.
U) 30, a user program execution memory (ROM) 32 for storing each control task of the game machine program
A management program memory (ROM) 36 for storing management tasks; a gaming machine task management program memory 34 for allocating and managing the storage areas of the ROMs 32 and 36 so that they can be processed in a multiplexed manner for each task; And a memory management circuit 24 that performs control management so that each control task does not interfere with tasks in other areas. The management task is the output information of another gaming machine control task and the gaming machine control chip or An external communication task for inspecting whether the gaming machine is genuine and communicating the result to the outside, and an inspection task for inspecting the contents of the program of the gaming machine, each task stored in the ROM Are sequentially executed while performing task control in the gaming machine task management program memory 34 so that the CPU controls the gaming machine. Multitasking capable gaming machine control chip to. 2. The gaming machine control chip according to claim 1, wherein said program stored in said ROM is written in a high-level language.