JPH11111945A - Semiconductor memory and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To secure a required storage capacity without increasing the height of a charge storage electrode. SOLUTION: BPO4 crystal 14 is precipitated in a BPSG film by heat treating the BPSG film 13 controlled to a prescribed density, the BPSG film is etched anisotropically into a desired shape, then the surface of a BPSG film 15 in the desired shape is etched by a first isotropic etching condition, and recessed and projected parts 16 are formed on a film surface by utilizing the etching speed difference in the BPSG film and the crystal. Then, when a polysilicon film 17 to be a part of the charge storage electrode is formed on the surface of the BPSG film 15, where the recessed and projected parts 16 are formed and furthermore the BPSG film 15 is removed by a second isotropic etching condition, the charge storage electrode 11 provided with recessed and projected parts 12 for which the recessed and projected parts 16 are transferred to the surface of the polysilicon film 17 is formed. As a result, the surface area of the charge storage electrode 11 is increased and the required storage capacity is secured.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor memory device and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, in a dynamic random access memory (DRAM), a charge storage electrode having a three-dimensional three-dimensional structure is formed by using polycrystalline silicon as a charge storage electrode to secure a sufficient storage capacity. I have.

As one example, a cylindrical charge storage electrode called a so-called cylindrical cell is being put to practical use. FIG.
This shows an example of a cross section of a memory cell portion in a conventional technique, in which a cylindrical charge storage electrode 9 increases an electrode surface area and secures a necessary storage capacity.

[0004]

However, in the above-mentioned conventional structure, it is necessary to increase the height of the cylindrical portion in order to secure a storage capacity necessary for further miniaturization. There has been a problem that the absolute level difference from the peripheral circuit portion becomes large, and it becomes difficult to form the contact and the wiring layer in the subsequent process.

The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a semiconductor memory device capable of securing a required storage capacity without increasing the height of a charge storage electrode, and a method of manufacturing the same. It is the purpose.

[0006]

In order to achieve the above object, a semiconductor memory device according to the present invention is a semiconductor memory device having a so-called cylindrical charge storage electrode. It is characterized by having.

Further, the method of manufacturing a semiconductor memory device of the present invention includes a step of heat-treating a BPSG film controlled to a predetermined concentration on a memory cell formed on a semiconductor substrate to precipitate crystals in the BPSG film; Forming a desired shape by anisotropically etching the BPSG film; and etching the BPSG film and the crystal by etching the surface of the BPSG film formed in the desired shape under a first isotropic etching condition. Forming irregularities on the BPSG film surface by a speed difference;
A step of forming a conductive film on the entire surface of the substrate including the surface of the BPSG film on which the irregularities are formed, a step of anisotropically etching the conductive film and leaving only the side wall of the BPSG film, Removing the BPSG film under isotropic etching conditions, exposing the conductive film surface to which the irregularities have been transferred, and forming a charge storage electrode having irregularities.

[0008] According to the above configuration, the surface area of the charge storage electrode is increased by providing irregularities on the side wall of the cylindrical portion, and the height of the cylindrical portion for realizing the same storage capacity as that of a conventional cylindrical cell is reduced. Can be reduced.

[0009]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows a cross section of a memory cell portion of a semiconductor memory device according to an embodiment of the present invention. The same components as those in FIG. 3 are denoted by the same reference numerals. That is, in FIG. 1, 1 is a P-type silicon substrate, 2 is an oxide film for element isolation, 3
Is a gate electrode, 4 is an n-diffusion layer, 5 is a bit line, 6 is B
A PSG film, 7 is a TEOS film, 8 is a polysilicon film, and 10 is a counter electrode. Reference numeral 11 denotes a charge storage electrode, and reference numeral 12 denotes unevenness formed on a side wall of the charge storage electrode 11.

By providing unevenness 12 on the inner side surface of the charge storage electrode 11, the charge storage electrode 11
Can be increased. For example, when the surface area of the inner side surface is increased by 30% due to unevenness, 64 MDRA
In a memory cell equivalent to M, the height of the electrode for obtaining the same storage capacity as the charge storage electrode without unevenness can be reduced by about 50 nm, so that the level difference between the memory cell portion and the peripheral circuit portion can be reduced by that amount, and the contact in the later process can be reduced. In addition, wiring can be easily formed.

Next, a method of manufacturing a semiconductor memory device according to an embodiment of the present invention will be described with reference to FIG. FIG. 2 is a cross-sectional view illustrating a process of forming a memory cell.

First, as shown in FIG. 2A, a gate electrode 3 and an n ~ diffusion layer 4 are formed on a P-type silicon substrate 1 through an isolation oxide film 2 and a gate oxide film (not shown). Are sequentially formed, and a bit line 5 connected to one of the n ~ diffusion layers 4 is formed. Next, contact holes are opened in the BPSG film 6 serving as the first insulating film and the TEOS film 7 serving as the second insulating film, and the first conductive film is connected to the other n ~ diffusion layer 4. A first polysilicon film 8 is formed, and a BPSG film 13 is further formed thereon. B of this BPSG film 13
And the concentration of P is 5.3% by weight and 5.5% by weight, respectively.

Next, as shown in FIG.
After growing the film 13, the first heat treatment is performed in a nitrogen atmosphere at a temperature
A heat treatment is performed at 700 ° C. for 2 hours, and then a second heat treatment is performed in a nitrogen atmosphere at a temperature of 850 ° C. for 35 minutes to precipitate BPO ₄ crystals 14 in the BPSG film.

Next, as shown in FIG. 2C, a BPSG film is formed by using lithography and dry etching techniques.
13 is processed into a desired shape to form a BPSG film 15. Further, when the BPSG film 15 processed into a desired shape is etched with a diluted hydrofluoric acid solution of HF: H ₂ O = 1: 600 for 5 minutes as a first isotropic etching condition, the exposed BPO ₄ The crystal is etched faster than the BPSG film, and as a result, irregularities 16 are formed on the surface of the BPSG film 15.

Next, after a second polysilicon film is formed on the entire surface of the substrate, anisotropic dry etching is performed to obtain a structure shown in FIG.
As shown in (d), the second polysilicon film 17 is left only on the side wall of the BPSG film 15.

Thereafter, as shown in FIG. 2E, the BPSG film 15 is removed by etching with HF vapor as a second isotropic etching condition, and the surface of the polysilicon film 17 on which the irregularities 16 have been transferred is removed. The charge storage electrode 11 having the projections and depressions 12 is formed.

Thereafter, as shown in FIG. 2F, a counter electrode 10 is formed via a so-called ONO film (not shown) as a capacitance insulating film, thereby forming a capacitance portion of the memory cell.

In this embodiment, the BPSG concentrations of B and P are 5.3% by weight and 5.5% by weight, respectively, but the same effect can be obtained if the respective concentration ranges are within ± 0.5% by weight. can get.

The invention described in the claims is
The present invention is not limited to the mode described in the above embodiment.

[0020]

As described above, according to the present invention,
By providing the step of increasing the surface area of the charge storage electrode by utilizing the crystal deposition of BPSG, the height of the charge storage electrode itself for securing a necessary storage capacity can be reduced.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a semiconductor memory device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a method of manufacturing a semiconductor memory device according to an embodiment of the present invention in the order of steps;

FIG. 3 is a sectional view of a conventional semiconductor memory device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... P type silicon substrate, 2 ... Oxide film for element isolation, 3
... gate electrode, 4 ... n ~ diffusion layer, 5 ... bit line,
6, 13: BPSG film, 7: TEOS film, 8, 17: polysilicon film, 10: counter electrode, 11: charge storage electrode,
12,16 ... irregularities, 14 ... BPO ₄ crystal.

Claims (4)

[Claims] 1. A semiconductor memory device having a so-called cylindrical charge storage electrode, wherein the charge storage electrode has irregularities on a cylindrical side wall portion. 2. A heat treatment is performed on a BPSG film controlled at a predetermined concentration on a memory cell formed on a semiconductor substrate to form a BPSG film.
Depositing crystals in the G film, anisotropically etching the BPSG film to form a desired shape, and subjecting the BPSG film surface formed to the desired shape to first isotropic etching conditions. Forming irregularities on the surface of the BPSG film by etching at a difference in etching rate between the BPSG film and the crystal, forming a conductive film on the entire surface of the substrate including the surface of the BPSG film on which the irregularities are formed, Anisotropically etching the anisotropic film to remain only on the side wall of the BPSG film; and forming the B film under the second isotropic etching condition.
Removing the PSG film and exposing the surface of the conductive film on which the unevenness has been transferred to form a charge storage electrode having the unevenness. 3. The concentration of B and P in the BPSG film, respectively.
3. The composition according to claim 2, wherein the content is 5.3% by weight or 5.5% by weight.
The manufacturing method of the semiconductor memory device described in the above. 4. The heat treatment of the BPSG film includes a first heat treatment performed in a temperature range of 650 ° C. to 800 ° C. and a second heat treatment performed in a temperature range of 800 ° C. to 900 ° C. The manufacturing method of the semiconductor memory device described in the above.