JPH11111848A - Automatic positioning and wiring - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an counter-EM, automatic positioning and wiring method which can avoid reduction of a wiring performance caused by an excessive EM measure in a functional block. SOLUTION: After a deciding step S2 are provided a capacity extracting step S3 of finding actual wiring lengths between functional blocks from an automatic positioning and wiring result 3 and outputting as an output load capacity a sum of a wiring capacity and an input terminal capacity of a next stage, and a pattern changing step S4 for determining a pattern which satisfies EM standards for each of the functional blocks from an output load capacity 4, a table 5 showing the output load capacity 4 and an EM measure pattern parameter associated with the capacity 4 and an operating frequency 6 and changing before-EM measure pattern for each functional block to an after-EM measure pattern.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic placement and routing method, and more particularly to a semiconductor integrated circuit (I) using computer-aided design (C (A) D) and considering electromigration.
C) The automatic placement and routing method.

[0002]

2. Description of the Related Art Conventionally, when designing an IC with the aim of increasing the degree of integration using automatic placement and routing, the placement and routing cannot be converged by the automatic placement and routing, and the process of relocation and routing is performed several times. Is often done. In particular, in recent ICs, measures for electromigration have become indispensable due to the miniaturization of the IC and the increase in the operation speed. Here, electromigration (hereinafter referred to as EM)
As is known, it is the leaching of the conductor metal of the power supply wiring and the signal wiring generated due to the overcurrent to the outside of the own wiring,
The degree depends on the current density in the conductor, and ultimately, the leached metal reaches the adjacent wiring and causes a short circuit failure, which greatly affects the reliability of the IC. Therefore, as a countermeasure against electromigration, generally, an increase in wiring width, parallel wiring, etc. are performed to increase current capacity.

However, the EM measures for increasing the current capacity of the wiring as described above considerably reduce the wiring performance, and consequently the convergence of the layout wiring at the time of automatic layout wiring has been reduced.

Referring to FIG. 7 which shows a flow chart of a first conventional automatic placement and routing method, the first conventional automatic placement and routing method includes a connection between functional blocks in order to realize a desired automatic placement and routing. Circuit connection information 1 describing information
And the automatic placement and routing information 2 which defines permission and non-permission of placement and routing required for executing the automatic placement and routing, executes the automatic placement and routing, and outputs the automatic placement and routing result 3 Step S1 and automatic placement and routing result 3
A determination step S2 of determining the presence or absence of unconnected wiring, the presence or absence of contact between wirings, and the like, and outputting a determination result of convergence or non-convergence of the automatic placement and wiring; Automatically re-routing under the control of the control information 7 describing the range designation, execution procedure, and the like, and outputting the automatic placement and routing result 3.

Referring to FIG. 7, the processing of the first conventional automatic placement and routing method will be described. First, in automatic placement and routing step S1, circuit connection information 1 and automatic placement and routing information 2
Are read out, a predetermined automatic placement and routing is executed, and an automatic placement and routing result 3 is output.

Next, in judgment step S2, the presence or absence of unconnected wiring and the presence or absence of contact between the wirings in the automatic placement and routing result 3 are checked. If there is no unconnected wiring or contact between the wirings, it is determined. It is determined that the automatic placement and routing has converged, and the process ends. If there are unconnected wires or there is contact between the wires, it is determined that the automatic placement and routing has not been converged, and the process proceeds to the rewiring step S5.

In the rerouting step S5, the automatic placement and routing result 3 which has not been converged is automatically rerouted under the control of the control information 7, and the automatic placement and routing result 3 is output.

Hereinafter, steps S2 and S5 are repeated until it is determined that the convergence is made in the determination step S2.

Here, in the first conventional automatic placement and routing method, when it is necessary to consider EM, a functional block in which EM countermeasures are taken in advance in the functional block is used.

A conventional EM countermeasure will be described with reference to FIG. 8 which is a schematic plan view of an example of a functional block in which a conventional conventional EM countermeasure is performed in a functional block. The purpose of the present invention is to reduce the current density per unit area of the aluminum wiring by adding contacts and aluminum wiring.

Taking the drain of a P-channel transistor as an example, the current density flowing through the drain during actual use depends on the total area of the drain contact K. If only one of the contacts K1 has a high current density and cannot satisfy the current density limit value for EM prevention,
A new contact K2 is newly added and these contacts K
By using two of 1 and K2 in parallel, it is possible to reduce the current density and satisfy the above-mentioned current density limit value standard.

This countermeasure is a countermeasure peculiar to the functional block, and operates at the highest operating frequency under the strictest operating conditions, that is, with the maximum load capacity drivable by this functional block added to the output terminal. EM even under conditions
It is general to calculate and design in advance so that the corresponding current density limit value satisfies the standard.

In recent years, due to the effects of miniaturization and higher frequencies, the number of functional blocks that require EM countermeasures in each functional block has been increasing. In order to achieve high integration, it is effective to reduce the wiring-dedicated area. For that purpose, it is necessary to effectively utilize the area in which the functional blocks are arranged as the wiring area. Therefore, it is important to optimize EM countermeasures in each functional block in order to secure the wiring property.

In the above-mentioned first conventional placement and routing method,
When the EM countermeasure is performed in the functional block, the countermeasure is to add a contact or an aluminum wiring. However, in this measure, it is inevitable that a wiring grid that can be used at the time of automatic placement and wiring is reduced due to the added contact and aluminum wiring.

The problem is that this countermeasure is a unified countermeasure set for each functional block irrespective of the use conditions. As described above, when the functional block is used under the strictest conditions for the EM as described above. However, it is carried out so as to satisfy the standard of the corresponding current density limit value. Therefore, even when the use conditions are not strict, such as when the output load is light, the functional blocks subjected to the unified measures are used for the entire chip or all within a predetermined layout wiring area.
In other words, the use of functional blocks with excessive measures will unnecessarily reduce the wiring grid,
As a result, there is a problem that the wiring property is reduced and the degree of integration is reduced accordingly.

Next, as an automatic placement and routing method for performing optimal power supply routing while taking into account EM during automatic placement and routing and minimizing a non-routable area, Japanese Patent Laid-Open No. 4-287 is disclosed.
A second conventional automatic placement and routing method described in Japanese Unexamined Patent Publication No. 945 (Document 1) is known.

The operation of the second conventional automatic placement and routing method will be described with reference to FIG. 9 which shows a flowchart of the second conventional automatic placement and routing method. Each functional block will be described in order to realize a desired operation. The circuit connection information 101 describing connection information between them is input, automatic placement for arranging each functional block is performed (step P1), and an automatic placement result 102 is output.

On the other hand, from the fan-out number of the output terminal of each functional block extracted from the circuit connection information 101, the output load capacity 104 for each functional block is calculated and output by the following equation (step P3). (Output load capacity) = (Capacity per fan-out) × (Number of fan-outs) (1) Here, the capacity per fan-out is a unit input terminal capacity or a unit input terminal capacity and a functional block. It is the sum of the wiring capacitances corresponding to the predicted average wiring lengths between them.

Next, using the output load capacitance 104, the cell power consumption 105 is calculated and output according to the following equation (step P4). (Power consumption) = (operating frequency) × (output load capacity) × (operating voltage) ² ... (2)
02, the cell arrangement state of each cell column is detected, and cell column information 103 is output.

Next, cell power consumption 105 and cell column information 1
03 to calculate the maximum power consumption of the cell column (step P
5) Output the cell column maximum power consumption 107.

The allowable current amount 106 defines the allowable current amount per fixed power supply wiring width, that is, per power supply wiring.

Next, the power supply wiring number determination step P6 includes:
By dividing the maximum power consumption 107 of the cell row by the allowable current amount 106 per power supply line, the number of power supply lines 108
To determine.

In the automatic wiring step P7, the automatic placement result 1
02, automatic wiring is performed. At this time, the EM countermeasures for the power supply wiring can be executed by automatically wiring the set number of power supply wirings of the power supply wiring number 108 determined in Step P6.

Although the second conventional automatic placement and routing method is an effective means for laying power supply lines during automatic placement and routing, it has not been possible to take optimal EM countermeasures in each functional block.

When an EM measure is taken at the time of executing the automatic placement and routing, as described above, the output load capacity of each functional block obtained by the equation (1) is used when the measure is determined.

However, the output load capacitance of each functional block is increased due to the wiring between the functional blocks due to the miniaturization. Therefore, in order to obtain the output load capacitance accurately, the actual wiring length after the automatic wiring is used. There is a need. Therefore, in the conventional method using only the input terminal capacitance or the estimated wiring length, the accuracy of the output load capacitance is not high.
It was difficult to optimize the M measures.

Further, even when a flow using the actual wiring length between functional blocks is applied when calculating the output load capacity of the second conventional automatic placement and routing method, there is a problem in the rewiring method.

That is, when the actual wiring length between the functional blocks is used, after the wiring between the functional blocks is completed, an automatic countermeasure for EM is taken. Alternatively, when the wiring between the functional blocks passes through the area for disposition such as the aluminum wiring for countermeasures, it is necessary to rewire the wiring between the functional blocks because the wiring is carried out in the vicinity. If the wiring between the functional blocks after the rewiring becomes longer than that before the rewiring, the output load capacity of the functional block to which the wiring between the functional blocks is connected further increases. The instantaneous value of the load current increases, and therefore, a new EM measure is required. Furthermore, the EM countermeasure of this functional block falls into a cycle of generating a block requiring the next EM countermeasure, resulting in a problem that the execution time of the automatic placement and routing is increased or the automatic placement and routing does not converge. .

[0029]

According to the first conventional automatic placement and routing method described above, each functional block has a standard of a current density limit value corresponding to EM even under a use condition under the strictest conditions regarding electromigration (EM). In order to satisfy the requirements, measures such as the addition of contacts and parallel wiring are implemented in a unified manner. As a result, the number of wiring grids is reduced as needed, and there is a disadvantage that the wiring property is reduced and the degree of integration is reduced accordingly.

In the second conventional automatic placement and routing method, power supply wiring and wiring between functional blocks are used as measures against EM at the time of automatic placement and wiring, which is an effective means for reducing the wiring property due to the EM measures in the functional blocks. There was a disadvantage that there was no.

Further, there is a disadvantage that the convergence of the automatic placement and routing is reduced due to the reduction in the wiring property, and the execution time of the automatic placement and routing is also increased.

Further, when an EM countermeasure is taken during automatic placement and routing, the output load capacitance of each functional block is used when determining a countermeasure method. Therefore, with the conventional method using only the input terminal capacitance or the estimated wiring length, the accuracy of the output load capacitance cannot be increased, so that it is difficult to optimize the EM countermeasures.

Further, when the actual wiring length after automatic wiring is used in order to accurately obtain the output load capacitance, measures are taken to cope with EM after wiring between the functional blocks is completed. Or, if there is an existing wiring between functional blocks in the area for disposition such as aluminum wiring for countermeasures, it is necessary to rewire that wiring,
When the rewiring is longer than before the rewiring, the output load capacitance of the functional block to which the wiring is connected increases, and the instantaneous value of the load current further increases.
M countermeasures are required, and the above countermeasures for this functional block fall into a cycle of generating the next block that requires the above countermeasures, which leads to an increase in the execution time of the automatic placement and routing, and the automatic placement and routing does not converge. There was a problem.

An object of the present invention is to solve the above-mentioned problem and to provide a power supply wiring and a wiring between functional blocks as well as an E in a functional block.
An object of the present invention is to provide an automatic placement and routing method that takes into account M measures.

[0035]

According to the automatic placement and routing method of the present invention, circuit connection information describing connection information between functional blocks and permission / permission of placement / routing necessary for execution of automatic placement / routing are provided.
An automatic placement and routing step of reading the automatic placement and routing information defining the disallowance, executing the automatic placement and routing, and outputting the automatic placement and routing result, and the presence or absence of unconnected wiring and the contact between the wirings in the automatic placement and routing result. A determination step of determining the presence / absence and the like and outputting a determination result of the convergence or non-convergence of the automatic placement and routing; And a rewiring step of performing automatic wiring again to update the automatic placement and routing result, and ending when the pre-determination result converges, wherein after the determination step, the automatic placement and routing result A capacitance extraction step of obtaining the actual wiring length between each functional block and outputting the sum of the capacitance of the wiring and the input terminal capacitance of the next stage connected as an output load capacitance; The output load capacitance, the countermeasure pattern table in which the parameters of the artwork pattern for the electromigration countermeasure corresponding to the output load capacitance and the operation frequency are previously tabulated, and the operation frequency are used for each of the functional blocks. A pattern that determines a countermeasure pattern that is the artwork pattern that satisfies a current density limit standard that is a standard of a current density limit value, and changes a pre-change pattern that is a current artwork pattern of each functional block to the countermeasure pattern. And a changing step.

[0036]

FIG. 7 shows an embodiment of the present invention.
Referring to FIG. 1 also shown in a flow chart with common reference characters / numerals attached to the common components, the automatic placement and routing method according to the present embodiment shown in FIG. Automatic placement by reading circuit connection information 1 describing connection information between functional blocks common to the wiring method and automatic placement and routing information 2 defining permission and non-permission of placement and routing required when executing automatic placement and routing. The automatic placement and routing step S1 for executing the routing and outputting the automatic placement and routing result 3, and the presence or absence of the unconnected wiring and the contact between the wirings in the automatic placement and routing result 3 are determined to determine whether the automatic placement and routing has converged or not. Automatic wiring is performed again by the control step 7 in which the determination result of convergence is output and the control information 7 describing the range specification and the execution procedure when rewiring is performed.
In addition to the re-wiring step S5 for outputting the actual wiring length, the actual wiring length between the functional blocks is obtained from the automatic placement and routing result 3, and the sum of the wiring load and the input terminal capacitance of the next stage connected to the output load capacitance 4 is calculated. Extraction step S3 to output as
From the output load capacity 4, the table 5 in which the parameters of the EM countermeasure artwork pattern are tabulated, and the operating frequency 6, the standard of the current density limit value corresponding to electromigration (hereinafter referred to as EM) for each functional block (hereinafter referred to as EM) A pattern change step S4 of determining an artwork pattern that satisfies (EM standard) and superimposing a reinforcement pattern on the original artwork pattern of the functional block to be changed to take measures against EM.

Table 5 prepares several types of artwork patterns for EM countermeasures for each functional block, and calculates parameters for each artwork pattern to satisfy the EM standard, namely, output load capacity and operating frequency. This is a table of the results.

FIGS. 2A and 2B show artwork patterns before and after the EM countermeasure of the functional block to which the automatic placement and routing method of the present embodiment is applied.
Referring to ((B)), the artwork pattern after the EM countermeasure shows that the upper half of the figure is a P-channel transistor,
The lower half is an N-channel transistor 30, and a reinforcement pattern 21 for countermeasures against EM on the source side and a reinforcement pattern 22 for countermeasures against EM on the drain side of the P-channel transistor 20.
And a reinforcement pattern 31 for countermeasures against EM on the drain side of the N-channel transistor 30 and a reinforcement pattern 32 for countermeasures against EM on the source side.

The reinforcing patterns 21, 22, 31, 3
2 is composed of a contact and an aluminum wiring, respectively.

For example, paying attention to the drain side contact of the P-channel transistor 20, it is one of the contacts K1 before the EM countermeasure, and is one of the contacts K after the countermeasure.
1, K2.

When it is determined that the current density is too high with one contact based on the output load capacity and operating frequency during actual use, that is, when it is determined that the EM standard cannot be satisfied, the reinforcing pattern 22 is connected to the P-channel transistor 2.
0, and one contact is added to the drain side.
By setting the number to 1, K2, the current density flowing through one contact is halved, which satisfies the EM standard.

Next, the operation of this embodiment will be described with reference to FIGS. 1 and 2. First, the circuit connection information 1 and the automatic placement and routing information 2 are read, the automatic placement and routing is executed, and the automatic placement and routing result is obtained. 3 is output (step S1). Here, the automatic placement and routing information 2 includes, as information on each functional block, artwork on which no EM countermeasures have been taken, that is, information on the artwork pattern in FIG. 2 (A).

Next, it is determined from the automatic placement and routing result 3 whether or not there are unconnected wires, whether or not there is contact between the wires, and the like (step S2). Here, when it is determined that there is unconnected wiring or contact between the wirings, it is determined that the convergence has not occurred, and the process proceeds to the output load capacity extraction step S3. However, since the EM countermeasure has not been taken after execution of the initial placement and wiring, the process proceeds to the output load capacitance extraction step S3 even when it is determined that there is no unconnected wiring or no contact between the wirings.

In the capacitance extraction step S3, the actual wiring length between the functional blocks is obtained from the automatic placement and routing result 3, and the sum of the wiring capacitance and the input terminal capacitance of the next stage of the connection destination is output as the output load capacitance 4. .

Next, in the pattern change step S4, an artwork pattern that can satisfy the EM standard is determined for each functional block from the output load capacity 4, each parameter of the table 5, and the operating frequency 6, and the function to be changed is determined. EM countermeasures are taken by superimposing a reinforcing pattern on the original artwork pattern of the block.

Next, using the control information 7 and the functional block changed in the pattern changing step S4, automatic wiring is executed again to obtain the automatic arrangement and wiring result 3 corresponding to the pattern change.
Is output (step S5).

The automatic placement and routing result 3 is determined in the determination step S2.
When there is no unconnection or contact between wires, that is, when it is determined that convergence has occurred, the process ends. When it is determined that convergence has not occurred, the output load capacity extraction step S3 and the pattern change step S3 are performed again.
4, the rewiring step S5 and the determination step S2 are repeated.

Referring to FIG. 3 which shows the details of the pattern changing step S4 in a flowchart, when the output load capacity 4 and the operating frequency 6 are given, the countermeasure pattern determining step S41 determines the artwork to be changed from the table 5 based on the values. Determine the pattern.

In the reinforcing pattern adding step S42, a block and a pattern to be added in the countermeasure pattern determining step S41 are obtained, and a reinforcing pattern for the EM countermeasure in the functional block is added.

In the wiring prohibition information generating step S43, wiring prohibition information is generated in the reinforcing pattern portion added in the reinforcing pattern adding step S42, and rewiring information 41 is created.

Referring to FIG. 4, which is a circuit diagram showing an example of circuit connection information of a function block to be automatically wired according to the present embodiment, the function block includes two inverters IV1 and IV2 connected in series and inverters IV1 and IV2. And an aluminum wiring W1 connecting between the input terminal of IV2 and the input terminal of IV2.

In the output load capacitance extracting step P3, the output load capacitance is extracted from the automatic placement and routing result 3.
The output load capacity is the sum of the input terminal capacity of the next functional block and the wiring capacity between the functional blocks. Therefore, the output load capacity 4 of the inverter IV1 is, for example, 1 pF for the input terminal capacity of the inverter IV2 and the aluminum wiring W1. Is 3 pF when the wiring capacitance is 2 pF. Here, the wiring capacitance of the aluminum wiring W1 is calculated from the actual wiring length.

FIG. 5A is a graph showing an example of the correlation between the output load capacitance 4 relating to the EM derived by the simulation and the operating frequency 6, and this graph is represented on the X axis using the operating frequency 6 as a parameter. The current density (hereinafter referred to as EM) D of the conductor corresponding to EM with respect to the output load capacitance 4 is shown on the Y-axis. This figure shows, for example, the characteristics of the functional blocks without the EM countermeasure shown by the artwork pattern of FIG. 2A, in which graph A has an operating frequency of 50 MHz, B has an operating frequency of 100 MHz, C has an operating frequency of 150 MHz, and D
Indicates the correlation at the operating frequency of 200 MHz.
Graph E shows the EM standard value.

From the graphs A and E, the operating frequency is 50 MHz.
It can be seen that in order to satisfy the EM standard value E, the output load capacitance is 2 pF at the maximum.

Referring to FIG. 5B showing an example of the table 5, each element of the table 5 shows the correlation between the output load capacitance 4 related to EM and the operating frequency 6 for each EM countermeasure artwork pattern. An EM countermeasure pattern that satisfies the EM standard value E for the output load capacitance CO and the operating frequency 6 is described for each functional block.

Here, for convenience of explanation, the table 5 shown in FIG. 5B is a table of the inverter IV1, and the pattern A of this table 5 is an artwork pattern before the EM measure (FIG. 2A), It is assumed that the pattern B is the artwork pattern after the EM countermeasure (FIG. 2B).

Referring again to FIG. 3, this inverter I
When the output load capacitance 4 of V1 is 3 pF and the operating frequency 6 is 50 MHz as described above, use of the pattern B is determined from the table 5 in the countermeasure pattern determination step S41. In the reinforcing pattern adding step S42, FIG.
(B) Reinforcement patterns 21, 22, 31, and 32 are added. The wiring prohibition information generating step S43 generates wiring prohibition information corresponding to each of the added reinforcing patterns 21, 22, 31, and 32, and creates rewiring information 41.

As an example of the first embodiment, EM
As a countermeasure, an example has been described in which the reinforcing patterns are arranged on the source side and the drain side of the P-channel transistor 20 and on the drain side and the source side of the N-channel transistor 30. However, it is also possible to arrange the reinforcing patterns only partially. It is.

That is, countermeasure pattern determination step S4
1, when it is determined that a countermeasure is necessary only on the drain side of the P-channel transistor 20, in the artwork pattern adding step S <b> 42, the reinforcement pattern 22 shown in FIG. Create a work.

As described above, according to the present embodiment, it is possible to take measures against EM in a functional block by a simple process of adding a reinforcement pattern for EM measures at the time of automatic placement and routing, and it is possible to eliminate unnecessary EM measures. Optimum EM countermeasures can be taken without causing deterioration of wiring properties due to EM countermeasures.

Further, in the output load capacitance extraction step P3, the output load capacitance can be accurately obtained by calculating the actual wiring length and calculating the output load capacitance.
EM measures can be optimally and accurately performed.

The feature of the present embodiment is that the initial arrangement wiring is E
Since this is performed with an artwork pattern that does not take the M countermeasure, placement and routing can be performed in a state where wiring properties are the highest. Therefore, it is effective when it is desired to minimize the chip area and the macro area.

Next, FIG. 6 is a flowchart showing a pattern change step S4A which characterizes the second embodiment of the present invention, in which common reference characters / numbers are assigned to components common to FIG. For reference, the pattern change step S of the first embodiment of the present embodiment shown in FIG.
The difference from No. 4 is that, instead of the reinforcing pattern adding step S42 and the wiring prohibition information generating step S43, an excessively reinforcing reinforcing pattern is removed from the artwork pattern on which the reinforcing pattern for EM countermeasures is superimposed. It has a reinforcement pattern deletion step S44 and a wiring permission information generating step S45 for generating wiring permission information for the reinforcement pattern deleted in step S44.

That is, this embodiment is different from the first embodiment in that a reinforcement pattern for EM measures is superimposed on an artwork pattern of a functional block having no EM measures.
The difference is that the EM countermeasures are optimized, but a reinforcement pattern which is an excessive countermeasure is removed from an artwork pattern in which reinforcing patterns for the EM countermeasures are overlapped.

Next, the processing flow of the pattern change step S4A of the present embodiment will be described with reference to FIGS. In the present embodiment, the artwork pattern after the EM countermeasure (FIG. 2B) is used at the time of initial placement and wiring, while the artwork pattern of FIG. 2 (A) is used.

First, a countermeasure pattern determining step S41
Given an output load capacitance 4 and an operating frequency 6, determine an artwork pattern to be changed from the table 5 based on the values.

In the reinforcing pattern deletion step S44, the blocks and patterns to be deleted are obtained in the countermeasure pattern determining step S41, and the reinforcing patterns in which the EM countermeasures in the functional blocks are excessive are removed.

In the wiring permission information generating step S45, wiring permission information is generated for the reinforcing pattern deleted in the reinforcing pattern deleting step S44, and rewiring information 41 is created.

The operation of this embodiment will be described with reference to FIGS. 1, 2, 4, 5 and 6, focusing on differences from the first embodiment. As information on each functional block, information on an artwork pattern that has been subjected to EM measures under the strictest usage conditions is stored.

In the first embodiment, the determination step S2 always proceeds to the output load capacitance extraction step P3 after the initial placement and wiring. In the present embodiment, however, the artwork pattern used at the time of the initial placement and routing is used. Uses the one that satisfies the EM standard, and ends when it is determined that convergence has been achieved.

Referring to FIG. 4, automatic placement and routing is performed in the automatic placement and routing step S1, and the input terminal capacitance of the inverter IV2 is reduced to 1p in the output load capacitance extraction step P3.
F, when the wiring capacitance of the aluminum wiring W1 is extracted as 1 pF, the output load capacitance 4 of the inverter IV1 is 2 pF.
It becomes F.

Referring to FIGS. 2A, 2B and 5B, the output load capacitance 4 is 2 pF and the operating frequency 6 is 50.
At MHz, artwork pattern A from table 5
Satisfies the EM standard.

The countermeasure pattern determining step S41 determines that the EM countermeasure is excessive in the artwork pattern B used by the inverter IV1 at the time of initial placement and wiring, and determines to use the artwork pattern A.

In the reinforcing pattern deleting step S10, E
The reinforcement patterns 21, 22, 31, and 32 of the M countermeasure unit are deleted.

In the wiring permission information generating step S11, wiring permission information corresponding to the reinforcement patterns 21, 22, 31, 32 to be removed is generated, and rewiring information 41 is created.

Since the present embodiment is a method of deleting an excessive EM countermeasure, it does not affect wiring between functional blocks. As a result, the target wiring at the time of rewiring can be narrowed down to only unconverged wiring, and the rewiring is performed with a larger wiring grid than at the time of the initial wiring, so that the execution time of the automatic placement and routing can be reduced. .

When the effect of the present invention described above is quantitatively calculated, assuming that 20% of the functional blocks have an excessive EM countermeasure, the artwork pattern in which the EM countermeasure has been performed is within the functional blocks. Assuming that the number of wiring grids for which wiring is prohibited is 10 and the number of wiring grids for which wiring is prohibited by the excessive countermeasure unit is 4, the number of wiring grids is 4 in the functional block by removing the excess countermeasure unit.
The wiring grid increases by 0%, and the wiring grid increases by 8% in the whole circuit.

[0078]

As described above, according to the automatic placement and routing method of the present invention, after the determination step, the actual wiring length between the functional blocks is obtained from the result of the automatic placement and routing, and the capacitance of the wiring and the input terminal capacitance of the next stage are obtained. , And a countermeasure pattern that satisfies the EM standard is determined for each functional block based on the output load capacity, the countermeasure pattern table, and the operating frequency, and the pre-change pattern is used as the countermeasure pattern. By having a pattern changing step to change, it is possible to take an optimum, that is, a minimum countermeasure that can satisfy an EM standard value depending on an output load capacity and an operating frequency of each functional block after the placement and routing, that is, a minimum measure is possible. By adding a simple process of adding or deleting an artwork pattern, it is possible to take measures against EM within the function block. Ri, there is an effect that it is possible to prevent a decrease in the wiring of the reduction and integration degree associated therewith.

Further, since high wiring properties are ensured,
This has the effect of reducing the execution time required for automatic placement and routing.

Further, when obtaining the output load capacitance which is a deciding factor of the EM countermeasure pattern, the actual wiring length is used.
This has the effect of improving the accuracy of the measures.

[Brief description of the drawings]

FIG. 1 is a flowchart showing a first embodiment of an automatic placement and routing method according to the present invention.

FIG. 2 is a pattern diagram showing an artwork pattern before and after an EM measure of a functional block to which the automatic placement and routing method of the present embodiment is applied.

FIG. 3 is a flowchart showing details of a pattern changing step in FIG. 1;

FIG. 4 is a block diagram illustrating an example of an EM countermeasure target function block;

5 is a diagram showing an example of a graph and an example of a table showing a correlation between an output load capacity related to EM and an operating frequency 6; FIG.

FIG. 6 is a flowchart of a pattern changing step characterizing a second embodiment of the automatic placement and routing method of the present invention.

FIG. 7 is a flowchart showing an example of a first conventional automatic placement and routing method.

FIG. 8 is a pattern diagram showing an example of an artwork pattern of a functional block after a countermeasure against EM to which the automatic placement and routing method is applied.

FIG. 9 is a flowchart showing an example of a second conventional automatic placement and routing method.

[Explanation of symbols]

 1, 101 Circuit connection information 2 Automatic arrangement and wiring information 3, 102 Automatic arrangement and wiring result 4, 104 Output load capacitance 5 Table 6 Operating frequency 7 Control information 20 P-channel transistor 21, 22, 31, 32 Reinforcement pattern 30 N-channel transistor 41 Rewiring information IV1, IV2 Inverter W1 Wiring

Claims (5)

[Claims] An automatic placement and routing is executed by reading circuit connection information describing connection information between each functional block and automatic placement and routing information defining permission / non-permission of placement and routing necessary for execution of the automatic placement and routing. An automatic placement and routing step of outputting an automatic placement and routing result, and determining the presence / absence of unconnected wiring and the presence / absence of contact between the wirings in the automatic placement and routing result to determine whether the automatic placement and routing has converged or not converged. A determination step of outputting, and a rewiring step of performing automatic wiring again by controlling the control information describing a range designation and an execution procedure when rewiring when the convergence is not converged in the determination step and updating the automatic placement and routing result; and In the automatic placement and routing method which is terminated when the pre-determination result converges, the actual placement between the functional blocks is determined from the automatic placement and routing result after the determination step. Capacitance extraction step of calculating the length and outputting the sum of the input terminal capacitance of the next stage connected to the capacitance by the wiring as the output load capacitance; and The artwork pattern that satisfies the current density limit standard, which is the standard of the current density limit value corresponding to the electromigration, for each of the functional blocks from the measure pattern table and the operation frequency in which the parameters of the measure artwork pattern are tabulated. A pattern changing step of determining a countermeasure pattern that is the current pattern and changing a pre-change pattern that is the current artwork pattern of each functional block to the countermeasure pattern. 2. The method according to claim 1, wherein the step of changing the pattern includes the step of changing the current density of the conductor constituting the pattern according to the countermeasure pattern information read from the countermeasure pattern table, with the margin being the smallest or exceeding the current density limit standard. 2. The automatic placement and routing method according to claim 1, further comprising a reinforcing pattern adding step of adding a predetermined reinforcing pattern to the previous pattern so as to satisfy the current density limitation standard. 3. The method according to claim 2, wherein the pattern changing step includes the step of changing the current density of the current pattern constituting the pattern according to the countermeasure pattern information read from the countermeasure pattern table with respect to the current pattern having the largest margin with respect to the current density limit standard. 2. The automatic placement and routing method according to claim 1, further comprising a reinforcing pattern deleting step of deleting an excessive reinforcing pattern so as to satisfy a density limitation standard. 4. The automatic placement and routing method according to claim 1, wherein the step of extracting the output load capacitance is performed by using an actual wiring length of the automatic placement and routing result. 5. The automatic arrangement according to claim 1, wherein the countermeasure pattern table specifies the countermeasure pattern based on a correlation between the current density and the operating frequency with the output load capacity as a parameter. Wiring method.