JPH11103429A - Image data decoding device and on-screen display data updating method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten the time for writing updating data to a memory when a part of OSD data is updated at random in an image data decoding device. SOLUTION: When OSD data is generated, a CPU 5 reads font bit map data from a front ROM 6, develops it in a first memory 2 once, then transmits it to a videocorder 3 so as to store it in the second memory 4. The storing address of bit map data in the first memory 2 or the second memory 4 is transmitted from CPU with an address bus 8. When a part of OSD data is updated, random access is performed as against the second memory 4. In this case, the address is designated by word unit but the address is synchronized with updating data and transmitted with the address bus 8.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an apparatus and a method for decoding image data, and more particularly, to increasing an update speed when an on-screen display (OSD) screen is randomly updated. About technology.

[0002]

2. Description of the Related Art Television image signals are converted to MPEG (M
oving Picture Experts Gro
Up and the like, a system for compressing and encoding data by using an encoding technique and transmitting, recording, or reproducing the data is becoming widespread.

In the above-described system, a decoding device for image data is required on the receiving side or the reproducing side. And
As this image data decoding device, one having an OSD function has been proposed.

FIG. 2 shows a configuration example of an image data decoding device having an OSD function. This image data decoding device includes:
A demultiplexer 1 connected to each other by a bus 9;
It includes a video decoder 3, a CPU 5, and a font ROM 6. The demultiplexer 1 has, for example, DRA
M is connected to the first memory 2, and the video decoder 3 is connected to the second memory 4, for example, a DRAM.
Is connected.

In FIG. 1, video data input to a demultiplexer 1 is temporarily stored in a predetermined area (video data storage area) in a first memory 2 and video data of a desired channel is selected. The data is transmitted to the video decoder 3 via the bus 9. Video decoder 3
Is decoded using the second memory 4.

When generating predetermined OSD data, the CPU 5 reads out bitmap data of a font corresponding to the OSD from the font ROM 6 for each character, sends the read bitmap data to the demultiplexer 1 via the bus 9, and outputs the first The data is developed in a predetermined area (OSD data storage area) of the memory 2. Next, the CPU 5 reads the bitmap data from the first memory 2, sends the bitmap data from the demultiplexer 1 to the video decoder 3 via the bus 9, and stores the bitmap data in the second memory 4. At this time, the storage address of the bitmap data in the first memory 2 or the second memory 4 is sent from the CPU 5 to the demultiplexer 1 or the video decoder 3 via the bus 9. At the time of this address designation, only the head address is sent once, and for the subsequent burst data transfer, the address is automatically incremented in the demultiplexer 1 or the video decoder 3.

[0007]

When a part of the OSD data is updated, random access is performed to the second memory 4, so that the address must be specified in word units. Therefore, the address is sent many times in word units, and it takes time to write the update data. To use the method of sending only the start address and automatically incrementing the subsequent addresses, OSD
Even when updating part of the data, it is necessary to send update data for the entire OSD screen.

The present invention has been made in view of the above problems, and has been made in consideration of the above-described problems, and has been made in consideration of the above-described circumstances. An apparatus and method are provided.

[0009]

An image data decoding apparatus according to the present invention comprises: decoding means for decoding compression-encoded image data; storage means connected to the image data decoding means; A signal generating means for generating data; an address bus connected between the decoding means and the signal generating means; and a data bus connected between the decoding means and the signal generating means. Things.

OS of the image data decoding apparatus according to the present invention
The method of updating D data includes a step of storing, when randomly updating OSD data in an image data decoding device having an OSD function, a storage device used when the image data decoding device decodes compression-encoded image data. On the other hand, the OSD data to be updated and the address of the storage means for storing the OSD data are transmitted in parallel via independent buses.

According to the present invention, when a part of the OSD data is updated at random, the update data is transmitted via the data bus, and the storage address of the update data is transmitted simultaneously with the update data via the address bus. Therefore, the time for writing the update data to the storage means can be reduced.

[0012]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram showing a configuration of an image data decoding apparatus to which the present invention is applied. Here, portions corresponding to those in FIG. 2 are denoted by the same reference numerals as those used in FIG.

The image data decoding apparatus includes a demultiplexer 1 connected to a data bus 7 and an address bus 8, a video decoder 3, a CPU 5, and a font ROM 6. A first memory 2 composed of, for example, a DRAM is connected to the demultiplexer 1, and a second memory 4 composed of, for example, a DRAM is connected to the video decoder 3.

In FIG. 1, video data input to a demultiplexer 1 is temporarily stored in a predetermined area (video data storage area) in a first memory 2, and video data of a desired channel is selected. The data is transmitted to the video decoder 3 via the data bus 7. The video data transmitted to the video decoder 3 is decoded using the second memory 4.

When generating predetermined OSD data, the CPU 5 reads out bitmap data of a font corresponding to the OSD from the font ROM 6 for each character, sends the data to the demultiplexer 1 via the data bus 7, and In a predetermined area of the memory 2 (OSD data storage area). Next, the CPU 5 reads the bitmap data from the first memory 2, sends the bitmap data from the demultiplexer 1 to the video decoder 3 via the data bus 7, and stores the data in the second memory 4. At this time, the storage address of the bitmap data in the first memory 2 or the second memory 4 is C
Demultiplexer 1 from PU 5 via address bus 8
Alternatively, it is sent to the video decoder 3. At the time of this address designation, only the head address is sent once, and for the subsequent burst data transfer, the address is automatically incremented in the demultiplexer 1 or the video decoder 3.

Further, when a part of the OSD data is updated, random access to the second memory 4 is performed. In this case, the address is specified in word units, and this address is transmitted via the address bus 8 in synchronization with the update data. For this reason, the second memory 4 is different from the conventional device in which addresses and data are transmitted through a common bus.
And the time for writing the update data to the data can be reduced.

[0018]

As described above in detail, according to the present invention, when a part of the OSD screen is updated at random, the update data and its address are transmitted through independent buses, so that the update data is written. You can save time. As a result, the update speed of the OSD data can be increased.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an image data decoding device to which the present invention has been applied.

FIG. 2 is a block diagram illustrating a configuration of a conventional image data decoding device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Demultiplexer, 2 ... 1st memory, 3 ... Video decoder, 4 ... Second memory, 5 ... CPU, 6 ... Font ROM, 7 ... Data bus, 8 ... Address bus.

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Claims (3)

[Claims] A decoding means for decoding compression-encoded image data; a storage means connected to the image data decoding means; a signal generation means for generating on-screen display data; An image data decoding apparatus comprising: an address bus connected between the decoding unit and the signal generation unit; and a data bus connected between the decoding unit and the signal generation unit. 2. The image data decoding device according to claim 1, further comprising means for selecting compression-encoded image data of a desired channel, further connected to said bus. 3. An image data decoding device having an on-screen display function, when the on-screen display data is updated at random, the image data decoding device decodes the compression-encoded image data. An on-screen display for transmitting on-screen display data to be updated and an address of the storage means for storing the updated on-screen display data in parallel on an independent bus to a storage means used for the conversion. -Data update method.