JPH1093251A - Method of machining multilayer printed board - Google Patents

Method of machining multilayer printed board

Info

Publication number
JPH1093251A
JPH1093251A JP8260174A JP26017496A JPH1093251A JP H1093251 A JPH1093251 A JP H1093251A JP 8260174 A JP8260174 A JP 8260174A JP 26017496 A JP26017496 A JP 26017496A JP H1093251 A JPH1093251 A JP H1093251A
Authority
JP
Japan
Prior art keywords
insulating layer
guide piece
multilayer printed
height
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8260174A
Other languages
Japanese (ja)
Inventor
Toshihisa Uehara
利久 上原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AIREX KK
Original Assignee
AIREX KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AIREX KK filed Critical AIREX KK
Priority to JP8260174A priority Critical patent/JPH1093251A/en
Publication of JPH1093251A publication Critical patent/JPH1093251A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a method of machining a multilayer printed board on which highly precise cutting can be conducted by a simple structure, without being affected by the variation in thickness of insulating resin. SOLUTION: In a multilayer printed board 1, the thickness of an insulating layer is measured, the part smaller than the center part of a rectangular part 111 of the insulating layer 3 is scraped off the depth shallower than the upper surface 21A of a guide piece 2A. After an insulating resin layer in only a slight thickness has been left on the upper surface 21A, the insulating resin layer on the guide piece 2A is removed by burning by projecting a laser beam, and the upper surface 21A of the guide piece 2A is exposed. Then, the scraping margin of the insulating layer 3 is measured, using the upper surface 21A of the guide piece 2A as the reference surface, the rectangular part 111 is scraped by a drill pit 15 using the upper surface 21A of the exposed guide piece 2A as the reference surface. The upper surface 21 of the internal layer circuit 2, ranging over the entire area of the rectangular part 111, is exposed.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、多層プリント基板
上にICベアチップ即ちLSIチップを表面実装するた
めの多層プリント基板の加工方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of processing a multilayer printed board for surface mounting an IC bare chip, that is, an LSI chip, on the multilayer printed board.

【0002】[0002]

【従来の技術】従来、電子機器に用いられる基板におい
て、電子機器の小型化や薄型化等の要求に応えるため、
様々な形状並びに構造のLSIパッケージ並びに多層プ
リント基板が案出されている。例えば、LSIパッケー
ジについては、ピン数の多いLSIパッケージの主流と
してはプラスチックQFP(quad flat package )が用
いられているが、ピン数を増加させることに限界があっ
た。そこで、上記プラスチックQFPに代えて、裏面に
多数のピンをアレイ状に配置した表面実装型のLSIパ
ッケージが用いられるようになってきた。表面実装型L
SIパッケージとして一例を挙げると、多層プリント基
板の裏面に球状のハンダをアレイ状に配置して入出力端
子を形成し、ICベアチップ(LSIチップ)を多層プ
リント基板の表面上に載置して樹脂で封止して成るBG
A(ball grid array )が用いられている。
2. Description of the Related Art Conventionally, in order to meet the demands for smaller and thinner electronic devices, substrates used in electronic devices have been developed.
LSI packages and multilayer printed boards of various shapes and structures have been devised. For example, as for an LSI package, a plastic QFP (quad flat package) is used as a mainstream of the LSI package having a large number of pins, but there is a limit in increasing the number of pins. Therefore, instead of the plastic QFP, a surface mount type LSI package having a large number of pins arranged in an array on the back surface has come to be used. Surface mount type L
As an example of an SI package, spherical solder is arranged in an array on the back surface of a multilayer printed circuit board to form input / output terminals, and an IC bare chip (LSI chip) is placed on the surface of the multilayer printed circuit board to form a resin. BG sealed with
A (ball grid array) is used.

【0003】BGAは、一例として図7に示すように、
多層プリント基板aの裏面に球状のハンダをアレイ状に
配置して成る入出力端子bを設け、多層プリント基板a
の表面にICベアチップ(LSIチップ)cを載置し、
入出力端子bに接続された導体(リード)dと、ICベ
アチップcとをボンディング・ワイヤeで接続し、外周
の導体dをソルダ・レジストfで覆い、全体を樹脂から
成る封止剤gで封止している。以上、LSIパッケージ
についてのみ述べてきたが、ICベアチップを実装する
通常の多層プリント基板においても、同様の構成を備え
ている。
A BGA is, for example, as shown in FIG.
On the back surface of the multilayer printed circuit board a, input / output terminals b formed by arranging spherical solders in an array are provided.
Place an IC bare chip (LSI chip) c on the surface of
The conductor (lead) d connected to the input / output terminal b and the IC bare chip c are connected with a bonding wire e, the outer conductor d is covered with a solder resist f, and the whole is covered with a sealing agent g made of resin. It is sealed. Although only the LSI package has been described above, a general multilayer printed circuit board on which an IC bare chip is mounted has a similar configuration.

【0004】多層プリント基板のICベアチップを実装
する部位を削り出す手段として、一般に機械加工が用い
られているが、絶縁性樹脂の厚さが一定ではないため
に、樹脂表面から内層回路までの深さが変化することに
なり、削り過ぎ、或いは削り残しを生じるという問題が
あった。この問題を解決するための手段が提案されてお
り、例えば図8に示すように、内層回路hと、外側に設
けた外層回路jと、両回路h,jの間に設けられた絶縁
層kとを備えた多層プリント基板aにおいて、多層プリ
ント基板aの外表面mの高さwを測定した後、設計値ま
たは試し加工等で得られた多層プリント基板aの外表面
mから内層回路hの外表面nまでの深さsを、上記実測
面である多層プリント基板aの外表面mを基準面として
座ぐり加工により切削することが行われている。また、
特開昭63−245995号公報に記載されたものは、ドリルピ
ットと内層回路との接触により、両者が通電状態になる
電気回路を設けて、内層回路の表面高さ即ち切削深さを
検知し、座ぐり加工により切削している。さらに、主軸
支持機構に支持された座ぐり用ドリルビットと、主軸支
持機構の主軸の送り方向に向けて移動可能のプローブと
を備え、このプローブに高周波電流を印加して多層プリ
ント基板の内層回路に渦電流を発生させ、発生した渦電
流による高周波磁界を検出し、検出された高周波磁界の
強さに基づき前記ドリルビットと前記内層回路の表面と
の間の距離を算出し、この算出値に基づいて前記主軸の
送り量を制御するものが知られている。
[0004] As a means for shaving the portion of the multilayer printed circuit board on which the IC bare chip is mounted, machining is generally used. However, since the thickness of the insulating resin is not constant, the depth from the resin surface to the inner layer circuit is reduced. Therefore, there is a problem that excessive cutting or uncut cutting occurs. Means for solving this problem have been proposed, for example, as shown in FIG. 8, an inner layer circuit h, an outer layer circuit j provided outside, and an insulating layer k provided between both circuits h and j. After measuring the height w of the outer surface m of the multilayer printed circuit board a, the design value or the outer surface m of the multilayer printed circuit board a obtained by trial processing, etc. The depth s up to the outer surface n is cut by spot facing using the outer surface m of the multilayer printed circuit board a, which is the actually measured surface, as a reference surface. Also,
Japanese Unexamined Patent Publication No. 63-245995 discloses an electric circuit in which a drill pit and an inner layer circuit are brought into a conductive state by contact between the drill pit and the inner layer circuit, and detects the surface height of the inner layer circuit, that is, the cutting depth. It is cut by spot facing. Furthermore, a counterbore drill bit supported by the spindle support mechanism and a probe movable in the feed direction of the spindle of the spindle support mechanism are provided, and a high-frequency current is applied to the probe so that the inner layer circuit of the multilayer printed circuit board is provided. An eddy current is generated, a high-frequency magnetic field due to the generated eddy current is detected, and a distance between the drill bit and the surface of the inner layer circuit is calculated based on the strength of the detected high-frequency magnetic field. It is known to control the feed amount of the spindle based on the above.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上記従
来の多層プリント基板の加工方法においては、特別な計
測装置が必要で高価になるとともに、多層プリント基板
の外表面の平滑性が十分でないことが多く、高精度で内
層回路を削りだすことが困難であるという問題があっ
た。また、過電流を用いて計測するものにおいては、特
殊な装置を必要として切削機械装置が高価になるととも
に、多層プリント基板の内層ボンディング端子回路の形
状によって発生する渦電流に強弱が生じて渦電流による
高周波磁界が変化し、検出された高周波磁界の強さに変
動が生じて、算出するドリルビットと被切削部との距離
が正確に測定できない恐れがあるという問題があった。
さらに、多層プリント基板の表面側にも銅箔等で外層
ボンディング端子回路が形成されているために、外層ボ
ンディング端子回路にも渦電流が発生して高周波磁界が
発生する恐れがあり、内層ボンディング端子回路で発生
する高周波磁界に干渉することになって、ドリルビット
と被切削部との距離が正確に測定できない恐れがあると
いう問題があった。
However, the conventional method for processing a multilayer printed circuit board requires a special measuring device and is expensive, and the outer surface of the multilayer printed circuit board often has insufficient smoothness. However, there is a problem that it is difficult to cut out the inner layer circuit with high accuracy. In the case of measurement using overcurrent, a special machine is required and the cutting machine becomes expensive, and the eddy current generated by the shape of the inner layer bonding terminal circuit of the multilayer printed circuit board becomes strong and weak, so that eddy current is generated. As a result, there is a problem that the distance between the drill bit to be calculated and the portion to be cut may not be accurately measured.
Furthermore, since the outer layer bonding terminal circuit is also formed of copper foil or the like on the front side of the multilayer printed circuit board, an eddy current may also be generated in the outer layer bonding terminal circuit and a high-frequency magnetic field may be generated. There is a problem that the distance between the drill bit and the part to be cut may not be accurately measured due to interference with the high-frequency magnetic field generated in the circuit.

【0006】本発明の目的は、絶縁性樹脂の厚さの変動
による影響を受けずに、簡単な構成で、高精度の切削加
工を行うことを可能とする多層プリント基板の加工方法
を提供することである。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method of processing a multilayer printed circuit board capable of performing high-precision cutting with a simple structure without being affected by fluctuations in the thickness of an insulating resin. That is.

【0007】[0007]

【課題を解決するための手段】上記目的を達成するため
に本発明の多層プリント基板の加工方法は、ICベアチ
ップを表面実装するプリント基板の加工方法であって、
絶縁層の外表面の高さを測定した後、内部回路の上面よ
りも僅かに高い位置まで機械加工で削り出して凹部を形
成し、その後該凹部内にレーザ光を照射して内部回路の
上面に残留した絶縁層を除去し、凹部内に露出した内部
回路の上面の高さを測定した後、内部回路の上面の高さ
を加工の基準面とし、該基準面から絶縁層の外表面位置
までの絶縁層を削ることにより、絶縁性樹脂層の厚さの
バラツキの影響を受けること無く、削りだす部分の中央
位置で内層回路の上面高さを測定できるから、露出させ
る回路位置に近い場所で測定でき、精度を高くすること
ができる。また、削りだし加工機に特別な構成を必要と
せず、絶縁性樹脂層を設けるに当たって特別な加工精度
を必要としないものである。ICベアチップを表面実装
するプリント基板の加工方法であって、実装位置の略中
央に、内層回路と同じ厚さの金属製のガイド片を配設
し、絶縁層の外表面の高さを測定した後、内部回路の上
面即ちガイド片の上面よりも僅かに高い位置まで機械加
工で削り出して凹部を形成し、その後該凹部内にレーザ
光を照射してガイド片の上に残留した絶縁層を除去し、
凹部内に露出したガイド片の上面の高さを測定した後、
ガイド片の上面の高さを加工の基準面とし、該基準面か
ら絶縁層の外表面位置までの絶縁層を削ることにより、
絶縁性樹脂層の厚さのバラツキの影響を受けること無
く、削りだす部分の中央位置で内層回路と等しい厚さの
ガイド片の上面高さを測定できるから、露出させる回路
位置に近い場所で測定でき、精度を高くすることができ
る。また、削りだし加工機に特別な構成を必要とせず、
絶縁性樹脂層を設けるに当たって特別な加工精度を必要
としないものである。さらに、ガイド片を設けることに
よって、実装位置の略中央にレーザ光を照射すれば良い
ことになり、レーザ光の照射位置の決定が容易で、照射
による除去工程に要する時間も短縮できる。
In order to achieve the above object, a method for processing a multilayer printed circuit board according to the present invention is a method for processing a printed circuit board on which IC bare chips are surface-mounted.
After measuring the height of the outer surface of the insulating layer, the recess is formed by machining to a position slightly higher than the upper surface of the internal circuit to form a concave portion, and then the laser light is irradiated into the concave portion to form a concave portion. After removing the insulating layer remaining in the concave portion and measuring the height of the upper surface of the internal circuit exposed in the concave portion, the height of the upper surface of the internal circuit is used as a reference surface for processing, and the outer surface position of the insulating layer from the reference surface is determined. By cutting the insulating layer up to, the upper surface height of the inner layer circuit can be measured at the center position of the part to be cut out without being affected by the variation in the thickness of the insulating resin layer, so the place close to the circuit position to be exposed And the accuracy can be increased. In addition, no special configuration is required for the shaving machine, and no special processing accuracy is required for providing the insulating resin layer. This is a method of processing a printed circuit board on which an IC bare chip is surface-mounted, and a metal guide piece having the same thickness as the inner layer circuit is disposed at substantially the center of the mounting position, and the height of the outer surface of the insulating layer is measured. Thereafter, the upper surface of the internal circuit, that is, a portion slightly higher than the upper surface of the guide piece is cut out by machining to form a recess, and then the insulating layer remaining on the guide piece is irradiated with laser light in the recess. Remove,
After measuring the height of the upper surface of the guide piece exposed in the recess,
By setting the height of the upper surface of the guide piece as a reference plane for processing, and shaving the insulating layer from the reference plane to the outer surface position of the insulating layer,
It is possible to measure the top surface height of the guide piece with the same thickness as the inner layer circuit at the center position of the part to be cut without being affected by the variation in the thickness of the insulating resin layer, so it is measured near the exposed circuit position Accuracy can be improved. Also, there is no need for a special configuration for the cutting machine,
No special processing accuracy is required for providing the insulating resin layer. Further, by providing the guide pieces, it is sufficient to irradiate the laser light to the approximate center of the mounting position, so that the irradiation position of the laser light can be easily determined and the time required for the removal step by irradiation can be shortened.

【0008】[0008]

【発明の実施の形態】本発明の実施例を図面を参照して
説明する。図6において、本発明の加工方法を適用して
製作した多層プリント基板について説明する。多層プリ
ント基板1の基板1Aの一側面に内層回路2を予め形成
し、その上に絶縁層となる樹脂層3を適宜位置に設け
て、内層回路2の導体部分であるパッド20を露出させ、
他の部分を樹脂などの絶縁層3で被覆する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described with reference to the drawings. FIG. 6 illustrates a multilayer printed circuit board manufactured by applying the processing method of the present invention. An inner layer circuit 2 is previously formed on one side surface of the substrate 1A of the multilayer printed board 1, and a resin layer 3 serving as an insulating layer is provided at an appropriate position thereon to expose a pad 20 which is a conductor portion of the inner layer circuit 2,
The other part is covered with an insulating layer 3 such as a resin.

【0009】ICベアチップ4を、本実施例では対向し
て配設されている内層回路2のパッド20の間に載置し、
ボンディングワイヤ5を用いてICベアチップ4とパッ
ド20とをボンディング接続する。なお、内層回路2のパ
ッド20は、ICベアチップを挟んで両側に対向して設け
られたものに限定されるわけではなく、ICベアチップ
の全周或いは三方を囲むように、或いは一方に設けても
良いことは当然である。
In this embodiment, the IC bare chip 4 is placed between the pads 20 of the inner layer circuit 2 which is arranged to face each other.
The IC bare chip 4 and the pad 20 are connected by bonding using the bonding wire 5. Note that the pads 20 of the inner layer circuit 2 are not limited to those provided on both sides of the IC bare chip so as to be opposed to each other. The good is natural.

【0010】ICベアチップ4の周囲に絶縁層3の厚さ
による段差が形成されて流れ防止ダムとなり、ICベア
チップ4を載置した部分を覆って樹脂等の封止剤6が流
し込まれる際に、不要な部分にまで封止剤6が流出する
ことを防止する。ICベアチップ4を載置した部分を覆
う封止剤6が流し込まれ、ICベアチップ4とボンディ
ングワイヤ5及びパッド20を封止剤6で被覆して保護し
ている。絶縁層3の外側面と内層回路2とを接続するた
めに、絶縁層3の所定位置にバイアホール7を絶縁層3
を貫通して穿設し、内層回路2をバイアホール7内にお
いて露出させた後、メッキ70によってバイアホール7内
の内層回路2と絶縁層3の外側面とを電気的に接続し、
絶縁層3の外側面でメッキ70に接続された外側回路71が
設けられている。
A step due to the thickness of the insulating layer 3 is formed around the IC bare chip 4 to form a flow prevention dam. When the sealing agent 6 such as resin is poured over the portion where the IC bare chip 4 is mounted, This prevents the sealant 6 from flowing out to unnecessary parts. The sealant 6 covering the portion where the IC bare chip 4 is mounted is poured in, and the IC bare chip 4, the bonding wires 5 and the pads 20 are covered and protected by the sealant 6. In order to connect the outer surface of the insulating layer 3 and the inner layer circuit 2, via holes 7 are formed at predetermined positions of the insulating layer 3.
After the inner circuit 2 is exposed in the via hole 7, the inner circuit 2 in the via hole 7 and the outer surface of the insulating layer 3 are electrically connected by plating 70,
An outer circuit 71 connected to the plating 70 on the outer surface of the insulating layer 3 is provided.

【0011】外側回路71は、絶縁層3の外側面におい
て、電子部品等に接続する外部パッド72を備えており、
外部パッド72と、別に絶縁層3の外側面に設けられた電
子部品実装用パッド73とに電子部品8の脚をハンダ付け
する。なお、本実施例においては、多層プリント基板の
一側面にのみICベアチップを設けたものについて述べ
てきたが、多層プリント基板の両側面に、それぞれ内層
回路を設け、上記実施例と同様にしてICベアチップを
設けることができることは勿論である。また、上記電子
部品8に代えて、ICベアチップを接続することもでき
る。
The outer circuit 71 has external pads 72 on the outer surface of the insulating layer 3 for connecting to electronic components and the like.
The legs of the electronic component 8 are soldered to the external pad 72 and the electronic component mounting pad 73 separately provided on the outer surface of the insulating layer 3. In the present embodiment, the case where the IC bare chip is provided only on one side surface of the multilayer printed circuit board has been described. However, the inner layer circuits are provided on both side surfaces of the multilayer printed circuit board, respectively. Of course, a bare chip can be provided. Further, instead of the electronic component 8, an IC bare chip can be connected.

【0012】図1乃至図5を参照して本発明の加工方法
の一例について説明する。図2において、多層プリント
基板1の基板1Aの表面に、部品実装に合わせた導体回
路である内層回路2及び実装位置である矩形部分111 の
略中央に内層回路2と同じ高さのガイド片2Aをエッチ
ング加工等によって形成した後、その上から絶縁層とな
る樹脂を塗布して基板1Aの全面に絶縁層3を形成し、
エッチング加工により絶縁層3の外表面30上に回路形成
を行い、外層回路71、外部パッド72、電子部品実装用パ
ッド73等を設けて形成された多層プリント基板1におい
て、絶縁層3の厚さH、即ち絶縁層3の外表面30と絶縁
層3の内表面(基板1Aの外表面)31との間の距離Hを
測定する。
An example of the processing method of the present invention will be described with reference to FIGS. In FIG. 2, an inner layer circuit 2 which is a conductor circuit adapted to component mounting and a guide piece 2A having the same height as the inner layer circuit 2 are provided substantially at the center of a rectangular portion 111 which is a mounting position on the surface of a substrate 1A of a multilayer printed circuit board 1. Is formed by etching or the like, and then a resin serving as an insulating layer is applied thereon to form an insulating layer 3 over the entire surface of the substrate 1A.
A circuit is formed on the outer surface 30 of the insulating layer 3 by etching, and the thickness of the insulating layer 3 in the multilayer printed board 1 formed by providing the outer layer circuit 71, the external pad 72, the pad 73 for mounting electronic components, and the like. H, that is, the distance H between the outer surface 30 of the insulating layer 3 and the inner surface 31 of the insulating layer 3 (the outer surface of the substrate 1A) is measured.

【0013】図3において、ICベアチップ4を載置す
る矩形部分111 内において、矩形部分111 の略中央を含
んでそれよりも小さい範囲を、露出させたい内層回路2
の上面21及びガイド片2Aの上面21Aよりも浅い深さ
で、絶縁層3を外表面30側から座ぐり加工装置のドリル
ピット15により削り出し、ガイド片2Aの上面21Aの上
に絶縁樹脂層を僅かに厚さtだけ残留させて予備凹所16
を形成する。ここで、絶縁樹脂層の残留厚さtは、零よ
り大きな適宜の値で良いものであるが、ガイド片2Aの
上面21Aと絶縁層3の外表面30との間の距離の1/2以
下にすると良い。
In FIG. 3, in the rectangular portion 111 on which the IC bare chip 4 is mounted, a smaller area including the approximate center of the rectangular portion 111 is to be exposed.
The insulating layer 3 is cut out from the outer surface 30 by the drill pit 15 of the counterbore processing device at a depth shallower than the upper surface 21 of the guide piece 2A and the upper surface 21A of the guide piece 2A. With a slight thickness t, and
To form Here, the residual thickness t of the insulating resin layer may be an appropriate value larger than zero, but is not more than の of the distance between the upper surface 21A of the guide piece 2A and the outer surface 30 of the insulating layer 3. It is good to

【0014】次に、図4に示すように、レーザ光照射装
置17からレーザ光Rを、上記削り出した予備凹所16内に
照射するものであるが、予備凹所16内の底面の下にガイ
ド片2Aが存在している部位、即ち略中央部に照射し
て、ガイド片2Aの上の残留絶縁樹脂層を焼失させて除
去し、予備凹所16内に位置するガイド片2Aの上面21A
を露出させる。なお、レーザ光照射装置としては、ガイ
ド片2Aを損傷させることなく絶縁樹脂層のみを焼失さ
せるようにしてある。露出したガイド片2Aの上面21A
を削り出し測定基準面として、該上面21Aの高さを測定
する(図5参照)ことにより、ガイド片2Aの上方、即
ち内層回路2の上方に位置する絶縁層3の削り代を正確
に測定できる。次に、図1に示すように、露出したガイ
ド片2Aの上面21Aを削り出し測定基準面として、ドリ
ルピット15で矩形部分111 全体の削り出し加工を行い、
矩形部分111 全体にわたって内層回路2の上面21を露出
させ、ICベアチップ4を載置する矩形部分111 を形成
する。
Next, as shown in FIG. 4, a laser beam R is radiated from the laser beam irradiating device 17 into the cut-out preliminary recess 16. Irradiation is performed on the portion where the guide piece 2A is located, that is, substantially at the center, to burn off and remove the residual insulating resin layer on the guide piece 2A. 21A
To expose. Note that the laser beam irradiation device burns off only the insulating resin layer without damaging the guide piece 2A. The upper surface 21A of the exposed guide piece 2A
By measuring the height of the upper surface 21A as a measurement reference plane (see FIG. 5), the amount of shaving of the insulating layer 3 located above the guide piece 2A, that is, above the inner layer circuit 2 is accurately measured. it can. Next, as shown in FIG. 1, the entire upper surface 21A of the exposed guide piece 2A is cut out and the whole rectangular portion 111 is cut out by the drill pit 15 as a measurement reference plane.
The upper surface 21 of the inner layer circuit 2 is exposed over the entire rectangular portion 111 to form a rectangular portion 111 on which the IC bare chip 4 is mounted.

【0015】上記構成によると、内層回路2の上面21に
絶縁樹脂層のみを焼失させるレーザ光Rを照射するもの
であるから、該上面21より深く削られることは無く、ま
た、小さい範囲で良いから僅かの照射量で済むものであ
る。また、レーザ光Rを照射することにより、容易に且
つ高い精度をもって必要な範囲の絶縁層3を除去し、内
層回路2の上面21を確実に露出させることができるか
ら、機械加工を行う基準面(削り出し測定基準面)とし
て内層回路2の上面21を採用することができ、内層回路
2の上面21の高さ位置を測定確認することによって、絶
縁層3の厚さのバラツキ及び絶縁層3の外表面の凹凸等
に左右されること無く、削り代を正確に定めることがで
き、精度の高い削り出し加工を行うことができる。ま
た、予備凹所16は実装位置の矩形部分111 よりも小さい
面積であるから、高精度の切削は要求されず、簡単且つ
速やかに削ることができる。さらに、削りだし加工機に
特別な構成を必要とせず、絶縁性樹脂層を設けるに当た
って特別な加工精度を必要としないものである。
According to the above configuration, since the upper surface 21 of the inner circuit 2 is irradiated with the laser beam R for burning off only the insulating resin layer, the upper surface 21 is not cut deeper than the upper surface 21 and a small range is sufficient. A small irradiation dose is required. Further, by irradiating the laser beam R, the insulating layer 3 in a necessary range can be easily and highly accurately removed, and the upper surface 21 of the inner layer circuit 2 can be reliably exposed. The upper surface 21 of the inner layer circuit 2 can be employed as a (measurement measurement reference surface). By measuring and confirming the height position of the upper surface 21 of the inner layer circuit 2, the thickness variation of the insulating layer 3 and the insulating layer 3 The shaving allowance can be accurately determined without being affected by the irregularities on the outer surface of the steel sheet, and a highly accurate shaving process can be performed. In addition, since the preliminary recess 16 has an area smaller than the rectangular portion 111 at the mounting position, high-precision cutting is not required, and simple and quick cutting can be performed. Further, no special configuration is required for the shaving machine, and no special processing accuracy is required for providing the insulating resin layer.

【0016】なお、上記実施例においては、内層回路と
同じ厚さのガイド片を設けたものについてのみ述べてい
るが、ガイド片を設けること無く、内層回路だけでも良
いものであり、この場合、実装位置の内層回路が下に存
在する位置(通常は、実装位置の周辺部)を削って予備
凹所を形成し、予備凹所の底部にレーザ光を照射しても
良いものである。この構成によると、ガイド片を設ける
必要が無く、一層簡単な構成で、絶縁層の厚さのバラツ
キ及び絶縁層の外表面の凹凸等に左右されること無く、
削り代を正確に定めることができ、精度の高い削り出し
加工を行うことができる。
In the above embodiment, only the case where the guide piece having the same thickness as that of the inner layer circuit is provided is described. However, only the inner layer circuit may be provided without providing the guide piece. A position where the inner layer circuit at the mounting position is located below (usually, a peripheral portion of the mounting position) may be shaved to form a preliminary recess, and the bottom of the preliminary recess may be irradiated with laser light. According to this configuration, there is no need to provide a guide piece, and with a simpler configuration, without being affected by variations in the thickness of the insulating layer and irregularities on the outer surface of the insulating layer,
The cutting allowance can be accurately determined, and high-precision cutting can be performed.

【0017】[0017]

【発明の効果】本発明は上述のとおり構成されているか
ら、以下に述べるとおりの効果を奏する。絶縁層の外表
面の高さを測定した後、内部回路の上面よりも僅かに高
い位置まで機械加工で削り出して凹部を形成し、その後
該凹部内にレーザ光を照射して内部回路の上面に残留し
た絶縁層を除去し、凹部内に露出した内部回路の上面の
高さを測定した後、内部回路の上面の高さを加工の基準
面とし、該基準面から絶縁層の外表面位置までの絶縁層
を削ることにより、絶縁性樹脂層の厚さのバラツキの影
響を受けること無く、削りだす部分の中央位置で内層回
路の上面高さを測定できるから、露出させる回路位置に
近い場所で測定でき、精度を高くすることができる。ま
た、削りだし加工機に特別な構成を必要とせず、絶縁性
樹脂層を設けるに当たって特別な加工精度を必要としな
いものである。また、実装位置の略中央に、内層回路と
同じ厚さの金属製のガイド片を配設し、絶縁層の外表面
の高さを測定した後、内部回路の上面即ちガイド片の上
面よりも僅かに高い位置まで機械加工で削り出して凹部
を形成し、その後該凹部内にレーザ光を照射してガイド
片の上に残留した絶縁層を除去し、凹部内に露出したガ
イド片の上面の高さを測定した後、ガイド片の上面の高
さを加工の基準面とし、該基準面から絶縁層の外表面位
置までの絶縁層を削ることにより、絶縁性樹脂層の厚さ
のバラツキの影響を受けること無く、削りだす部分の中
央位置で内層回路と等しい厚さのガイド片の上面高さを
測定できるから、露出させる回路位置に近い場所で測定
でき、精度を高くすることができる。また、削りだし加
工機に特別な構成を必要とせず、絶縁性樹脂層を設ける
に当たって特別な加工精度を必要としないものである。
さらに、ガイド片を設けることによって、実装位置の略
中央のみにレーザ光を照射すれば良いことになり、レー
ザ光の照射位置の決定が容易で、照射による除去工程に
要する時間も短縮できる。
Since the present invention is configured as described above, it has the following effects. After measuring the height of the outer surface of the insulating layer, the recess is formed by machining to a position slightly higher than the upper surface of the internal circuit to form a concave portion, and then the laser light is irradiated into the concave portion to form a concave portion. After removing the insulating layer remaining in the concave portion and measuring the height of the upper surface of the internal circuit exposed in the concave portion, the height of the upper surface of the internal circuit is used as a reference surface for processing, and the outer surface position of the insulating layer from the reference surface is determined. By cutting the insulating layer up to, the upper surface height of the inner layer circuit can be measured at the center position of the part to be cut out without being affected by the variation in the thickness of the insulating resin layer, so the place close to the circuit position to be exposed And the accuracy can be increased. In addition, no special configuration is required for the shaving machine, and no special processing accuracy is required for providing the insulating resin layer. In addition, a metal guide piece having the same thickness as the inner layer circuit is provided at substantially the center of the mounting position, and the height of the outer surface of the insulating layer is measured. A recess is formed by machining to a slightly higher position to form a recess, and then the laser beam is irradiated into the recess to remove the insulating layer remaining on the guide piece, and the upper surface of the guide piece exposed in the recess is formed. After measuring the height, the height of the upper surface of the guide piece is used as a reference plane for processing, and by shaving the insulating layer from the reference plane to the outer surface position of the insulating layer, the variation in the thickness of the insulating resin layer is reduced. Without being affected, the height of the upper surface of the guide piece having the same thickness as the inner layer circuit can be measured at the center position of the portion to be cut, so that the measurement can be performed at a place close to the exposed circuit position, and the accuracy can be increased. In addition, no special configuration is required for the shaving machine, and no special processing accuracy is required for providing the insulating resin layer.
Further, by providing the guide piece, it is sufficient to irradiate the laser light only at substantially the center of the mounting position, so that the irradiation position of the laser light can be easily determined and the time required for the removal step by irradiation can be shortened.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の多層プリント基板の機械加工方法の
説明図である。
FIG. 1 is an illustration of a method for machining a multilayer printed circuit board according to the present invention.

【図2】 本発明の多層プリント基板の加工方法の説明
図である。
FIG. 2 is an explanatory diagram of a method for processing a multilayer printed circuit board according to the present invention.

【図3】 本発明の多層プリント基板の加工方法の説明
図である。
FIG. 3 is an explanatory diagram of a method for processing a multilayer printed circuit board according to the present invention.

【図4】 本発明の多層プリント基板のレーザ照射によ
る加工方法の説明図である。
FIG. 4 is an explanatory diagram of a method for processing a multilayer printed board by laser irradiation according to the present invention.

【図5】 本発明の多層プリント基板の加工方法の説明
図である。
FIG. 5 is an explanatory diagram of a method for processing a multilayer printed board according to the present invention.

【図6】 本発明を適用した表面実装型LSIパッケー
ジの一例を示す断面図である。
FIG. 6 is a cross-sectional view illustrating an example of a surface-mounted LSI package to which the present invention is applied.

【図7】 従来の表面実装型LSIパッケージの一例を
示す断面図である。
FIG. 7 is a cross-sectional view illustrating an example of a conventional surface mount LSI package.

【図8】 従来の多層プリント基板の加工方法の説明図
である。
FIG. 8 is an explanatory view of a conventional method for processing a multilayer printed circuit board.

【符号の説明】 1 多層プリント基板、2 内層回路、3 絶縁層、4
ICベアチップ 5 ボンディングワイヤ、6 封止剤、7 バイアホー
ル、20 パッド
[Description of Signs] 1 multilayer printed circuit board, 2 inner layer circuit, 3 insulating layer, 4
IC bare chip 5 bonding wire, 6 sealant, 7 via hole, 20 pads

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 ICベアチップを表面実装するプリント
基板の加工方法であって、絶縁層の外表面の高さを測定
した後、内部回路の上面よりも僅かに高い位置まで機械
加工で削り出して凹部を形成し、その後該凹部内にレー
ザ光を照射して内部回路の上面に残留した絶縁層を除去
し、凹部内に露出した内部回路の上面の高さを測定した
後、内部回路の上面の高さを加工の基準面とし、該基準
面から絶縁層の外表面位置までの絶縁層を削ることによ
って、内層回路を露出させることを特徴とする多層プリ
ント基板の加工方法。
1. A method of processing a printed circuit board on which an IC bare chip is surface-mounted, wherein the height of an outer surface of an insulating layer is measured, and then the surface is cut out by machining to a position slightly higher than the upper surface of an internal circuit. After forming a concave portion, the insulating layer remaining on the upper surface of the internal circuit is removed by irradiating the concave portion with laser light, and the height of the upper surface of the internal circuit exposed in the concave portion is measured. A height of the substrate as a reference plane for processing, and exposing the inner layer circuit by shaving the insulating layer from the reference plane to the outer surface of the insulating layer.
【請求項2】 ICベアチップを表面実装するプリント
基板の加工方法であって、実装位置の略中央に、内層回
路と同じ厚さの金属製のガイド片を配設し、絶縁層の外
表面の高さを測定した後、内部回路の上面即ちガイド片
の上面よりも僅かに高い位置まで機械加工で削り出して
凹部を形成し、その後該凹部内にレーザ光を照射してガ
イド片の上に残留した絶縁層を除去し、凹部内に露出し
たガイド片の上面の高さを測定した後、ガイド片の上面
の高さを加工の基準面とし、該基準面から絶縁層の外表
面位置までの絶縁層を削ることによって、内層回路を露
出させることを特徴とする多層プリント基板の加工方
法。
2. A method of processing a printed circuit board on which an IC bare chip is surface-mounted, wherein a metal guide piece having the same thickness as that of an inner layer circuit is disposed substantially at the center of the mounting position. After measuring the height, the upper surface of the internal circuit, that is, a portion slightly higher than the upper surface of the guide piece is cut out by machining to form a concave portion, and then the laser light is irradiated into the concave portion and the concave portion is formed on the guide piece. After removing the remaining insulating layer and measuring the height of the upper surface of the guide piece exposed in the recess, the height of the upper surface of the guide piece is used as a reference plane for processing, and from the reference plane to the outer surface position of the insulating layer. A method for processing a multilayer printed circuit board, comprising: exposing an inner layer circuit by shaving an insulating layer.
JP8260174A 1996-09-10 1996-09-10 Method of machining multilayer printed board Pending JPH1093251A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8260174A JPH1093251A (en) 1996-09-10 1996-09-10 Method of machining multilayer printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8260174A JPH1093251A (en) 1996-09-10 1996-09-10 Method of machining multilayer printed board

Publications (1)

Publication Number Publication Date
JPH1093251A true JPH1093251A (en) 1998-04-10

Family

ID=17344355

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8260174A Pending JPH1093251A (en) 1996-09-10 1996-09-10 Method of machining multilayer printed board

Country Status (1)

Country Link
JP (1) JPH1093251A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007250608A (en) * 2006-03-14 2007-09-27 Element Denshi:Kk Circuit board including hollow part, method for manufacturing the same, method for manufacturing circuit device using the same
WO2021059416A1 (en) * 2019-09-25 2021-04-01 京セラ株式会社 Printed wiring board and manufacturing method for printed wiring board
AT525945A3 (en) * 2022-02-21 2024-03-15 KSG GmbH Method for producing a multilayer printed circuit board with a blind hole contact and multilayer printed circuit board

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61178156A (en) * 1985-02-04 1986-08-09 Sumitomo Bakelite Co Ltd Exposing method of inner layer referential mark on inner layer circuitboard
JPH01246011A (en) * 1988-03-23 1989-10-02 Toshiba Chem Corp Reference hole boring method for multilayer circuit board and device thereof
JPH0414284A (en) * 1990-05-07 1992-01-20 Hitachi Ltd Manufacture of printed wiring board
JPH0435818A (en) * 1990-06-01 1992-02-06 Hitachi Seiko Ltd Drilling of printed circuit board and device therefor
JPH04279094A (en) * 1991-03-07 1992-10-05 Sony Corp Processing method for blind hole
JPH07336055A (en) * 1994-06-06 1995-12-22 Hitachi Seiko Ltd Method and apparatus for laser processing
JPH08130379A (en) * 1994-10-31 1996-05-21 Nec Corp Manufacture of multilayer wiring board

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61178156A (en) * 1985-02-04 1986-08-09 Sumitomo Bakelite Co Ltd Exposing method of inner layer referential mark on inner layer circuitboard
JPH01246011A (en) * 1988-03-23 1989-10-02 Toshiba Chem Corp Reference hole boring method for multilayer circuit board and device thereof
JPH0414284A (en) * 1990-05-07 1992-01-20 Hitachi Ltd Manufacture of printed wiring board
JPH0435818A (en) * 1990-06-01 1992-02-06 Hitachi Seiko Ltd Drilling of printed circuit board and device therefor
JPH04279094A (en) * 1991-03-07 1992-10-05 Sony Corp Processing method for blind hole
JPH07336055A (en) * 1994-06-06 1995-12-22 Hitachi Seiko Ltd Method and apparatus for laser processing
JPH08130379A (en) * 1994-10-31 1996-05-21 Nec Corp Manufacture of multilayer wiring board

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007250608A (en) * 2006-03-14 2007-09-27 Element Denshi:Kk Circuit board including hollow part, method for manufacturing the same, method for manufacturing circuit device using the same
WO2021059416A1 (en) * 2019-09-25 2021-04-01 京セラ株式会社 Printed wiring board and manufacturing method for printed wiring board
JPWO2021059416A1 (en) * 2019-09-25 2021-04-01
US11849546B2 (en) 2019-09-25 2023-12-19 Kyocera Corporation Printed wiring board and manufacturing method for printed wiring board
AT525945A3 (en) * 2022-02-21 2024-03-15 KSG GmbH Method for producing a multilayer printed circuit board with a blind hole contact and multilayer printed circuit board

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