JPH1093135A - Semiconductor light-emitting element - Google Patents
Semiconductor light-emitting elementInfo
- Publication number
- JPH1093135A JPH1093135A JP26357296A JP26357296A JPH1093135A JP H1093135 A JPH1093135 A JP H1093135A JP 26357296 A JP26357296 A JP 26357296A JP 26357296 A JP26357296 A JP 26357296A JP H1093135 A JPH1093135 A JP H1093135A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor region
- light
- junction
- tilting
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 110
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 abstract description 4
- 241001481828 Glyptocephalus cynoglossus Species 0.000 abstract 1
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 5
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、光出力の増大を高水準
に達成することができる半導体発光素子に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device capable of achieving a high level of light output.
【０００２】[0002]
【従来の技術及び発明が解決しようとする課題】図１に
示すようにＰ型半導体領域１とＮ型半導体領域２とを備
え、両半導体領域１、２の界面に形成されるＰＮ接合３
を含む例えばＡｌＧａＡｓ半導体基体４の側面に傾斜面
５を設けたいわゆるメサ構造の半導体発光素子即ち発光
ダイオードは公知である。この半導体発光素子におい
て、半導体基体４の上面（一方の主面）即ちＰ型半導体
領域２の上面の一部にアノード電極６が形成され、半導
体基体４の下面（他方の主面）即ちＮ型半導体領域２の
下面に部分的にカソード電極７が格子状又は点在するよ
うに形成されている。なお、半導体基体４の露出表面は
実質的に鏡面になっており、またＰＮ接合３は傾斜面５
に露出している。図１の半導体発光素子の光取り出し方
向は上方向であり、ＰＮ接合３から上方に放射された光
は、基板４の上面のアノード電極６が形成されていない
領域から取り出される。また、ＰＮ接合３から下方に放
射された光は基板４の下面で反射されて上方に向う。図
１のメサ構造の発光素子の傾斜面５は、ダイス型の発光
素子の垂直な側面に比べてＰＮ接合３から放射された光
に対する全反射の確率を減少させる働きを有する。従っ
て、図１の発光素子においては、ＰＮ接合３から放射さ
れた光の一部が傾斜面５を通り抜けて外部に取り出さ
れ、光出力の増大を図ることができる。2. Description of the Related Art As shown in FIG. 1, a P-type semiconductor region 1 and an N-type semiconductor region 2 are provided, and a PN junction 3 formed at an interface between the two semiconductor regions 1 and 2 is formed.
For example, a semiconductor light emitting device having a so-called mesa structure in which an inclined surface 5 is provided on a side surface of an AlGaAs semiconductor substrate 4, that is, a light emitting diode, is known. In this semiconductor light emitting device, the anode electrode 6 is formed on the upper surface (one main surface) of the semiconductor substrate 4, that is, a part of the upper surface of the P-type semiconductor region 2, and the lower surface (the other main surface) of the semiconductor substrate 4, that is, the N-type The cathode electrode 7 is formed on the lower surface of the semiconductor region 2 so as to be partially grid-like or dotted. The exposed surface of the semiconductor substrate 4 is substantially a mirror surface, and the PN junction 3 is
It is exposed to. The light extraction direction of the semiconductor light emitting device of FIG. 1 is upward, and light emitted upward from the PN junction 3 is extracted from a region of the upper surface of the substrate 4 where the anode electrode 6 is not formed. Light emitted downward from the PN junction 3 is reflected by the lower surface of the substrate 4 and goes upward. The inclined surface 5 of the light emitting element having the mesa structure in FIG. 1 has a function of reducing the probability of total reflection of light emitted from the PN junction 3 as compared with the vertical side surface of the light emitting element of the die type. Therefore, in the light emitting device of FIG. 1, a part of the light emitted from the PN junction 3 passes through the inclined surface 5 and is extracted to the outside, so that the light output can be increased.
【０００３】しかしながら、図１のメサ構造の発光素子
であっても十分なレベルの光出力を得ることができない
のが実情である。そこで、光出力の増大を目的として図
２の半導体発光素子が提案されている。図２の半導体発
光素子はＰ型半導体領域１の上面が粗面（微小凹凸面）
８とされている点で図１と異なり、その他は図１と同一
に構成されている。上面の粗面８はＰＮ接合３から放射
された光の上面での全反射を防いで上方に向う光を効率
良く取り出すためのものである。下面の露出部９はＰＮ
接合３から下面方向に向う光を上方に反射させるもので
ある。即ち、Ｎ型半導体領域２とカソ−ド電極７との界
面には光を吸収する合金層が形成されるため、カソ−ド
電極７の面積を減少させて露出部９を設け、ここで下に
向う光を上に反射させて発光効率の増大を図っている。
図２のようにすると、図１の半導体発光素子よりも光出
力の増大を図ることができる。しかしながら、まだ十分
な光出力の増大を図ることができなかった。However, it is a fact that even the light emitting device having the mesa structure shown in FIG. 1 cannot obtain a sufficient level of light output. Therefore, the semiconductor light emitting device of FIG. 2 has been proposed for the purpose of increasing the light output. In the semiconductor light emitting device of FIG. 2, the upper surface of the P-type semiconductor region 1 is a rough surface (a fine uneven surface).
8 is different from FIG. 1 and the other configuration is the same as that of FIG. The rough surface 8 on the upper surface is for preventing light totally radiated from the PN junction 3 from being totally reflected at the upper surface and efficiently extracting upward light. The exposed part 9 on the lower surface is PN
The light from the junction 3 toward the lower surface is reflected upward. That is, since an alloy layer that absorbs light is formed at the interface between the N-type semiconductor region 2 and the cathode electrode 7, the area of the cathode electrode 7 is reduced to provide an exposed portion 9, where the exposed portion 9 is formed. The light directed toward is reflected upward to increase the luminous efficiency.
2, the light output can be increased as compared with the semiconductor light emitting device of FIG. However, it has not yet been possible to sufficiently increase the light output.
【０００４】そこで、本発明は、光出力を更に増大させ
ることができる半導体発光素子を提供することを目的と
する。Accordingly, an object of the present invention is to provide a semiconductor light emitting device capable of further increasing the light output.
【０００５】[0005]
【課題を解決するための手段】上記目的を達成するため
の本発明は、第１導電型の第１の半導体領域と、ＰＮ接
合を形成するように前記第１の半導体領域に隣接してい
る第２導電型の第２の半導体領域とを有する半導体基体
と、前記半導体基体の一方の主面において前記第１の半
導体領域に接続された第１の電極と、前記半導体基体の
他方の主面において前記第２の半導体領域に接続された
第２の電極とを備え、前記一方の主面側に光を取り出す
ように構成され、且つ前記ＰＮ接合が前記半導体基体の
側面に露出するように形成された半導体発光素子におい
て、前記第２の半導体領域の側面の少なくとも一部が前
記ＰＮ接合から前記他方の主面に向って末広がりの傾斜
面に形成されており、前記第１の半導体領域の側面が前
記ＰＮ接合から放射された光を内側に反射させることが
できるような鏡面に形成され、前記第２の半導体領域の
前記末広がりの傾斜面が光を外部に放射することができ
るように前記第１の半導体領域の側面よりも粗い粗面に
形成されていることを特徴とする半導体発光素子に係わ
るものである。According to the present invention, there is provided a semiconductor device comprising: a first semiconductor region of a first conductivity type; and a first semiconductor region adjacent to the first semiconductor region so as to form a PN junction. A semiconductor substrate having a second semiconductor region of a second conductivity type, a first electrode connected to the first semiconductor region on one main surface of the semiconductor substrate, and the other main surface of the semiconductor substrate And a second electrode connected to the second semiconductor region, wherein one of the main surfaces is configured to extract light, and the PN junction is formed to be exposed on a side surface of the semiconductor substrate. In the semiconductor light emitting device, at least a part of the side surface of the second semiconductor region is formed as a slope diverging from the PN junction toward the other main surface, and the side surface of the first semiconductor region is formed. Is released from the PN junction And a side surface of the first semiconductor region such that the divergent inclined surface of the second semiconductor region can emit light to the outside. The present invention relates to a semiconductor light emitting device characterized by being formed on a rougher surface.
【０００６】[0006]
【発明の作用及び効果】本発明は次の作用効果を有す
る。 （イ） 第２の半導体領域の側面の少なくとも一部がＰ
Ｎ接合から他方の主面（下面）に向って末広がりに形成
され、且つここが全反射を防止するような粗面にされて
いる。従って、ＰＮ接合から他方の主面（下面）に向っ
て放射され、他方の主面（下面）で反射して上方に向う
光を末広がりの側面から外部に良好に取り出すことがで
き、光出力の増大を図ることができる。 （ロ） 第１の半導体領域の側面は光を内部に反射させ
る機能即ち全反射させる機能を有する鏡面となるように
形成されているので、ＰＮ接合よりも上方に向う光を第
１の半導体領域の側面から側方に放出させないで一方の
主面（上面）から取り出すことが可能になり、上方への
光出力の増大を図ることができる。The present invention has the following functions and effects. (B) At least a part of the side surface of the second semiconductor region is P
It is formed so as to diverge from the N-junction toward the other main surface (lower surface), and has a rough surface that prevents total reflection. Therefore, the light emitted from the PN junction toward the other main surface (lower surface), reflected on the other main surface (lower surface), and directed upward can be favorably extracted to the outside from the flared side surface. Increase can be achieved. (B) Since the side surface of the first semiconductor region is formed to be a mirror surface having a function of reflecting light inside, that is, a function of totally reflecting light, light directed upward from the PN junction is transmitted to the first semiconductor region. Can be taken out from one main surface (upper surface) without being emitted to the side from the side surface, and the light output upward can be increased.
【０００７】[0007]
【実施例】次に、図３〜図５を参照して本発明の実施例
に係わる半導体発光素子即ち発光ダイオードを説明す
る。この発光素子は、第１の半導体領域としてのＰ型半
導体領域１１と、第２の半導体領域としてのＮ型半導体
領域１２とから成る例えばＡｌＧａＡｓ半導体基体１３
を備えている。半導体基体１３の上面（一方の主面）１
４即ちＰ型半導体領域１１の上面の中央に第１の電極と
してのアノード電極１５が形成され、半導体基体１３の
下面（他方の主面）１６即ちＮ型半導体領域１２の下面
に第２の電極としてのカソード電極１７が格子状又は点
在するように形成されている。なお、カソ−ド電極１７
は例えば銀を含むペ−スト状導電性接着剤によって外部
の配線導体に接続される。この導電性接着剤は半導体基
体１３の下面のカソ−ド電極１７が設けられていない部
分にも付着し、下に向う光を上に反射させるために寄与
する。Next, a semiconductor light emitting device, that is, a light emitting diode according to an embodiment of the present invention will be described with reference to FIGS. This light-emitting element includes, for example, an AlGaAs semiconductor substrate 13 composed of a P-type semiconductor region 11 as a first semiconductor region and an N-type semiconductor region 12 as a second semiconductor region.
It has. Upper surface (one main surface) 1 of semiconductor substrate 13
An anode electrode 15 as a first electrode is formed in the center of the upper surface of the P-type semiconductor region 11, and a second electrode 16 is formed on the lower surface (the other main surface) 16 of the semiconductor substrate 13, ie, the lower surface of the N-type semiconductor region 12. The cathode electrode 17 is formed so as to be lattice-like or dotted. The cathode electrode 17
Is connected to an external wiring conductor by a paste-like conductive adhesive containing silver, for example. This conductive adhesive also adheres to the portion of the lower surface of the semiconductor substrate 13 where the cathode electrode 17 is not provided, and contributes to reflecting downward light upward.
【０００８】ＰＮ接合１８は半導体基体１３の上面１４
及び下面１６に対して平行に形成されているので、この
端は側面に露出している。半導体基体１３の側面の形状
はＰＮ接合１８の露出位置を境界にして変化している。
ＰＮ接合１８の露出位置よりも下方のＮ型半導体領域１
２の側面の上方部分はＰＮ接合１８から下面１６に向っ
て末広がりに形成された傾斜面１９となっている。ま
た、ＰＮ接合１８の露出位置よりも上方のＰ型半導体領
域１１の側面は、一対の傾斜面２０ａ、２０ｂと一対の
垂直面２１ａ、２１ｂとから成る。なお、Ｐ型半導体領
域１１の一対の傾斜面２０ａ、２０ｂはＰＮ接合１８か
ら上面１４に向って末広がりに形成されており、オーバ
ーハングな側面である。The PN junction 18 is formed on the upper surface 14 of the semiconductor base 13.
This end is exposed on the side surface because it is formed in parallel with the lower surface 16. The shape of the side surface of the semiconductor substrate 13 changes with the exposed position of the PN junction 18 as a boundary.
N-type semiconductor region 1 below the exposed position of PN junction 18
The upper part of the side surface of 2 is an inclined surface 19 formed so as to expand toward the lower surface 16 from the PN junction 18. Further, the side surface of the P-type semiconductor region 11 above the exposed position of the PN junction 18 includes a pair of inclined surfaces 20a and 20b and a pair of vertical surfaces 21a and 21b. Note that the pair of inclined surfaces 20a and 20b of the P-type semiconductor region 11 are formed so as to widen from the PN junction 18 toward the upper surface 14, and are overhanging side surfaces.
【０００９】Ｐ型半導体領域１１の側面即ちオーバーハ
ングな一対の傾斜面２０ａ、２０ｂと一対の垂直面２１
ａ、２１ｂはＰＮ接合１８から放射された光をほぼ全反
射即ち内部に反射させることが可能な鏡面になってい
る。Ｎ型半導体領域１２の末広がりの傾斜面１９は半導
体基体１３の下面１６で反射して上方に向う光の全反射
を阻止して光を外部に取り出すことができる粗面（微小
凹凸面）になっている。即ち、傾斜面１９はＰ型半導体
領域１１の傾斜面２０ａ、２０ｂ及び垂直面２１ａ、２
１ｂよりも凹凸の多い粗い面になっている。なお、図４
及び図５と図１との比較から明らかなように、本実施例
の発光素子は傾斜面１９を粗面としたこと、Ｐ型半導体
領域１１の側面をオーバーハングの傾斜面２０ａ、２０
ｂと垂直面２１ａ、２１ｂとにしたことにおいて図１の
従来の発光素子と相違し、その他は実質的に同一に構成
されている。Side surfaces of the P-type semiconductor region 11, that is, a pair of overhanging inclined surfaces 20a and 20b and a pair of vertical surfaces 21
Reference numerals a and 21b denote mirror surfaces capable of substantially totally reflecting the light emitted from the PN junction 18, that is, reflecting the light inside. The flared inclined surface 19 of the N-type semiconductor region 12 is a rough surface (a fine uneven surface) that reflects off the lower surface 16 of the semiconductor substrate 13 to prevent total reflection of upward light and allows light to be extracted outside. ing. That is, the inclined surface 19 is composed of the inclined surfaces 20a and 20b of the P-type semiconductor region 11 and the vertical surfaces 21a and
It is a rough surface having more irregularities than 1b. FIG.
As is clear from the comparison between FIG. 5 and FIG. 1, in the light emitting device of this embodiment, the inclined surface 19 is roughened, and the side surfaces of the P-type semiconductor region 11 are overhanging inclined surfaces 20a, 20a.
b and the vertical surfaces 21a and 21b are different from the conventional light emitting device of FIG. 1, and the other components are substantially the same.
【００１０】図３〜図５に示す形状の半導体基体１３を
形成する時には、１枚の半導体ウエハに複数の発光素子
を配列して設け、これ等の境界を選択的にエッチングす
る。即ち、各発光素子の周辺に相当する領域の上面に開
口を有するマスクを設け、開口を介して半導体基体をエ
ッチングする。本実施例では、Ｈ2 ＳＯ4 （硫酸）：Ｈ
2 Ｏ2 （過酸化水素）：Ｈ2 Ｏ（水）＝１：３：１の混
合液をエッチング液としてＡｌＧａＡｓ半導体基体１３
をエッチングした。このエッチング液を使用してＰ型の
ＡｌＧａＡｓから成るＰ型半導体領域１１のエッチング
をこの上面から進めると結晶方向の差によって一対の側
面がオーバーハングの傾斜面２０ａ、２０ｂとなり、別
の一対の側面がほぼ垂直な面２１ａ、２１ｂとなる。ま
た、このエッチング液によってＮ型半導体領域１２をエ
ッチングすると、図１のメサ構造と同様な傾斜面１９が
得られる。また、Ｐ型半導体領域１１の傾斜面２０ａ、
２０ｂ及び垂直面２１ａ、２１ｂは鏡面となり、Ｎ型半
導体領域１２の傾斜面１９は粗面となる。従って、図４
及び図５に示す傾斜面１９、オーバーハング傾斜面２０
ａ、２０ｂ、垂直面２１ａ、２１ｂを容易に得ることが
できる。なお、Ｎ型半導体領域１２の傾斜面１９の下の
垂直な側面は半導体ウエハのブレーキングによって生じ
た面である。When the semiconductor substrate 13 having the shape shown in FIGS. 3 to 5 is formed, a plurality of light emitting elements are arranged and provided on one semiconductor wafer, and a boundary between these elements is selectively etched. That is, a mask having an opening is provided on the upper surface of a region corresponding to the periphery of each light emitting element, and the semiconductor substrate is etched through the opening. In this embodiment, H 2 SO 4 (sulfuric acid): H
AlGaAs semiconductor substrate 13 using a mixture of 2 O 2 (hydrogen peroxide): H 2 O (water) = 1: 3: 1 as an etchant
Was etched. When the etching of the P-type semiconductor region 11 made of P-type AlGaAs is advanced from this upper surface using this etching solution, a pair of side surfaces becomes overhanging inclined surfaces 20a and 20b due to a difference in crystal direction, and another pair of side surfaces is formed. Are substantially perpendicular surfaces 21a and 21b. Also, when the N-type semiconductor region 12 is etched with this etchant, an inclined surface 19 similar to the mesa structure of FIG. 1 is obtained. Further, the inclined surface 20 a of the P-type semiconductor region 11,
20b and the vertical surfaces 21a and 21b are mirror surfaces, and the inclined surface 19 of the N-type semiconductor region 12 is a rough surface. Therefore, FIG.
And the inclined surface 19 and the overhang inclined surface 20 shown in FIG.
a, 20b and vertical surfaces 21a, 21b can be easily obtained. The vertical side surface below the inclined surface 19 of the N-type semiconductor region 12 is a surface generated by breaking the semiconductor wafer.
【００１１】本実施例の発光素子は次の作用効果を有す
る。 （１） Ｎ型半導体領域１２の傾斜面１９は末広がり状
であって上方に向いている。このため、図４で破線で示
すようにＰＮ接合１８から下方に放射された光が半導体
基体１３の下面１６（半導体基体１３の下面のうちカソ
−ド電極７が形成されていない部分と導電性接着剤との
界面）で反射して生じた上方に向う光が傾斜面１９に入
射し、ここを通過して光出力となる。この時、傾斜面１
９が全反射を抑制する粗面となっているので、傾斜面１
９からの光の取り出し量が図１及び図２のような鏡面の
傾斜面５よりも多くなる。 （２） Ｐ型半導体領域１１の側面は鏡面であるので、
この鏡面に入射した光はほぼ全反射し、上面１４に向う
ものが生じ、上面１４からの光の取り出し量が多くな
る。 （３） Ｐ型半導体領域１１のオーバーハングの一対の
傾斜面２０ａ、２０ｂは、ＰＮ接合１８から小さな角度
で横方向成分を有するように放出された光を上面１４の
方向に全反射させるために有効である。即ち、図４で破
線で示すようにＰＮ接合１８から横方向成分を有して放
射された光が傾斜面２０ｂで全反射して上面１４に至
り、ここから取り出される現象、及びＰＮ接合１８から
横方向成分を有して放射された光が上面１４で全反射し
て傾斜面２０ａに入射し、ここで再び全反射されて主面
１４に至り、ここから取り出される現象が生じ、光出力
の増大に寄与する。The light emitting device of this embodiment has the following functions and effects. (1) The inclined surface 19 of the N-type semiconductor region 12 has a divergent shape and faces upward. Therefore, as shown by a broken line in FIG. 4, light emitted downward from the PN junction 18 is transmitted to the lower surface 16 of the semiconductor substrate 13 (a portion of the lower surface of the semiconductor substrate 13 where the cathode electrode 7 is not formed and a conductive material). The upward light generated by reflection at the interface with the adhesive is incident on the inclined surface 19 and passes through the inclined surface 19 to become a light output. At this time, the slope 1
9 is a rough surface for suppressing total reflection,
The amount of light taken out from the mirror 9 is larger than that of the mirrored inclined surface 5 as shown in FIGS. (2) Since the side surface of the P-type semiconductor region 11 is a mirror surface,
The light incident on the mirror surface is almost totally reflected, and some light is directed toward the upper surface 14, and the amount of light extracted from the upper surface 14 increases. (3) The pair of inclined surfaces 20 a and 20 b of the overhang of the P-type semiconductor region 11 are for totally reflecting light emitted from the PN junction 18 so as to have a lateral component at a small angle in the direction of the upper surface 14. It is valid. That is, as shown by a broken line in FIG. 4, light emitted from the PN junction 18 having a lateral component is totally reflected by the inclined surface 20b, reaches the upper surface 14, and is extracted therefrom. Light emitted having a lateral component is totally reflected on the upper surface 14 and is incident on the inclined surface 20a. Here, the light is totally reflected again and reaches the main surface 14, and a phenomenon of being extracted therefrom occurs. Contribute to increase.
【００１２】[0012]
【変形例】本発明は上述の実施例に限定されるものでな
く、例えば次の変形が可能なものである。 （１） 半導体基体１３をＡｌＧａＡｓ以外の例えばＧ
ａＡｓ等の種々の半導体とすることができる。また、Ｐ
型半導体領域１１とＮ型半導体領域１２とを異なる半導
体にすることができる。 （２） Ｎ型半導体領域１２をＮ型又はＮ+ 型半導体基
板領域とこの上にエピタキシャル成長させたＮ型半導体
領域との組み合せにすることができる。また、Ｐ型半導
体領域１１も複数の半導体領域の組み合せとすることが
できる。 （３） 基体１３の下面１６に光の反射を助ける層を設
けることができる。[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) The semiconductor substrate 13 is made of a material other than AlGaAs, for example, G
Various semiconductors such as aAs can be used. Also, P
The semiconductor region 11 and the N-type semiconductor region 12 can be made of different semiconductors. (2) The N-type semiconductor region 12 can be a combination of an N-type or N + -type semiconductor substrate region and an N-type semiconductor region epitaxially grown thereon. Further, the P-type semiconductor region 11 can also be a combination of a plurality of semiconductor regions. (3) A layer that helps reflect light can be provided on the lower surface 16 of the base 13.
【図１】従来の発光素子を示す断面図である。FIG. 1 is a cross-sectional view illustrating a conventional light emitting device.
【図２】別の従来の発光素子を示す断面図である。FIG. 2 is a cross-sectional view showing another conventional light emitting device.
【図３】本発明の実施例の発光素子の平面図である。FIG. 3 is a plan view of a light emitting device according to an embodiment of the present invention.
【図４】図３のＡ−Ａ線断面図である。FIG. 4 is a sectional view taken along line AA of FIG. 3;
【図５】図３のＢ−Ｂ線断面図である。FIG. 5 is a sectional view taken along line BB of FIG. 3;
１１ Ｐ型半導体領域 １２ Ｎ型半導体領域 １９ 傾斜面 ２０ａ、２０ｂ オーバーハング傾斜面 11 P-type semiconductor region 12 N-type semiconductor region 19 Slope 20a, 20b Overhang slope
─────────────────────────────────────────────────────
────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成８年１２月１３日[Submission date] December 13, 1996
【手続補正１】[Procedure amendment 1]
【補正対象書類名】図面[Document name to be amended] Drawing
【補正対象項目名】図２[Correction target item name] Figure 2
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【図２】 FIG. 2
Claims (1)
接合を形成するように前記第１の半導体領域に隣接して
いる第２導電型の第２の半導体領域とを有する半導体基
体と、 前記半導体基体の一方の主面において前記第１の半導体
領域に接続された第１の電極と、 前記半導体基体の他方の主面において前記第２の半導体
領域に接続された第２の電極とを備え、前記一方の主面
側に光を取り出すように構成され、且つ前記ＰＮ接合が
前記半導体基体の側面に露出するように形成された半導
体発光素子において、 前記第２の半導体領域の側面の少なくとも一部が前記Ｐ
Ｎ接合から前記他方の主面に向って末広がりの傾斜面に
形成されており、 前記第１の半導体領域の側面が前記ＰＮ接合から放射さ
れた光を内側に反射させることができるような鏡面に形
成され、 前記第２の半導体領域の前記末広がりの傾斜面が光を外
部に放射することができるように前記第１の半導体領域
の側面よりも粗い粗面に形成されていることを特徴とす
る半導体発光素子。A first semiconductor region of a first conductivity type;
A semiconductor substrate having a second conductivity type second semiconductor region adjacent to the first semiconductor region so as to form a junction; and a first semiconductor region on one main surface of the semiconductor substrate. A first electrode connected thereto; and a second electrode connected to the second semiconductor region on the other main surface of the semiconductor substrate, and configured to extract light to the one main surface side. And a semiconductor light emitting device formed such that the PN junction is exposed on the side surface of the semiconductor substrate, wherein at least a part of the side surface of the second semiconductor region is the P semiconductor.
An inclined surface diverging from the N-junction toward the other main surface, and a side surface of the first semiconductor region has a mirror surface capable of reflecting light emitted from the PN junction inward. The divergent inclined surface of the second semiconductor region is formed so as to be rougher than the side surface of the first semiconductor region so that light can be emitted to the outside. Semiconductor light emitting device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26357296A JP3255220B2 (en) | 1996-09-11 | 1996-09-11 | Semiconductor light emitting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26357296A JP3255220B2 (en) | 1996-09-11 | 1996-09-11 | Semiconductor light emitting device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1093135A true JPH1093135A (en) | 1998-04-10 |
| JP3255220B2 JP3255220B2 (en) | 2002-02-12 |
Family
ID=17391420
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26357296A Expired - Fee Related JP3255220B2 (en) | 1996-09-11 | 1996-09-11 | Semiconductor light emitting device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3255220B2 (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003523635A (en) * | 2000-02-15 | 2003-08-05 | オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング | Semiconductor device emitting radiation, method of manufacturing the same, and optical element emitting radiation |
| JP2006245380A (en) * | 2005-03-04 | 2006-09-14 | Toshiba Corp | Semiconductor light emitting device and manufacturing method thereof |
| KR100753710B1 (en) * | 1997-06-03 | 2007-08-30 | 필립스 루미리즈 라이팅 캄파니 엘엘씨 | Improved light extraction from a semiconductor light-emitting device via chip shaping |
| WO2008035932A1 (en) * | 2006-09-20 | 2008-03-27 | Seoul National University Foundation | Iii-nitride based light-emitting diode structure with monolithically integrated sidewall deflectors and method thereof |
| JP2010087422A (en) * | 2008-10-02 | 2010-04-15 | Sharp Corp | Optical-coupling semiconductor device and electronic apparatus equipped with the same |
| US8791469B2 (en) * | 2011-12-05 | 2014-07-29 | Toyoda Gosei Co., Ltd. | Semiconductor light emitting element having a plurality of substrate cutouts and semiconductor layer side surface projections |
| KR20160056981A (en) * | 2014-11-12 | 2016-05-23 | 주식회사 레이토피아 | Light generating device and method of manufacturing the same |
-
1996
- 1996-09-11 JP JP26357296A patent/JP3255220B2/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100753710B1 (en) * | 1997-06-03 | 2007-08-30 | 필립스 루미리즈 라이팅 캄파니 엘엘씨 | Improved light extraction from a semiconductor light-emitting device via chip shaping |
| JP2003523635A (en) * | 2000-02-15 | 2003-08-05 | オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング | Semiconductor device emitting radiation, method of manufacturing the same, and optical element emitting radiation |
| JP2006245380A (en) * | 2005-03-04 | 2006-09-14 | Toshiba Corp | Semiconductor light emitting device and manufacturing method thereof |
| WO2008035932A1 (en) * | 2006-09-20 | 2008-03-27 | Seoul National University Foundation | Iii-nitride based light-emitting diode structure with monolithically integrated sidewall deflectors and method thereof |
| JP2010087422A (en) * | 2008-10-02 | 2010-04-15 | Sharp Corp | Optical-coupling semiconductor device and electronic apparatus equipped with the same |
| US8791469B2 (en) * | 2011-12-05 | 2014-07-29 | Toyoda Gosei Co., Ltd. | Semiconductor light emitting element having a plurality of substrate cutouts and semiconductor layer side surface projections |
| KR20160056981A (en) * | 2014-11-12 | 2016-05-23 | 주식회사 레이토피아 | Light generating device and method of manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3255220B2 (en) | 2002-02-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP2132790B1 (en) | Led with porous diffusing reflector | |
| US8174025B2 (en) | Semiconductor light emitting device including porous layer | |
| US7064356B2 (en) | Flip chip light emitting diode with micromesas and a conductive mesh | |
| US6781160B1 (en) | Semiconductor light emitting device and method for manufacturing the same | |
| JP2005183909A (en) | High output flip chip light emitting diode | |
| JP2004165590A (en) | Horizontal current shielding light emitting diode led and its manufacturing method | |
| JP2907170B2 (en) | Semiconductor light emitting device | |
| US6225648B1 (en) | High-brightness light emitting diode | |
| US20150129915A1 (en) | Light-emitting diode provided with substrate having pattern on rear side thereof, and method for manufacturing same | |
| US20230008993A1 (en) | Flip led chip and manufacturing method therefor | |
| US8742442B2 (en) | Method for patterning an epitaxial substrate, a light emitting diode and a method for forming a light emitting diode | |
| US11810943B2 (en) | Light-emitting device and manufacturing method thereof | |
| KR101261214B1 (en) | Method of fabricating light emitting diode | |
| EP1403933B1 (en) | Semiconductor light emitting diode | |
| KR100897871B1 (en) | Light emitting diode and method of fabrication thereof | |
| JPH1093135A (en) | Semiconductor light-emitting element | |
| US10418510B1 (en) | Mesa shaped micro light emitting diode with electroless plated N-contact | |
| JPH1093136A (en) | Semiconductor light-emitting element | |
| JP2006148059A (en) | Array-type light emitting diode | |
| KR100744941B1 (en) | Electrode structure, semiconductor light-emitting device provided with the same and method for manufacturing the same | |
| KR100599055B1 (en) | Semiconductor light emitting device | |
| KR100644215B1 (en) | Luminous device and the method therefor | |
| KR100813598B1 (en) | Nitride semiconductor light emitting diode | |
| JPH07254731A (en) | Light emitting element | |
| JP2001135853A (en) | Light-emitting element and manufacturing method for it |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20071130 Year of fee payment: 6 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20081130 Year of fee payment: 7 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20091130 Year of fee payment: 8 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20101130 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20101130 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20111130 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20121130 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20121130 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20131130 Year of fee payment: 12 |
|
| LAPS | Cancellation because of no payment of annual fees |