JPH1091665A - Method for generating logical circuit simulator interlocked test terminal - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a logical circuit simulator interlocked test terminal generating method capable of removing errors in the generation of a test terminal at the time of forming the test terminal on a wiring to be tested, preventing the generation of exchange or the like with another wiring by feeding back a test result to a logical simulator and reducing the manhour of the test. SOLUTION: In the method for generating a logical circuit simulator interlocked test terminal in a CAD system for designing a printed circuit board, a test data preparing processing part 509 executes a test by using substrate data stored in a substrate data storing part 508. The processing part 509 feeds back the execution result of the test to a logical simulator execution part 504 to compare the test result with a logical simulator.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a design CAD (Computer Aided Design) of a printed circuit board.
gn) By using the system to improve the data of the test terminals generated on the printed circuit board and effectively utilizing the data of the logic simulator and the testing machine of the printed circuit board design, the generation of test terminal errors can be prevented, The present invention relates to a method for generating a test terminal linked to a logic circuit simulator for improving test efficiency.

[0002]

2. Description of the Related Art Conventionally, techniques in such a field include:
For example, there are the following. FIG. 8 is a block diagram showing a configuration of a design CAD system for a printed circuit board, and FIG. 9 is a diagram showing a conventional test terminal generation example.

In these figures, reference numeral 11 denotes a CAD device (main body), which is a component data / printed circuit board data input / output device 12 for designing component data and printed circuit board data, and a circuit data for performing circuit designing work. A creation / input / output device 13, a storage device (B) 14 for storing the component data and the printed circuit board data input from the component data / printed circuit board data input / output device 12, and an input from the circuit data creation / input / output device 13 A process of deciding the mounting of the component based on the circuit data and the component data and the printed circuit board data stored in the storage device (B) 14,
A central processing unit 15 for performing a process of determining a wiring pattern connecting the components; a storage device (A) 16 for storing data processed by the central processing device; a storage device (B) 14 and a storage device (A) 16 It has a computer device 17 composed of a central processing unit 15 and a logic simulator 18 of a circuit.

An input / output device 21 for performing a printed circuit board design operation while interacting with the computer device 17 includes a keyboard 22 for keying in printed circuit board design information,
Mouse 2 for inputting printed circuit board design information in two dimensions
3. It has a graphic display 24 for displaying data processed by the central processing unit 17 as a drawing. In the printed circuit board design CAD system having the above-described configuration, the conventional test terminals are generated as follows.

[0005] First, the circuit data creation and creation input / output device 13
The circuit simulation is performed by the logic simulator 18 which performs the logic simulation of the circuit by creating the circuit data by using the test terminals at the positions corresponding to the necessary wiring such as the wiring for input and output of each function as a printed circuit board. The input / output device 21 is used by the circuit designer of the printed circuit board to write on the paper surface and to perform the design work of the printed circuit board while interacting with the computer device 17. And test terminals as shown in FIG.

Further, during the test, a waveform output from the test terminal 1 is observed and compared with a logic simulator 18 for performing a logic simulation of the circuit of FIG. 8 to determine whether or not an actual operation is possible. In FIG. 9,
Reference numerals 2 and 3 denote component outlines and reference numerals 4 and 5 denote component terminals.

[0007]

However, according to the above-described data input method of the conventional printed circuit board design CAD system, the process of generating test terminals using the printed circuit board design CAD system is performed. , FIG.
As shown in the figure, the test terminal 6 is generated at the 5th pin of the second IC 8, and the test terminal is not generated at the 5th pin of the first IC 7. In FIG. 10, reference numerals 9 and 10 denote component terminals.

The five pins of the second IC 8 are positions where the designer of the printed circuit board does not intend to generate test terminals, and the five pins of the first IC 7 are input / output of each function as a printed circuit board. The operator must always pay attention to the generation of test terminals by using the input / output device 21 shown in FIG. In this case, the number of steps for regenerating the test terminal was greatly affected.

[0009] Further, if not found, the man-hour due to the redesign of the printed circuit board is significantly increased, which has had a serious effect. In addition, when the designer of the printed circuit board mistakes the test result with another wiring or the like, the correction man-hour is greatly affected. As described above, according to the present invention, in a design CAD system for a printed circuit board, when a test terminal is provided on a wiring that needs to be tested, generation of a test terminal is eliminated, and the test result is converted to a logic simulator. The object of the present invention is to provide a method of generating a test terminal linked with a logic circuit simulator, which can prevent the occurrence of a mistake with another wiring or the like, and reduce the number of test steps.

[0010]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a method of generating test terminals linked to a logic circuit simulator in a printed circuit board design CAD system. The test terminal is prepared as a virtual component and the test terminal is generated, and the test result is fed back to the logic simulator.

(A) By converting the test terminals into virtual parts and converting the data into virtual parts, a circuit data generation and input device can be used when the test terminals are generated in a printed circuit board design CAD system. It is possible to forcibly generate the test terminal input by the, and it is not necessary for the operator to visually confirm using the input / output device, thereby improving the reliability of the printed circuit board and the workability of the operator. Can be planned.

(B) By feeding back test results as data to the circuit data creation / input device, it is possible to check the consistency between the test results and the data of the logic simulator, and to determine whether or not actual operation is possible. Since the judgment can be made easily, the test reliability of the printed circuit board and the workability of the test can be improved.

[0013]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram of test terminal creation as virtual component data according to an embodiment of the present invention. In this figure, an input device 400 for inputting various data includes a graphic display 401 for displaying graphic data as a drawing, a keyboard 402 for key input, and a mouse 403 for inputting point and line segment data.

Reference numeral 404 denotes a circuit element input unit for inputting a circuit element representing the function of the component, 405 denotes a component external shape input unit for inputting external dimensions of the component, and 406 denotes a component pin for inputting a component pin hole diameter and hole shape. A hole diameter / hole shape input unit 407 is a part pin number for inputting a part pin number and a pin position.
This is a pin position input unit. Further, reference numeral 408 denotes a circuit element data creation processing unit for processing data input by the circuit element input unit 404, and 409 denotes a component outline input unit 405, a component pin hole diameter / hole shape input unit 406, and a component pin number / pin position input. A component outline data creation processing unit 410 that processes data input by the unit 407; 410, a circuit element data creation processing unit 408;
A circuit element data storage unit for storing the data processed in
Reference numeral 411 denotes a component outline data storage unit that stores data processed by the component outline data creation processing unit 409.

412 is a circuit element data storage section 41
0, and a component data creation processing unit for creating and processing component data based on the data stored in the component outline data storage unit 411;
Reference numeral 13 denotes a component data storage unit that stores data processed by the component data creation processing unit 412, and each of the input units 404 to 407 includes an input device 400 that inputs various data.
Respectively.

FIG. 2 is a block diagram showing the steps from designing a printed circuit board to testing using test terminals according to an embodiment of the present invention. In this figure, 500 is an input device for inputting various data, 501 is a graphic display for displaying graphic data as a drawing, 502 is a keyboard for key input, and 503 is a mouse for inputting point and line segment data.

Reference numeral 504 denotes a logic simulator execution unit for performing a logical simulation; 505, a circuit data input unit for designing circuit data; 506, a circuit data input unit 505; and board data for designing a printed circuit board. A component data storage unit that stores component data used by the input unit 507, 508 is a board data storage unit that stores data input by the board data input unit 507, and 509 is data that is stored in the board data storage unit 508. Is a test data creation processing unit that performs a process of creating test data based on the circuit data input unit 505 and the board data input unit 507.
Are respectively input by the input device 500.

An embodiment of the present invention having the above configuration will be described below with reference to the flowcharts shown in FIGS. 5 to 7 are diagrams showing the progress of a specific example processed by the embodiment of the present invention, and will be described including the results created by the method of the embodiment of the present invention. First, progress 1 shown in FIG. 5A corresponds to step S1 of inputting a circuit element shown in FIG. 3 and step S2 of assigning a terminal name / pin number to the circuit element. That is,
In step S1, the circuit element 70 is input, and in step S2, the terminal name 71 and the pin number 72 are input to each terminal of the circuit element from the circuit element input unit 404 in FIG.

Step 2 shown in FIG. 5B corresponds to step S3 of inputting the position of the component pin shown in FIG. 3 and step S4 of assigning a number to the input component pin.
That is, in step S3, the input point of the component pin position 73 is obtained in a matrix format, and in step S4, the pin number corresponding to the pin number input in step S2 is replaced with the component pin number / pin position shown in FIG. Input unit 40
Enter from 7.

The process 3 shown in FIG. 6, that is, the completion of the creation of the test terminal as the component data corresponds to the step S5 of inputting the component mounting hole diameter and the hole shape to the input component pin and the step S6 of inputting the component outer shape. doing. That is, in step S5, the position of the component pin input in step S3 is input as a test terminal from the component pin hole diameter / hole shape input unit 406 shown in FIG. 1, and in step S6 the external shape of the component is shown in FIG. Input is performed by the outline input unit 405.

The data is stored in the storage device via the component data / printed circuit board data input / output device. FIG.
Progress 1 shown in (a) corresponds to step S11 of inputting the circuit data shown in FIG. 4, and in this step 11, the test terminal stored in the component data storage unit 506 shown in FIG. The circuit data is input to the circuit data input unit 505
Design more. Next, in step S12 for performing a logic simulation, a logic simulation is performed by the logic simulator execution unit 504 shown in FIG. 2 to check the circuit.

Step 2 shown in FIG. 7B is a step S13 for inputting the printed circuit board design data shown in FIG.
The test terminal 91 stored in the component data storage unit 506 in FIG.
Design from 07. The data for which the design has been completed is stored in the step S14 for storing the printed circuit board design data in FIG.
Are stored in the substrate data storage unit 508 shown in FIG.

Step S15 for performing a test using a testing machine
Uses the board data stored in the board data storage unit 508 shown in FIG. 2 to execute a test in the test data creation processing unit 509. In step S16, the test result is compared with the logic simulator. Then, the test data creation processing unit 50 is sent to the logic simulator execution unit 504 shown in FIG.
The result of the test performed at step 9 is fed back.

It should be noted that the present invention is not limited to the above embodiment, but various modifications are possible based on the spirit of the present invention, and these are not excluded from the scope of the present invention.

[0025]

As described above, according to the present invention, the following effects can be obtained. (A) By converting test terminals into data as virtual parts, when a process of generating test terminals is performed in a printed circuit board design CAD system, the test terminals input by the circuit data creation input device are forcibly applied. Since the information can be generated and visual confirmation by the operator using the input / output device is not required, the reliability of the printed circuit board and the workability of the operator can be improved.

(B) By feeding back the test results as data to the circuit data creation / input device, it is possible to check the consistency between the test results and the data of the logic simulator, and determine whether or not actual operation is possible. Therefore, the test reliability of the printed circuit board and the workability of the test can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram of test terminal creation as virtual component data according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a process of designing a printed circuit board using a test terminal and performing a test according to an embodiment of the present invention.

FIG. 3 is a flowchart for creating component data according to an embodiment of the present invention.

FIG. 4 is a flowchart showing a printed circuit board data creation flow showing an embodiment of the present invention.

FIG. 5 is a diagram showing progress 1 and progress 2 of a specific example processed by an embodiment of the present invention;

FIG. 6 is a diagram showing the completion of preparation of test terminals as printed circuit board data (Elapsed 3) according to the embodiment of the present invention.

FIG. 7 is a diagram showing progress 1 and progress 2 of a specific example of printed circuit board data processed according to the embodiment of the present invention;

FIG. 8 is a block diagram illustrating a configuration of a design CAD system for a printed circuit board.

FIG. 9 is a diagram showing a conventional test terminal generation example.

FIG. 10 is a diagram showing a problem of conventional test terminal generation.

[Explanation of symbols]

 Reference Signs List 70 circuit element 71 terminal name 72 pin number 73 pin position 91 test terminal 400,500 input device 401,501 graphic display 402,502 keyboard 403,503 mouse 404 circuit element input section 405 component external input section 406 component pin hole diameter / hole Shape input unit 407 Component pin number / pin position input unit 408 Circuit element data creation processing unit 409 Component outline data creation processing unit 410 Circuit element data storage unit 411 Component outline data storage unit 412 Component data creation processing unit 413 Component data storage unit 504 Logic simulator execution unit 505 Circuit data input unit 506 Component data storage unit 507 Board data input unit 508 Board data storage unit 509 Test data creation processing unit

Claims (1)

[Claims] 1. A method for generating a test terminal linked with a logic circuit simulator in a design CAD system for a printed circuit board, wherein a test terminal prepared in advance as a virtual component is used for a wiring that needs to be tested. A method for generating a test terminal linked with a logic circuit simulator, wherein a terminal generation process is performed and a test result is fed back to a logic simulator.