JPH1084068A - Semiconductor integrated circuit device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a semiconductor integrated circuit device to be enhanced in protective properties for outer terminals and improved in mount density by a method wherein a demarcating/protective member which not only demarcates adjacent outer terminals but also protects the outer terminals is provided in a device mount substrate or the outer terminals of the semiconductor integrated circuit device. SOLUTION: A semiconductor integrated circuit device is equipped with a device mount substrate 2 which supports a semiconductor device 1, outer terminals (pin member) 4 provided in the rear 2b of the device mount 2, and a demarcating/protecting member 6 which demarcates the adjacent pin members 4 and protects the pin numbers 4, wherein the demarcating/protecting member 6 has such a structure that it partitions the pin members 4 and protects them surrounding and preventing the adjacent pin member 4 from coming into contact with each other. Engaging pawls 6b are provided in the demarcating/protecting member 6 so as to engage with the device mount substrate 2. That is, the demarcating/protecting member 6 is supported on the device mount substrate 2 so as not only to demarcate the adjacent outer terminals but also to protect the outer terminals.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing technique, and more particularly to a semiconductor integrated circuit device and a method for manufacturing the same, which enhance the protection of external terminals provided on an element mounting substrate.

[0002]

2. Description of the Related Art The technology described below studies the present invention,
Upon completion, they were examined by the inventor, and the outline is as follows.

As examples of a semiconductor integrated circuit device corresponding to multi-pin operation and high-speed operation, a PGA (Pin Grid Array) or a BG
A semiconductor integrated circuit device called A (Ball Grid Array) is known.

Here, the PGA has a pin member as an external terminal, and when mounting on a printed wiring board, the PGA is mounted by inserting the pin member into a hole provided in the printed wiring board.

In the BGA, the external terminals are ball-shaped bump electrodes, and the bump electrodes are melted by heating the electrodes of the printed wiring board and mounted.

As for PGA, for example, Nikkei B
Company P, published on May 31, 1993, is described in Susumu Kayama and Kunihiko Naruse (supervisors), "Practical Course VLSI Packaging Technology (1)", pages 165 to 173, and BG
A is described in “Practical Course VLSI Packaging Technology (Lower)” in the same magazine, pages 173 to 174.

[0007]

However, in the above-mentioned technology, in both cases of PGA and BGA,
The external terminals are exposed.

As a result, in the PGA, a problem occurs in that the pin member (external terminal) comes into contact with another member and bends during transportation or the like. The bend must be corrected.

Further, in the BGA, when mounting the BGA, the temperature becomes high or the pressure is too high, so that the shape of the bump electrode becomes large, and there is a problem that a short circuit (short circuit) occurs with an adjacent bump electrode. .

An object of the present invention is to provide a semiconductor integrated circuit device which enhances the protection of external terminals and realizes high-density mounting, and a method of manufacturing the same.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0012]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, in the semiconductor integrated circuit device of the present invention, an element mounting substrate for supporting a semiconductor element, a plurality of external terminals provided on one of the front and back surfaces of the element mounting substrate, and an adjacent external terminal are partitioned. And a partition protection member for protecting each external terminal, wherein the partition protection member is attached to the element mounting board or the external terminal.

Thus, since the adjacent external terminals are separated and protected by the partition protection member, the external terminals can be protected by the partition protection member when the semiconductor integrated circuit device is transported.

As a result, even when the external terminal comes into contact with another member, the deformation can be prevented, and the protection of the external terminal can be enhanced.

Furthermore, the semiconductor integrated circuit device of the present invention
The partition protection member is formed of an insulating material.

In the semiconductor integrated circuit device according to the present invention, the partition protection member is detachably attached to the element mounting board or the external terminal.

Further, in the method of manufacturing a semiconductor integrated circuit device according to the present invention, a step of preparing an element mounting substrate provided with a plurality of external terminals, a step of mounting the semiconductor element on the element mounting substrate, The method includes a step of electrically connecting the electrode to each external terminal, and a step of partitioning an adjacent external terminal and attaching a partition protection member for protecting each external terminal to the element mounting board or the external terminal.

[0019]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a partially cutaway side view showing an embodiment of the structure of a PGA which is a semiconductor integrated circuit device of the present invention, and FIG. 2 is a PGA which is a semiconductor integrated circuit device of the present invention.
FIG. 3 is a perspective view showing an example of an embodiment of a structure of a partition protection member attached to a semiconductor device, and FIG. 3 is an enlarged partial cross-sectional view showing an example of an embodiment of a PGA mounted as a semiconductor integrated circuit device of the present invention.

The semiconductor integrated circuit device of the present embodiment has an element mounting substrate 2 (base substrate) having a plurality of external terminals provided on a back surface 2b (here, a surface opposite to the front surface 2a on which the semiconductor element 1 is mounted). As an example, a case where the external terminal is a PGA which is a pin member 4 will be described.

The structure of the PGA according to the present embodiment includes an element mounting substrate 2 for supporting a semiconductor element 1 and an element mounting substrate 2.
And a plurality of external terminal pin members 4 provided on the back surface 2b (or the front surface 2a when the semiconductor element 1 is provided on the back surface 2b). And a partition protection member 6 for protecting the partition 4. The partition protection member 6 is attached to the element mounting board 2.

Here, the partition protection member 6 according to the present embodiment.
Is a relatively hard plate-like member formed of an insulating material such as a polyethylene resin or ceramic and having a thickness of about half the length of the exposed portion of the pin member 4.

Further, the partition protection member 6 has a structure for partitioning the respective pin members 4, and surrounds and protects the respective pin members 4 so that the adjacent pin members 4 do not come into contact with each other.

That is, the partition protection member 6 of the present embodiment.
Has the same number of through-holes 6a (see FIG. 2) in exactly the same arrangement as the PGA pin members 4, and the through-holes 6a are formed so that the pin members 4 can pass therethrough. The hole diameter is formed slightly larger than the pin diameter of the pin member 4.

The partition protection member 6 according to the present embodiment is provided with an engagement portion 6b which is a claw that engages with the element mounting board 2.

Here, the engaging portion 6b of the partition protection member 6 is
For example, there are claws provided at two places corresponding to two opposing side surfaces 2c of the rectangular element mounting board 2.

Thus, when attaching the partitioning protective member 6 to the PGA, each pin member 4 of the PGA is passed through each through hole 6a of the partitioning protective member 6, and then the two engaging members of the partitioning protective member 6 are engaged. The portion 6b is attached to a predetermined portion of the element mounting substrate 2 (here, the engaging portion 6b, which is a claw, is hooked on the surface 2a of the element mounting substrate 2 via the side surface 2c).

As a result, as shown in FIG. 1, the partition protection member 6 according to the present embodiment is supported by the element mounting board 2.

However, the number of the engaging portions 6b is not limited to two, and may be provided at one or three or more positions as long as the partition protection member 6 can be held.

In the PGA of this embodiment, the electrodes of the semiconductor element 1 mounted on the element mounting substrate 2 are electrically connected to the electrodes on the element mounting substrate 2 by, for example, bonding wires. The electrodes of the element mounting board 2 are electrically connected to the predetermined pin members 4, whereby the electrodes of the semiconductor element 1 and the predetermined pin members 4 are electrically connected to each other.

However, the electrodes on the element mounting substrate 2 and the electrodes of the semiconductor element 1 may be connected by bumps other than bonding wires.

The semiconductor element 1 on the element mounting board 2 and its peripheral part are sealed by a sealing part 3.

Here, the sealing portion 3 may be formed of, for example, an epoxy-based thermosetting resin or the like, or may be a substrate member formed of ceramic or the like.

The element mounting board 2 is formed of, for example, ceramic or the like, and the pin member 4 is formed of, for example, an alloy of nickel and iron.

A method for manufacturing the semiconductor integrated circuit device according to the present embodiment will be described.

First, an element mounting board 2 provided with a plurality of pin members 4 as external terminals is prepared.

That is, an element mounting board 2 having a predetermined number of pin members 4 provided at predetermined positions is prepared.

Further, pellet bonding for mounting the semiconductor element 1 on the element mounting substrate 2 is performed by using a bonding material such as an adhesive or a paste.

Subsequently, the electrodes of the semiconductor element 1 and the respective pin members 4 are electrically connected by wire bonding or the like.

Here, the electrodes of the semiconductor element 1 and the pin members 4
The electrical connection with the wire is not limited to wire bonding, and may be performed by bumps or the like.

Further, the semiconductor element 1 and its peripheral part are sealed by the sealing part 3.

Thereafter, a plate-like partitioning protection member 6 made of an insulating material such as a polyethylene resin or ceramic is used.
Is used to attach the partition protection member 6 to the element mounting substrate 2.

At this time, the respective pin members 4 of the PGA are passed through the respective through holes 6a of the partitioning protection member 6, and then the engaging portions 6b, which are two claws of the partitioning protection member 6, are connected to the element mounting board 2 And is hooked to the surface 2a via the side surface 2c of the light source.

Thus, the partitioning protection member 6 of the present embodiment partitions the adjacent pin members 4 and forms a state of protecting each of the pin members 4 and is supported by the element mounting board 2.

Further, the partition protection member 6 is mounted on the element mounting substrate 2.
The PGA is transported to a predetermined position while the PGA is attached.

In this embodiment, since the partitioning protection member 6 is formed of an insulating material, the partitioning protection member 6 is removed while being attached to the element mounting board 2 as shown in FIG. The PGA is mounted on the printed wiring board 5 (mounting board) without the need.

According to the semiconductor integrated circuit device and the method of manufacturing the same of the present embodiment, the following operational effects can be obtained.

That is, since the partition protection member 6 is attached to the PGA element mounting substrate 2, the adjacent pin members 4 provided on the element mounting substrate 2 are separated and protected by the partition protection member 6. The pin member 4 can be protected by the partition protection member 6 during the transportation of the PGA.

Accordingly, even when the pin member 4 comes into contact with another member, it can be prevented from being deformed, and the protection of the pin member 4 can be enhanced.

That is, since the pin member 4 is fixed and protected by the partition protection member 6, even if it comes into contact with another member, the pin member 4 can be prevented from bending.

As a result, it is possible to enhance the protection of the pin member 4 in the PGA.

Furthermore, since the pin bending of the pin member 4 can be prevented, the operation of correcting the pin bending when mounting the PGA on the printed wiring board 5 can be eliminated.

As a result, the productivity of PGA can be improved.

Further, since the partition protection member 6 is attached to the PGA, the pin member 4 is protected by the partition protection member 6 when the PGA is transported.
It is possible to reduce the adhesion of foreign matter to the surface.

Thus, the reliability of PGA can be improved.

Further, since the partition protection member 6 is formed of an insulating material, each of the pin members 4 is partitioned and protected by the partition protection member 6 even when the PGA is mounted on the printed wiring board 5. Therefore, the compartment protection member 6
Can be implemented as is without removing.

As described above, the invention made by the inventor has been specifically described based on the embodiments of the present invention. However, the present invention is not limited to the embodiments of the present invention, and does not depart from the gist of the invention. It is needless to say that various changes can be made.

For example, in the semiconductor integrated circuit device described in the above embodiment, the case where the external terminal is the PGA having the pin member 4 has been described. However, the semiconductor integrated circuit device has another embodiment shown in FIG. As in the semiconductor integrated circuit device according to the embodiment, the external terminals may be ball-shaped bump electrodes 7 formed of solder or the like, that is, BGA.

Here, the partition protection member 6 shown in FIG. 4 is a plate-like member like the partition protection member 6 of the above embodiment.

The effect obtained when the semiconductor integrated circuit device is a BGA is the same as that obtained when the PGA is used, but the other effect is that the BGA is attached to the printed wiring board 5 (see FIG. 3). When the BGA is mounted, the partition protection member 6 is mounted on the BGA, so that the partition protection member 6 is arranged between the bump electrode 7 and another adjacent bump electrode 7. Even if the size of the bump electrode 7 becomes large, the adjacent bump electrode 7
A short circuit (short circuit) between them can be prevented.

As a result, a high-density mounting BGA in which the bump electrodes 7 are provided at a high density can be realized.

Further, the partition protection member 6 is provided between the bump electrodes 7.
Are disposed, foreign substances can be prevented from adhering between the bump electrodes 7.

As a result, the reliability of the BGA can be improved.

Although the partitioning protection member 6 shown in FIG. 1 or FIG. 4 is a plate-like member, the partitioning protection member 6 is not limited to the plate-like shape, but surrounds and protects each external terminal of the semiconductor integrated circuit device. As long as it has the shape shown in FIG. 5, it may be a member having a lattice shape like the partition protection member 6 of another embodiment shown in FIG.

Here, the partitioning protection member 6 shown in FIG. 5 is for protecting each external terminal of the semiconductor integrated circuit device by surrounding the grid-like partitioning protection member 6 for each cell.

In this way, the same effects as those of the plate-shaped partitioning protection member 6 can be obtained.

1, 4 or 5 is a member which melts when heated, such as wax, or a member whose hardness is chemically changed by a chemical solution or the like. You may.

Further, when the partition protection member 6 is an insulating material,
The partition protection member 6 may be formed of an elastic rubber member or a porous member (for example, sponge).

Here, for example, if the semiconductor integrated circuit device is P
In the case of GA, by forming the hole diameter of the through hole 6a provided in the partition protection member 6 slightly smaller than the pin diameter of the pin member 4 of PGA, the fitting when the pin member 4 is passed through the through hole 6a ( By utilizing friction), the partition protection member 6 can be held on the pin member 4.

As a result, the partitioning protection member 6 is connected to the pin member 4.
1 and is held by the pin member 4, so that an engaging portion 6b such as a claw like the partition protection member 6 shown in FIG. 1 is unnecessary, and the shape of the partition protection member 6 can be simplified. it can.

Also in this case, when the semiconductor integrated circuit device is mounted on a mounting substrate by compressing an elastic rubber member or a porous member (for example, sponge), the semiconductor integrated circuit device can be used. It can be mounted without removing the section protection member 6.

It is preferable that the partition protection member 6 is formed of an insulating material.

That is, since the partition protection member 6 is formed of an insulating material, the semiconductor integrated circuit device can be mounted with the partition protection member 6 attached even during a screening test.

Thus, it is possible to prevent the external terminals of the semiconductor integrated circuit device from being damaged during the screening test.

The partition protection member 6 is not limited to an insulating material.

That is, the partition protection member 6 is attached to the element mounting board 2.
Alternatively, the partition protection member 6 can be detached from the semiconductor integrated circuit device immediately before mounting the semiconductor integrated circuit device by being detachably attached to the external terminal.

Thus, it becomes possible to form the partition protection member 6 by a conductive member other than the insulating material, such as a conductive rubber.

However, when the partitioning protection member 6 is the conductive member, the semiconductor integrated circuit device is a PGA or BG
In any of the cases A, the partitioning protection member 6 must be used at the time of mounting on the mounting board or at the time of the screening test.
Must be removed.

[0080]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1). Since the partitioning protection member is attached to the element mounting board or the external terminal of the semiconductor integrated circuit device, the adjacent external terminal is partitioned and protected by the partitioning protection member, so that when the external terminal comes into contact with another member. In addition, the deformation can be prevented, and the protection of the external terminals can be enhanced.

(2). When the semiconductor integrated circuit device is a PGA, pin bending of the pin member can be prevented, so that the operation of correcting the pin bending when mounting the PGA on a mounting board such as a printed wiring board can be eliminated. Thereby, the productivity of PGA can be improved.

(3). When the semiconductor integrated circuit device is a BGA, the partitioning protection member is disposed between the bump electrode and another adjacent bump electrode. A short circuit between the electrodes can be prevented.
As a result, high-density mounting in which bump electrodes are provided at high density can be realized.

(4). Since the partitioning protection member is attached to the semiconductor integrated circuit device, the external terminals are protected by the partitioning protection member when the semiconductor integrated circuit device is transported, so that adhesion of foreign matter to the external terminals can be reduced. Thereby, the reliability of the semiconductor integrated circuit device can be improved.

(5). When the semiconductor integrated circuit device is mounted on the mounting board, each external terminal is separated and protected by the partition protection member, since the partition protection member is formed of an insulating material. Can be implemented as is.

[Brief description of the drawings]

FIG. 1 is a partially cutaway side view showing an example of an embodiment of the structure of a PGA, which is a semiconductor integrated circuit device of the present invention.

FIG. 2 is a perspective view showing an example of an embodiment of a structure of a partition protection member attached to a PGA which is a semiconductor integrated circuit device of the present invention.

FIG. 3 is an enlarged partial cross-sectional view showing an example of an embodiment of a mounted state of a PGA which is a semiconductor integrated circuit device of the present invention.

FIGS. 4A and 4B are diagrams showing an example of the structure of a semiconductor integrated circuit device (BGA) according to another embodiment of the present invention, wherein FIG. (B) is a bottom view.

FIG. 5 is a perspective view showing another embodiment of the structure of the partition protection member attached to the semiconductor integrated circuit device of the present invention.

[Description of Reference Numerals] 1 semiconductor element 2 element mounting board 2a front surface 2b back surface 2c side surface 3 sealing portion 4 pin member (external terminal) 5 printed wiring board (mounting substrate) 6 partition protection member 6a through hole 6b engagement portion 7 bump Electrode (external terminal)

Claims (9)

[Claims] 1. A semiconductor integrated circuit device having a semiconductor element mounted thereon, comprising: an element mounting substrate supporting the semiconductor element; and a plurality of external terminals provided on one of front and back surfaces of the element mounting substrate. And a partition protection member for partitioning adjacent external terminals and protecting each external terminal, wherein the partition protection member is attached to the element mounting board or the external terminal. Circuit device. 2. The semiconductor integrated circuit device according to claim 1, wherein said partition protection member is formed of an insulating material. 3. The semiconductor integrated circuit device according to claim 1, wherein the partition protection member is detachably attached to the element mounting board or the external terminal. . 4. The semiconductor integrated circuit device according to claim 1, wherein said partition protection member is a plate-shaped member. 5. The semiconductor integrated circuit device according to claim 1, wherein said external terminal is a pin member. 6. The semiconductor integrated circuit device according to claim 1, wherein said external terminal is a ball-shaped bump electrode. 7. A method of manufacturing a semiconductor integrated circuit device having an element mounting substrate supporting a semiconductor element, the method comprising: preparing an element mounting substrate provided with a plurality of external terminals; A step of mounting an element; a step of electrically connecting an electrode of the semiconductor element to each external terminal; and a partition protection member that partitions adjacent external terminals and protects each external terminal. A method for manufacturing a semiconductor integrated circuit device, comprising a step of attaching to an external terminal. 8. The method for manufacturing a semiconductor integrated circuit device according to claim 7, wherein the partition protection member formed of an insulating material is used. 9. The method for manufacturing a semiconductor integrated circuit device according to claim 7, wherein the semiconductor integrated circuit device is mounted on a printed circuit board in a state where the partition protection member is attached to the element mounting board or the external terminal. A method for manufacturing a semiconductor integrated circuit device, wherein the method is mounted on a mounting substrate such as