JPH1073627A - Self-diagnostic device for ic testing apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a self-diagnostic device, for an IC testing apparatus, in which a relay can be replaced preventively and by which the yield and the operating ratio of the IC testing apparatus are enhanced. SOLUTION: A relay-drive timing signal which is generated from a timing generator 12 is input to a relay control circuit 6, a strobe signal is input to a waveform control circuit 4, a driver 1 is driven, a voltage is generated at the output end of the driver 1, a change in the voltage at the output end of the driver 1 at a time when relays RY1 to RY3 are energized and deenergized so as to make and break their contacts K1 to K3 is input to a comparator 2, and the output of the comparator 2 logic-judged by a CPU 14 in such a way that the timing of the strobe signal used to drive the waveform control circuit 4 is made to correspond to the relay-drive timing signal and that the timing of the strobe signal which is generated from the timing generator 12 is changed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention detects deterioration of a relay used in an IC (integrated circuit) test apparatus, and prevents erroneous determination of an IC to be measured due to a failure of the relay and stop of the IC test apparatus. The present invention relates to a self-diagnosis device for an IC test device in which a voltage change due to the operation of a relay contact is input to a comparator and the output of the comparator is logically determined.

[0002]

2. Description of the Related Art A failure of a relay used in an IC test apparatus often results in divergence failure due to abrasion of a contact. This divergence failure requires erroneous determination of an IC to be measured or stop of the IC test apparatus. And the operating rate of the IC test equipment decreases.

FIG. 3 is a block diagram showing the configuration of a conventional IC testing apparatus which cannot detect that the relay contacts have started to be worn. In FIG. 3, a central processing unit 14 (hereinafter, referred to as a CPU) is connected to registers 8 to 11, and the register 8 includes a driver 1 from the CPU 14.
Is held.

The register 8 holds waveform data for driving the driver 1 sent from the CPU 14 through the data bus, and is connected to the waveform control unit 4. The waveform control unit 4 holds the data in the register 8. The drive signal is driven by the waveform of the output signal, and the drive of the driver 1 is controlled. The comparator 2 compares the output signal of the driver 1 with the expected signal. The pass / fail signal (obtained from the signal at the output terminal of the driver 1). The waveforms of the relays RYI to RY3 (pass / fail signals) are controlled and stored in the register 8. The pass / fail signal held in the register 8 is the CPU
14.

The output terminal of the driver 1 has a relay RY
The contact K1 of I is connected. Relays RY1 to RY3
Are driven by a relay control circuit 6, and a contact K2 of the relay RY2 is connected between the output terminal of the driver 1 and the output terminal of the constant current load circuit 3.

The contact K3 of the relay RY3 is connected between one end (one end on the output side) of the contact K1 and the output terminal of the DC characteristic measuring device 7.

To drive the constant current load circuit 5,
The current value of the constant current load circuit 5 is sent from the CPU 14 to the register 9 through the data bus, and is held there, and the current value held in the register 9 is introduced into the constant current setting circuit 5 so that the constant current setting circuit 5 Is supplied to the output terminal side of the driver 1 by the constant current adding circuit 3 through the contact K2 of the relay RY2.

Also, the contacts 14 of relays RY1 to RY3 are connected to the register 10 from the CPU 14 through the data bus.
Data for setting the connection / disconnection of 3 is held, and the data held in this register 10 is inputted to the above-mentioned relay control circuit 6, and the relay control circuit 6 is driven by this data. And each of the relays RY1 to RY3
Is to be driven.

Further, a signal for driving the DC characteristic measuring device 7 is held in the register 11 from the CPU 14 through the data bus, and the DC characteristic measuring device 7 is driven by this signal and flows to the contact K3 of the relay RY3. Contact K1
When the contact is open, the leakage current exceeding a predetermined value is applied to the contact K3.
It measures whether or not it flows through.

The DC characteristic measuring device 7 generates a constant current based on the signal held in the register 11 and supplies it to a load (not shown in FIG. 3, but connected to the circuit 15). In addition to the function of measuring the voltage generated in the load, the function of generating a constant voltage and measuring the current flowing through the load when the voltage is applied to the load is provided.

Further, at the time of these measurements, a DC characteristic measuring device 7 is used.
The measured current value when a constant voltage is applied to the load and the measured voltage value when a constant current is supplied to the load are stored in the register 11 by the DC characteristic measuring device 7, and these measured current values held by the register 11 are The measured voltage value is read by the CPU 14.

Next, the operation of the IC test apparatus shown in FIG. 3 for detecting a failure in the relays RY1 to RY3 will be described.

[0013] The failure detection of the relay is performed by each of the relays RY1 to RY.
It is detected by the fact that the resistance value when each of the contacts K1 to K3 is ON and the leakage current value when OFF are abnormal.

First, when checking the resistance value when the contact K1 of the relay RY1 is on, data for setting the connection / disconnection of the relay held in the register 10 by the CPU 14 is input to the relay control circuit 6, When the relay control circuit 6 is driven, the relays RY1 and R
By energizing Y2, the respective contacts K1 and K2 are closed.

When the contact K1 is closed, the output terminal of the driver 1 is connected to the circuit 15, and when the contact K2 is closed, the contacts K1 and K2 are connected in series. .

Next, driver waveform setting data for driving the driver 1 held in the register 8 is input to the waveform control unit 4, and the waveform control unit 4 drives the driver 1 to drive the driver 1. Constant voltage at the output end,
For example, a voltage of 0 V is output.

In this state, the current value held in the register 9 is input to the constant current setting circuit 5 to drive the constant current setting circuit 5, and from the constant current setting circuit 5 to the contact through the constant current load circuit 3. A constant current is passed through K2.

The constant current causes a voltage drop at the contacts K1 and K2, and a value obtained by adding a voltage drop due to the output impedance of the driver 1 to the measured voltage 0V at the output terminal of the driver 1 is applied to the input terminal of the comparator 2. Is done.

At this time, if the contact K1 is normally closed, the contact K1 has only its own contact resistance and the contact resistance is almost negligible. Is abnormal, that is, if the contact is poor, the contact resistance cannot be ignored.

As described above, the voltage due to the output impedance of the driver 1 applied to the input terminal of the comparator 2 changes according to the contact state of the contact K1. The change in the voltage is compared with a predetermined expected waveform by the comparator 2, and a pass / fail signal as a result of the comparison is input to the waveform control unit 4, converted into a predetermined waveform by the waveform control unit 4, and stored in the register 9. ,
The CPU 14 checks the resistance value of the contact K1 based on the contents of the register, and determines the quality of the contact K1.

Next, a case where the leakage current when the contact K1 of the relay RY1 is turned off is confirmed will be described.

In this case, the relay control circuit 6 is driven by the data for setting the connection / disconnection of the relays RY1 to RY3 held in the register 10 to drive the relays RY1 and RY1.
RY2 is deenergized, and its contacts K1 and K2 are opened together.
The relay RY3 is energized and its contact K3 is closed.

In this state, the signal held in the register 11, that is, the constant voltage is input to the DC characteristic measuring device 7, and the DC characteristic measuring device 7 is driven, and the DC characteristic measuring device 7 A voltage is applied to the contact K3.

The measuring current flowing through the contact K3 at this time is measured by the DC characteristic measuring device 7. In this case, the contact K1 is turned off. If the contact K1 is normally turned off, the leakage current due to the contact K1 does not flow into the DC characteristic measuring device 7 through the contact K3. If not turned off, the leakage current
3 and flows into a DC characteristic measuring device 7.

At this time, a signal corresponding to the value of the measured current flowing through the contact K3 is held in the register 11, and the signal held in the register 11 is input to the CPU 14, whereby the leak current of the CPU 14 is equal to or less than the allowable leak current. Is determined, if the result of the determination is that the leak current is equal to or less than the allowable leak current, the contact K1 is determined to be normal, and conversely, the allowable leak current is determined to be abnormal. If so, it is determined that the contact K1 is defective.

[0026]

As described above, the failure of the relay used in the above-mentioned conventional IC test apparatus is as follows.
There are many separation failures due to wear of the contacts. Conventional IC test equipment measures the resistance value when the relay contacts are turned on and the leak current when the contacts are turned off. There is a problem that it is difficult to detect a deteriorated state that is beginning to occur.

[0027]

In order to solve the above-mentioned conventional problems, a self-diagnosis apparatus for an IC test apparatus according to the present invention comprises:
A state in which the output terminals of the driver 1 are connected to or disconnected from the load R1 by energizing and deactivating the measured relays RY1 to RY3, which are driven by an output having a predetermined timing from the timing generator 12 and whose deterioration is to be measured. And a relay control circuit 6 for turning on and off the bounce time and the bounce time of the measured relays RY1 to RY3 at the output terminal of the driver 1 according to the energization and deenergization of the measured relays RY1 to RY3. A comparator that compares the generated waveform with an expected waveform and outputs the result; and a central processing unit that performs a logical determination on the quality of the relays to be measured RY1 to RY3 based on a comparison result of the comparator 2. I do.

[0028]

According to the self-diagnosis device of the IC test apparatus of the present invention, the relay control circuit 6 is driven at a predetermined timing by the timing generator 12, and the relays RY1 to RY3 are turned on by the relay control circuit 6. The output terminal of the driver 1 is connected to or disconnected from the load R1 according to the on / off state.

The non-measurement relays RY1 to RY1 to R4 depend on whether the output terminal of the driver 1 is connected to the load R1 or not.
The waveforms generated when Y3 is turned on, bounced, and turned off are compared with expected waveforms by comparator 2, and the comparison result of comparator 2 is relayed by central processing unit 14 to relay RY1.
RY3 is determined.

Next, an embodiment of a self-diagnosis device for an IC test device according to the present invention will be described with reference to the drawings. FIG.
FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention. In FIG. 1, for the sake of simplicity, the same parts as those in the conventional example of FIG. 3 are denoted by the same reference numerals, and the description thereof will not be repeated.

As is clear from the comparison of FIG. 1 with FIG.
In FIG. 1, a timing generator 12 is newly added to the configuration of FIG.
A register 13 and a load R1 such as a resistor are added.

The register 13 includes a timing generator 12
Of the driver waveform output from the timing generator 12, the timing signal (time signal) of the leading edge and the trailing edge of the driver waveform output from the timing generator 12, and the output of the comparator 2 are compared with the expected waveform. The setting data of the strobe signal that determines the timing (time)
14 through a data bus, and the setting data is held in the register 13.

When the timing generator 12 is driven by the signal held in the register 13, a relay drive timing signal is input from the timing generator 12 to the relay control circuit 6, and a strobe signal is output to the waveform control circuit 4. It has become so. By changing the generation timing of the strobe signal, the contacts K1 to K3 of the relays RY1 to RY3 energized and deactivated by the relay control circuit 6
The waveform generated in the load R1 by the above operation is measured.

The output terminal of the driver 1 is connected to one end of a load R1 via a contact K1 of a relay RY1, and the other end of the load R1 is connected to ground or a predetermined circuit.

The relays RY1 to RY3 each have a contact K1.
To K3, of which the contact K3 is connected between the connection point between the contact K1 and the load R1 and the output terminal of the DC characteristic measuring instrument 7. Other configurations are the same as those in FIG.

Next, the operation of this embodiment configured as described above will be described. Detection of relay deterioration
The timing generator 12 is driven by the signal held in the register 13 by the CPU 14, and a strobe signal is output from the timing generator 12 to the waveform control unit 4.

When the timing signal is input to the waveform control unit 4, waveform data for driving the driver 1 held in the register 8 by the CPU 14 is input to the waveform control unit 4. Thereby, the waveform control unit 4
Drives the driver 1, and at the output end of the driver 1, for example,
Generates an output voltage of 0V.

Next, a relay drive timing signal is output from the timing generator 12 to the relay control circuit 6, and the generation timing of this relay drive timing signal, that is, the drive signal shown in FIG. That is, the data for setting the connection / disconnection of the contact of the relay is taken into the relay control circuit 6, and the relay control circuit 6 is driven.
Is excited and the contact K1 of the relay RY1 is closed as shown in FIG. 2 (B) (closed when the waveform of FIG. 2 (B) is on).

When the contact K1 is closed,
The output terminal of the driver 1 is connected to the load R1 through the contact K1.

When the output terminal of the driver 1 is connected to the load R1, a voltage drop occurs due to the load R1, and the voltage at the output terminal of the driver 1 drops by the voltage drop.

The voltage at the output terminal of the driver 1 is also applied to the input terminal of the comparator 2. The comparator 2 detects whether the contact K1 is closed or opened at this input end,
Compare the bounce voltage.

The output waveform of the comparator 2 at the time of this comparison is as shown in FIG. 2B. FIG. 2 shows the waveform of this comparator 2 in addition to the display of the waveform when the contact K1 is turned on and off.
2B, the time T1 in the output waveform of the comparator 2 in FIG. 2B is the ON time of the contact K1, the time T2 is the bounce time of the contact K2, and the time T3 is the OFF time of the contact K1. is there.

The generation timing of the strobe signal output from the timing generator 12 to the relay control circuit 6 is sequentially changed with respect to the ON time T1, the bounce time T2, and the OFF time T3. Correspondingly, the generation timing of the strobe signal output from the timing generator 12 to the waveform control circuit 4 is sequentially changed so that the ON time T1 and the bounce time T
2. The off-time T3 is sequentially changed at the output side of the comparator 2 to determine the logic "1" corresponding to the waveform of the expected signal and the logic "0" corresponding to the waveform of the unexpected signal.

As described above, as compared with the logic "1" corresponding to the waveform of the expected signal, the point t1 at which the pass / fail changes is shown in FIG.
(B) Reference｝ is measured by the CPU 14, and similarly, the points t2 and t3 at which the pass / fail changes according to the change of the generation timing of the strobe signal are measured by the CPU 14.

As a result of this measurement, the relay ON time T
1. When the values of the bounce time T2 and the off time T3 are out of the range of the relay standard, if the relay is deteriorated, the CP
U14 determines. Relays RY2, RY3
Measurement.

[0046]

As described above, according to the present invention, the generation timing of the strobe signal output from the timing generator is changed to drive the relay control circuit to energize and deenergize the relay to be measured. The change in the voltage at the output terminal of the driver at the time of energization or deactivation is input to the comparator in accordance with the timing changed at the time of energization or deactivation, and the CPU makes a logical judgment of the output of the comparator. Detects deterioration before the IC breaks down, so that preventive replacement of the relay can be performed, erroneous determination of the IC to be measured due to the relay failure, and stoppage of the IC measuring device can be prevented beforehand, and the yield in the IC testing device can be improved. This has the effect of improving the operation rate of the device.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of a self-diagnosis device for an IC test device according to the present invention.

FIG. 2 is an output waveform diagram of a comparator for explaining the operation of the self-diagnosis device of the IC test device according to the present invention.

FIG. 3 is a block diagram showing a configuration of a conventional IC test apparatus.

[Description of Signs] 1 Driver 2 Comparator 3 Constant current load circuit 4 Waveform control unit 5 Constant current setting circuit 6 Relay control circuit 7 DC characteristic measuring device 12 Timing generator RY1 to RY3 Relay K1 to K3 Relay contact R1 Load

Claims (1)

[Claims] 1. A driver (1) which is driven by an output having a predetermined timing from a timing generator (12) to energize and deenergize relays (RY1) to (RY3) to be measured for deterioration to be measured. ) Is connected to or disconnected from the load (R1), and the driver (1) is operated in accordance with the energization and de-energization of the measured relays (RY1) to (RY3). The relay to be measured (R
A comparator (2) that compares the waveforms generated during the on time, bounce time and off time of (Y1) to (RY3) with the expected waveform, and outputs the measured relay from the comparison result of the comparator (2).
A self-diagnosis device for an IC test device, comprising: a central processing unit (14) for performing a logical judgment of pass / fail of (RY1) to (RY3).