JPH1069504A - Method and device for transforming logic circuit description data - Google Patents

Abstract

PROBLEM TO BE SOLVED: To unnecessitate the change of a design process after the logic circuit design of a differential integrated circuit by preparing differential logic circuit description data described in the manner of a single-phase logic circuit and transforming these prepared description data to conventional differential logic circuit description data later. SOLUTION: A transforming device LDC 1 for logic circuit description data is composed of a reading part 10, processing part 20 and output part 30. After the logic circuit design of the differential integrated circuit based on differential logic circuit description data D1 described in the manner of the single-phase logic circuit, the reading part 10 reads the differential logic circuit description data D1, which are described in the manner of the single-phase logic circuit, stored in a memory and the processing part 20 transforms the data read by the reading part 10 to differential logic circuit description data D2 based on a conventional description method according to a prescribed flow chart. The output part 30 changes the differential logic circuit description data D2 transformed by the processing part 20 into the format corresponding to a storage medium.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of converting logic circuit description data of an integrated circuit created using a circuit diagram description CAD into a format required in a subsequent process in the design of an integrated circuit. The present invention relates to a conversion device, and in particular, converts logic circuit description data suitable for a differential type integrated circuit that realizes high-speed operation by transmitting most of the signal transmission inside the integrated circuit by differential signals in a format required in a subsequent process. The present invention relates to an apparatus for converting logic circuit description data into data.

[0002]

2. Description of the Related Art FIG. 4 is a diagram showing conventional differential logic circuit description data D2.

The differential logic circuit description data D2 is a description example in which a logic circuit is described by a conventional method for designing a differential integrated circuit. In the differential logic circuit description data D2, when wiring between the respective terminals of the plurality of gates, it is necessary not only to connect the wiring for the positive phase signal but also to the negative phase signal. Further, when making such a wiring connection, it is necessary to treat a positive-phase signal and a negative-phase signal as a pair.

That is, as shown in FIG. 4, when describing the connection between the output terminal O1 of the gate G1 and the input terminal I2 of the gate G2, the output terminal * O1 of the gate G1 and the gate G2
There is a restriction on the wiring connection that the connection to the input terminal * I2 must also be described. If the restriction on the wiring connection is not satisfied, the circuit simulation cannot be performed normally, and a malfunction occurs when the circuit is actually driven.

Here, for example, the output terminal * O1 is a reverse-phase output terminal for outputting a signal of the opposite phase to the output signal at the normal-phase output terminal O1, and the input terminal * I2 is an input signal at the normal-phase input terminal I2. The input terminal is a negative-phase input terminal for inputting a signal having a negative phase, and an asterisk (*) after the terminal indicates that the terminal is a terminal for inputting or outputting a negative-phase signal.

On the other hand, in a logic circuit description of a single-phase integrated circuit in which signal transmission inside the integrated circuit is only a single-phase signal,
There is no restriction on the above wiring connection.

Further, in order to obtain inverted logic in a differential integrated circuit, a negative-phase signal is input to a terminal to which a positive-phase signal is input, and a positive-phase signal is input to a terminal to which a negative-phase signal is input. Must be entered. That is, in the conventional logic circuit description data D2 shown in FIG. 4, the gate G1 is used to input the inverted logic of the output signal of the gate G1 to the gate G3.
Is connected to the negative-phase input terminal * I3 of the gate G3.
And the inverted output terminal * O1 of the gate G1 is connected to the gate G
3 must be connected to the positive-phase input terminal I3.

[0008]

Therefore, in the above-mentioned conventional method, it is necessary to determine whether or not a predetermined connection is a connection for obtaining inverted logic based on a logic circuit description. Since it is necessary to accurately grasp the connection, there is a problem that it is complicated to determine whether or not the connection of interest is a connection for obtaining inverted logic based on the logic circuit description. In particular, when the two gates for which the inversion logic is to be checked are arranged at a large distance, the distance between the output terminal of one gate and the input terminal of the other gate is large. The work of visually tracing the connection wiring is very complicated.

In a logic circuit description of a single-phase integrated circuit in which signal transmission inside the integrated circuit is only a single-phase signal, when inverting logic is used, a gate having an inverter function is always used. If the gate having the inverter function is described, it can be determined that the inverted logic is taken. If the gate having the inverter function is not described, it can be determined that the inverted logic is not taken. Therefore, in a logic circuit description of a single-phase integrated circuit, it is easy to determine whether or not a predetermined connection is a connection for obtaining inverted logic based on the logic circuit description.

As described above, when a logic circuit of a differential integrated circuit is described by the conventional method, it is necessary to execute both the connection of the positive-phase signal and the connection of the negative-phase signal. There is a problem that the work of wiring connection when describing a logic circuit of a differential integrated circuit is twice the work of wiring connection when describing a logic circuit of a single-phase integrated circuit.

When a logic circuit of a differential integrated circuit is described by a conventional method, there is a possibility that a mistake in wiring connection or logic design which does not occur when a logic circuit of a single-phase integrated circuit is described. There is also a problem that there is.

According to the present invention, a logic circuit of a differential integrated circuit can be described with the same amount of work as a single-phase integrated circuit,
In addition, it is possible to reduce the description error of the logic circuit of the differential integrated circuit. In this case, it is possible to convert the logic circuit description data without having to change the design process after the logic circuit design of the differential integrated circuit. It is intended to provide such an apparatus.

[0013]

SUMMARY OF THE INVENTION The present invention relates to a differential integrated circuit for transmitting a differential signal between a positive-phase signal and a negative-phase signal obtained by inverting the positive-phase signal. It is described as a single-phase logic circuit in which the output terminal and the wiring connection of the positive-phase signal are described, and the description of the terminal for inputting and outputting the negative-phase signal and the wiring connection of the negative-phase signal are omitted. The differential logic circuit description data is described by a difference in which a terminal for inputting / outputting the positive-phase signal, a terminal for inputting / outputting the negative-phase signal, a wiring connection for the positive-phase signal, and a wiring connection for the negative-phase signal are described. It is converted into dynamic logic circuit description data.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, a method of describing differential logic circuit description data in a single-phase logic circuit will be described.

FIG. 3 is a diagram showing differential logic circuit description data D1 described as a single-phase logic circuit.

The circuit represented by "differential logic circuit description data D1 described as a single-phase logic circuit" shown in FIG.
This is the same as the circuit represented by "conventional differential logic circuit description data D2" shown in FIG.

First, a differential integrated circuit for transmitting a differential signal composed of a positive-phase signal and a reverse-phase signal obtained by inverting the signal is referred to as a “single-phase logic circuit” shown in FIG. In order to create like the described differential logic circuit description data D1 ”, only the terminal for inputting and outputting the positive phase signal and the wiring connection of the positive phase signal are described, and the terminal for inputting and outputting the negative phase signal is inverted. The description of the phase signal wiring connection is omitted.

That is, a normal phase output terminal O1 for outputting a normal phase signal at the gate G1, a normal phase input terminal I2 for inputting a normal phase signal at the gate G2, and a normal phase input terminal for inputting a normal phase signal at the gate G3. I3 is described, and a wiring connection for connecting a positive-phase output terminal O1 for outputting a positive-phase signal and a positive-phase input terminal I2 for receiving a positive-phase signal is described.
In this case, a negative-phase output terminal * O1 for outputting a negative-phase signal at the gate G1, a negative-phase input terminal * I2 for receiving a negative-phase signal at the gate G2, and a negative-phase input terminal for receiving a negative-phase signal at the gate G3. The description of * I3 is omitted, and the description of the wiring connection for connecting the negative-phase output terminal * O1 for outputting the negative-phase signal and the negative-phase input terminal * I2 for inputting the negative-phase signal is omitted. In order to distinguish the “differential logic circuit description data D1 described as a single-phase logic circuit” created as described above from the conventional single-phase logic circuit description data, the “single-phase logic circuit description data” is used. To the data D1.

By describing as described above, differential logic circuit description data can be described as a single-phase logic circuit. If the connection for inverting logic is not required, such a description is sufficient.

That is, in the above embodiment, when a differential integrated circuit for transmitting a differential signal of a positive-phase signal and a reverse-phase signal obtained by inverting the positive-phase signal is described, a terminal for inputting and outputting the positive-phase signal By describing the wiring connection of the positive-phase signal and the terminal for inputting / outputting the negative-phase signal and the wiring connection of the negative-phase signal, the differential logic circuit description data can be described as a single-phase logical connection. It is a circuit description.

In this way, by describing the differential logic circuit description data in a single-phase logic circuit, the amount of work for the data description is the same as the amount of work for describing the logic circuit of the single-phase integrated circuit. Therefore, the amount of work is reduced by half compared to the case where the logic circuit description of the differential integrated circuit is described in the same manner as in the related art. In the above embodiment,
Since it is not necessary to treat the positive-phase signal and the negative-phase signal as a pair, there is no room for a wiring connection error that violates the restriction that the positive-phase signal and the negative-phase signal need to be treated as a pair.

Next, in order to describe the connection for taking the inverted logic between the gates G1 and G3, the inverter INV1
Describe. In order to connect the output terminal O1 of the gate G1 for outputting the positive-phase signal and the input terminal I3 of the gate G3 for inputting the negative-phase signal, a wiring connection is described between the output terminal O1 and the input terminal I3. The inverter INV1 is described between the wiring connections.

That is, in the differential logic circuit description data, a description in which a positive-phase signal is input to the negative-phase input terminal and a negative-phase signal is input to the positive-phase input terminal is defined as a positive-phase output terminal, a positive-phase input terminal, Expressed by a wiring connection that connects the positive-phase output terminal and the positive-phase input terminal, and a predetermined symbol that is wired during the wiring connection that connects the positive-phase output terminal and the positive-phase input terminal. .

Conventionally, in order to obtain inverted logic in differential logic circuit description data, a negative-phase signal is input to a terminal to which a positive-phase signal is input, and a positive-phase signal is input to a terminal to which a negative phase signal is input. Must be entered. That is,
Conventionally, as shown in FIG. 4, in order to input the inverted logic of the output of the gate G1 to the gate G3, the output terminal O1 of the gate G1 is connected to the input terminal * I3 of the gate G3,
Output terminal * O1 of gate G1 and input terminal I of gate G3
3 is connected. However, in the description of the logic circuit in the above embodiment, it is only necessary to connect the positive-phase output terminal and the positive-phase input terminal via the virtual inverter INV1.
Wiring connection to input a negative-phase signal to the terminal to which the positive-phase signal of differential signal transmission was input is not required, and wiring connection to input the positive-phase signal to the terminal to which the negative-phase signal was input is unnecessary. (It is not necessary to obtain complicated inversion logic.) Therefore, it is possible to easily read from a circuit diagram or the like whether or not connection is made by taking inversion logic.

There is a case where a conventional single-phase signal is used instead of the differential signal for a part of signal transmission of the differential integrated circuit. In this case, in the above embodiment, in order to indicate that the predetermined signal is a single-phase signal, each terminal for inputting / outputting the single-phase signal is
An attribute indicating that the signal is a single-phase signal may be given. How to give this attribute depends on the format of the circuit description data, but it is possible to give such an attribute to a general circuit description CAD. Even when such an attribute is not provided, a rule for assigning terminal names may be set so as to distinguish between a single-phase signal and a differential signal.

In the above embodiment, the symbol of the inverter is used as a symbol for taking the inverted logic in order to easily understand that the inverted logic is used. Instead of INV1, another predetermined symbol such as a double circle symbol may be used.

By the way, the circuit simulation cannot be performed and the actual circuit pattern cannot be drawn with the differential logic circuit description data D1 described as a single-phase logic circuit as it is. It is necessary to change the design process after the logic circuit design of the dynamic integrated circuit. That is, it is necessary to convert the differential logic circuit description data D1 described as a single-phase logic circuit into conventional differential logic circuit description data D2.

Next, an apparatus for converting the differential logic circuit description data D1 described as a single-phase logic circuit into the conventional differential logic circuit description data D2 will be described.

FIG. 1 is a block diagram showing a logic circuit description data converter LDC1 according to an embodiment of the present invention. FIG. 2 is a flowchart showing a conversion operation of the logic circuit description data by the conversion device LDC1.

Logic circuit description data converter LDC1
Is a device for converting the differential logic circuit description data D1 described as a single-phase logic circuit into conventional differential logic circuit description data D2, and includes a reading unit 10, a processing unit 20, and an output unit 3.
0. The reading unit 10 is a unit that reads differential logic circuit description data D1 described in a single-phase logic circuit stored in a memory or the like (not shown). The processing unit 20 reads the data read by the reading unit 10. According to the flowchart shown in FIG. 2, the output unit 30 converts the differential logic circuit description data converted by the processing unit 20 into differential logic circuit description data D2 which is data according to a conventional description method. This is a part for changing the format according to a storage medium such as a disk.

Next, the operation of the above embodiment will be described with reference to the flowchart shown in FIG.

First, differential logic circuit description data D1 described as a single-phase logic circuit is stored in a predetermined memory as data including a list of gates, and a list of input terminals and output terminals of the gates. Differential logic circuit description data D1 in which the reading unit 10 is described as a single-phase logic circuit from a memory
Is read (S0), and it is determined whether or not a wiring connected to the output terminal Oj of the predetermined gate should be converted into a differential description (S1). The material for determining whether or not the wiring connected to the output terminal Oj of the gate should be converted into the differential description is defined in the list read by the reading unit 10. In some cases, a single-phase logic circuit exists as a part of the dynamic logic circuit. In this case, the wiring connected to the output terminal Oj of the gate should not be converted into a differential description, so the conversion work is stopped. Then, conversion is performed for the next output terminal (S
21).

If it is determined that the wiring connected to the output terminal Oj of the gate should be converted into a differential description (S
1) The output terminal of the output terminal Oj is defined as * Oj in order to prepare for the future processing (S2). Then, the input terminal Iy of the gate x connected to the output terminal Oj is searched from the list of the gates via the virtual inverter INV1 for the inverted logic of the differential signal and its wiring (S
3). In addition, in preparation for future processing, the input terminal opposite to the input terminal Iy is defined as * Iy (S4).

Here, if the number of the inverters INV1 provided between the output terminal Oj and the input terminal Iy is 0 or even (S5), there is no need to provide the inverter. In this case, first, the output terminal O
j, the wiring connecting the input terminal Iy is deleted, and the inverter INV1 provided therebetween is also deleted (S
6) The wiring connecting the output terminal Oj and the input terminal Iy and the wiring connecting the output terminal * Oj and the input terminal * Iy are added to the output data (S7, S8).

On the other hand, if the number of inverters INV1 provided between the output terminal Oj and the input terminal Iy is an odd number (S5), inverted logic is applied between two gates sandwiching the inverter INV1. When connected. In this case, first, the output terminal Oj and the input terminal Iy
And the inverter provided therebetween is also deleted (S16), the wiring connecting the positive-phase output terminal Oj and the negative-phase input terminal * Iy, and the negative-phase output terminal * Oj And a wiring connecting the positive-phase input terminal Iy to the output data (S17, S18).

After the above, if the search for the connection between the output terminal Oj and the input terminal Iy in step S3 is not completed yet (S20), the process returns to step S3. If the search is completed (S20), the next step is performed. The same operation as described above is executed for the output terminal Oj (S1 to S20). If the conversion for all the output terminals of the gate of interest is completed (S21), the above operation (S1) is performed for the next gate. ~
(S20) is executed (S21). Until the conversion of the description data to be converted has been completed for all the gates, the same operations (S1 to S21) are executed (S2).
2), the conversion into the differential logic circuit description data ends.

That is, in the above embodiment, when describing a differential integrated circuit for transmitting a differential signal of a positive-phase signal and a negative-phase signal obtained by inverting the signal, a terminal for inputting and outputting the positive-phase signal And the positive-phase signal wiring connection, and the differential logic described as a single-phase logic circuit in which the description of the negative-phase signal input / output terminal and the negative-phase signal wiring connection is omitted. A circuit input / output terminal for inputting and outputting the circuit description data;
A method of converting logic circuit description data into differential logic circuit description data in which terminals for inputting / outputting the negative phase signal, wiring connection of the positive phase signal, and wiring connection of the negative phase signal are described. is there. In this method, the inverter IN
The case where V1 is not used is also included. In other words, a positive-phase signal is input from a terminal that outputs a positive-phase signal, and a negative-phase signal is only input from a terminal that outputs a negative-phase signal. A negative-phase signal is input from a terminal that outputs a positive-phase signal. This also includes the case of converting differential logic circuit description data that does not receive a positive-phase signal from a terminal that outputs a negative-phase signal.

In the above embodiment, after the differential logic circuit description data described as a single-phase logic circuit is created, the created description data is surely converted to conventional differential logic circuit description data. Therefore, it is not necessary to change the steps after the creation of the differential logic circuit description data described as a single-phase logic circuit from the conventional example.

Further, the above-described conversion method can be understood as a conversion device for logic circuit description data. For example, the memory for storing the program of the flowchart shown in FIG. 2 and a predetermined CPU can realize the logic circuit description data converter. That is, when describing a differential integrated circuit that transmits a differential signal between a positive-phase signal and a reverse-phase signal obtained by inverting the positive-phase signal, the logic circuit description data converter inputs and outputs the positive-phase signal. The difference described in a single-phase logic circuit in which the description of the terminal to be connected and the wiring connection of the positive-phase signal and the description of the terminal for inputting and outputting the negative-phase signal and the wiring connection of the negative-phase signal are omitted. The dynamic logic circuit description data is described by describing a terminal for inputting and outputting the positive-phase signal, a terminal for inputting and outputting the negative-phase signal, wiring connections for the positive-phase signal, and wiring connections for the negative-phase signal. Is a converter for converting logic circuit description data into differential logic circuit description data.

[0040]

According to the present invention, a logic circuit of a differential integrated circuit can be described with the same amount of work as a single-phase integrated circuit, and a logic circuit of a differential integrated circuit can be described. Errors can be reduced, and in this case, there is an effect that it is not necessary to change the design process after the logic circuit design of the differential integrated circuit.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a logic circuit description data conversion device LDC1 according to an embodiment of the present invention.

FIG. 2 is a flowchart showing a conversion operation of a logic circuit description data by a conversion device LDC1.

FIG. 3 is a diagram showing differential logic circuit description data D1 described as a single-phase logic circuit.

FIG. 4 is a diagram showing conventional differential logic circuit description data D2.

[Explanation of symbols]

LDC1 ... Logic circuit description data converter, 10 ... Reader, 20 ... Processor, 30 ... Output, D1 ... Differential logic circuit description data described as a single-phase logic circuit, D2 ... Conventional differential logic Circuit description data, G1, G2, G3 ... gate, INV1 ... inverter.

Claims (8)

[Claims] When describing a differential integrated circuit for transmitting a differential signal of a positive-phase signal and a negative-phase signal obtained by inverting the positive-phase signal, a terminal for inputting and outputting the positive-phase signal and the positive-phase signal The differential logic circuit description data described as a single-phase logic circuit in which the description of the wiring connection of the opposite phase signal and the terminal for inputting / outputting the opposite phase signal is omitted. Differential logic circuit description data describing a terminal for inputting / outputting the positive-phase signal, a terminal for inputting / outputting the negative-phase signal, wiring connections for the positive-phase signal, and wiring connections for the negative-phase signal. A method for converting logic circuit description data, comprising: 2. The single-phase signal according to claim 1, wherein a predetermined symbol is inserted between an output terminal for outputting the in-phase signal and an input terminal for inputting the in-phase signal. Differential logic circuit description data described in a logical circuit, a positive-phase output terminal and a negative-phase output terminal are provided as the output terminals, and a positive-phase input terminal and a negative-phase output terminal are provided as the input terminals. A method for converting logic circuit description data, comprising: connecting the negative-phase input terminal to the positive-phase output terminal; and converting the differential circuit description data to connect the positive-phase input terminal to the negative-phase output terminal. . 3. The wiring according to claim 2, wherein when the predetermined symbol is 0 or even, the wiring connecting an output terminal of a predetermined gate and an input terminal of another gate is provided. Deleting a predetermined symbol; adding a wire connecting a positive-phase output terminal of the output terminal of the predetermined gate to a positive-phase input terminal of the input terminal of the another gate; Adding a wiring for connecting the negative-phase output terminal of the output terminal of the gate and the negative-phase input terminal of the input terminal of the other gate; on the other hand, when the predetermined symbol is an odd number, Removing the wiring connecting the output terminal of the predetermined gate to the input terminal of another gate and the predetermined symbol; and outputting the positive-phase output of the output terminal of the predetermined gate. The reverse of the terminal and the input terminal of the other gate Adding a wire connecting the input terminal; and adding a wire connecting the negative-phase output terminal of the output terminal of the predetermined gate and the positive-phase input terminal of the input terminal of the other gate. A method for converting logic circuit description data, the method being performed. 4. The method according to claim 2, wherein the predetermined symbol is a symbol of an inverter. 5. A differential integrated circuit for transmitting a differential signal of a positive-phase signal and a negative-phase signal obtained by inverting the positive-phase signal, a terminal for inputting / outputting the positive-phase signal and the positive-phase signal The differential logic circuit description data described as a single-phase logic circuit in which the description of the wiring connection of the opposite phase signal and the terminal for inputting / outputting the opposite phase signal is omitted. Differential logic circuit description data describing a terminal for inputting / outputting the positive-phase signal, a terminal for inputting / outputting the negative-phase signal, wiring connections for the positive-phase signal, and wiring connections for the negative-phase signal. An apparatus for converting logic circuit description data, comprising: 6. When describing a differential integrated circuit for transmitting a differential signal of a positive-phase signal and a negative-phase signal obtained by inverting the positive-phase signal, a terminal for inputting / outputting the positive-phase signal and the positive-phase signal The description of the differential logic circuit description data as a single-phase logic circuit by omitting the description of the terminal for inputting / outputting the opposite-phase signal and the description of the wiring connection of the opposite-phase signal. A method for creating differential logic circuit description data, characterized in that: 7. The positive-phase output terminal according to claim 6, wherein the description of inputting a positive-phase signal to the negative-phase input terminal and inputting the negative-phase signal to the positive-phase input terminal in the differential logic circuit description data includes: A predetermined phase wired during a positive phase input terminal, a wiring connection that connects the positive phase output terminal and the positive phase input terminal, and a wiring connection that connects the positive phase output terminal and the positive phase input terminal. A method for creating differential logic circuit description data, characterized by being represented by symbols. 8. The method according to claim 7, wherein the predetermined symbol is an inverter symbol.