JPH1068758A - Supporting device for semiconductor device, carrier for testing semiconductor device, fixing method for semiconductor device, method for separating semiconductor device from supporting device, and method for mounting semiconductor device on carrier for testing - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the coming-off of a semiconductor device by the vibration or the like during the conveying, by installing a wiring to be brought into contact with an electrode of a semiconductor device, on a base, and pressing and fixing a supporting plate of the semiconductor device to the base by the magnetic force of a magnet and a magnetic member. SOLUTION: A recessed part 42 in which a rubber elastic body 43 is buried, is installed on an upper face of a wiring board for testing 41, a contact terminal 45 is installed on the inner edge parts of plural patterns for testing 44, and plural magnetic members 47 are buried around the elastic body 43. A recessed part 52 for supporting a bare chip 40 is formed in opposition to the elastic body 43 on a supporting base 51, and a permanent magnet 54 is installed in opposition to the magnetic member 47. A handling head 50 is moved for positioning the supporting base 51 in opposition to an upper part of the wiring board 41, the position is adjusted by a position recognizing camera 55, an image processing unit 56 and a driving mechanism 37, and the electrode 40a of the bare chip 40 and the contact terminal 45 are corresponded to each other by 1:1. The handling head 50 is lowered, so that the magnet and the magnetic member 47 are attracted, and strongly fixed, thereby, preventing the dislocation caused by the vibration or the like.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for supporting a semiconductor device, a method for fixing the semiconductor device, and a method for detaching the semiconductor device from the support device. The present invention relates to a supporting device for supporting a semiconductor device on a test board or a test board, a method for fixing the semiconductor device, and a method for detaching the fixed semiconductor device.

[0002]

2. Description of the Related Art In recent years, the degree of integration of semiconductor integrated circuits (LSIs) has been remarkably increasing, and at the same time, the tendency of downsizing of electronic devices has been remarkable. To meet these demands, LSI
In addition to the high integration of the elements described above, there are also many factors that depend on high-density mounting technology for semiconductor chips.

[0003] From such a background, the density of bare chip electrodes of LSI and CSP (Chip Size Package) terminals of LSI have been increased. When supplying such an LSI to a user as a product, a thermal acceleration test (hereinafter referred to as a BI (Burn In) test) for detecting an initial failure of the LSI,
A final test (Final Test (FT)) is performed. The BI test is a test for examining electrical characteristics of a semiconductor integrated circuit under heating.

[0004] In such a test, it is necessary to align the bare chip electrodes with the contact terminals on the test substrate and the CSP terminals with the contact terminals on the test substrate. In order to align the bare chip or the CSP, for example, a test substrate having an alignment wall or a groove formed on the test substrate may be used. (Mechanical alignment) ".

However, since the bare chip is shaped by cutting (dicing) the semiconductor wafer, the outer dimensions of the bare chip vary, and the positions of the bare chips relative to the outer shapes of the electrodes also vary. For this reason, the electrodes of the bare chip and the contact terminals on the test substrate cannot be accurately positioned. In addition, since there is a gap (clearance) for connecting the test substrate and the bare chip, a positional shift easily occurs in the gap.

Accordingly, a method has been developed in which the alignment between the electrodes of the bare chip and the contact terminals of the test substrate is performed by image recognition. In this method, the positions of the bare chip electrodes and the contact terminals on the test substrate are recognized by an image processing device, and the positions of the electrodes and the contact terminals are compared. This is a method of moving the bare chip to eliminate the deviation.

In order to align and fix the test substrate and the bare chip, a support 1 as shown in FIGS. 30 (a) and 30 (b) is used.
Is used. The support 1 has a holding plate 3 having a ventilation hole 2 and a latch portion 4. And
The handling head 10 passes through the ventilation hole 2 of the holding plate 3.
While supporting the semiconductor device 20 in a bare chip state by the suction force from the device, the alignment is performed using an image recognition device, and then the handling head 10 is lowered to lower the semiconductor device 20.
And the contact terminals 23 of the test substrate 22 are brought into contact with each other. In this case, latch portions 4 are present on both sides of the holding plate 3, and the latch portions 4 are configured to be hooked on the flange 24 of the test substrate 22.

Accordingly, the semiconductor device 20 is pressed and fixed to the test substrate 22 by the holding plate 3. As shown in FIG. 31, such a support 1 is used to fix a CSP type semiconductor device 30 to a test substrate 31 and contact the terminals 31 of the semiconductor device 30 with the contact terminals 33 on the test substrate 32. Can also be used. In this case, the latch section 4 of the support 1 is engaged with the bottom of the test board 32 through the latch hole 34.

[0009]

However, in such a support 1, the latch section 4 is provided with the test substrates 22, 32.
When clicking, the holding plate 3 is often shaken by the impact from the latch unit 4 and the positions of the semiconductor devices 20 and 30 are displaced, so that re-alignment is required. SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device support device, a semiconductor device fixing method capable of fixing a semiconductor device to a test substrate without displacement, and a semiconductor device support device capable of easily removing a fixed semiconductor device. It is to provide an exit method.

[0010]

[Means for Solving the Problems]

(Means) (1) The above-described problem is caused by the problem that the electrodes 40a or the terminals 9 of the semiconductor devices 40 and 90 are provided as illustrated in FIGS.
Substrates 41, 9 having wirings 45, 94 on which Oa is superimposed
5, a support 51 that supports the semiconductor devices 40 and 90 and presses the semiconductor devices 40 and 90 against the substrates 41 and 95, and is attached to one of the support 51 and the substrates 41 and 95. And a magnetic portion 47, 97 made of a magnetic material provided on one of the substrate 41, 95 or the support body 51 so as to face the magnet 54. Settle by device.

In the above-described semiconductor device supporting device,
A magnetic field generator 57 is provided for applying a magnetic field in a direction opposite to that of the magnet 54 to the magnetic units 47 and 97. In the above-described device for supporting a semiconductor device, the support 51 may be used.
And a handling head that sucks the semiconductor devices 40 and 90 through the ventilation holes 53.

In the above-described semiconductor device supporting device,
As illustrated in FIG. 5 or FIG. 15, the semiconductor device 4 is provided on either the support 51 or the substrates 41 and 95.
A magnetic shield 76 surrounding 0, 90 is formed. In the above-described device for supporting a semiconductor device, as illustrated in FIG. 1, an elastic body 43 is embedded in the substrate 41 below a portion of the wiring 44 on which the semiconductor device 40 is mounted. And

In the above-described supporting device for a semiconductor device,
As illustrated in FIG.
Is a pin 94 made of an elastic material, and is arranged in a concave portion 96 formed in the substrate 95. The lower end of the pin 94 protrudes outside from the bottom of the substrate. In the above-described device for supporting a semiconductor device, as illustrated in FIG. 14, the wiring 44 is formed on an insulating sheet 75, and the insulating sheet 75 is formed on the substrate 41. And

In the above-described device for supporting a semiconductor device,
An anisotropic conductive film 108 having a lower resistance in the vertical direction than in the horizontal direction is placed on a portion of the wiring 94 on the substrate 95 that contacts the electrode or the terminal 90 a of the semiconductor device 90. Features. As illustrated in FIGS. 1A and 1B, the semiconductor device 40 is sucked by the handling head 50 through the ventilation hole 53 formed in the support body 51, and the semiconductor device 40 is interposed between the semiconductor device 40 and the handling head 50. With the support 51 interposed, the handling head 5
0, the support 51 and the semiconductor device 40 are moved to face the substrate 41 at an interval, and the support 51 and the substrate 41 are moved by the handling head 50 so that the electrode 40a of the semiconductor device 40 or The terminal is opposed to the wiring 44 on the substrate 41, and the support 51 is moved toward the substrate 41 to contact the electrode 40 a or the terminal of the semiconductor device 40 with the wiring 44, and The problem is solved by a method of fixing a semiconductor device, comprising a step of magnetically attracting and fixing the substrate 51 and the substrate 41 to release the suction of the semiconductor device 40 by the handling head 50.

Also, the terminals or electrodes of the semiconductor device 40 come into contact with the wiring of the substrate, the semiconductor device 40 is pressed against the substrate by the support 51, and the substrate and the support 51
And a magnetic field opposite to the magnetic field of the magnet 51 is generated through the magnetic piece 47 while being fixed by the attraction force of the magnetic piece 47, and the repulsive force of the magnet 54 and the magnetic piece 47 causes the support 51 to be The problem is solved by a method of separating the semiconductor device from the supporting device, wherein the substrate 41 is separated. (2) As shown in FIGS. 7 and 10, the above-described problem is caused by the wirings 44, 72 on which the electrodes 40a or the terminals 90a of the semiconductor devices 40, 90 are overlapped, and the insertion holes formed between the wirings 44, 72. Substrates 41A, 71 having 41c, 73
And magnetic field generating portions 47a, 57, 92 inserted into the insertion holes 41c, 73 of the substrates 41A, 71, and the semiconductor device 40m90, which is mounted on the substrates 41, 71 and supports at least the insertion holes. The problem is solved by a semiconductor device support device characterized in that the portions facing the portions 41c and 73 have the supports 60 and 80 formed of a magnetic material.

In the above device for supporting a semiconductor device,
The magnetic field generators 47a, 57 and 92 are magnetic cores 47a and 92 around which the coil 57 is wound.
In the semiconductor device support device described above, the semiconductor devices 40, 90 are formed through the ventilation holes 63a, 83a formed in the supports 60, 80 and the ventilation holes 63a, 83a.
And a handling head 50 for sucking the air.

In the above device for supporting a semiconductor device,
The support members 60 and 80 have pressing portions 61 and 81 having springs 66 and 86 for pressing the semiconductor devices 40 and 90 against the substrates 41A and 71, respectively. In the above-described device for supporting a semiconductor device, as shown in FIG. 18, the wiring of the substrate is formed by a pin 103 made of an elastic material.
And being arranged in a recess formed in the substrate. The pins 103 protrude outside from the bottom of the substrate.

In the above device for supporting a semiconductor device,
As illustrated in FIG. 17, the wiring 44 and the substrate 41
An insulating sheet 75 is interposed between A. In the above-described supporting device for a semiconductor device, the semiconductor device 9 among the wirings 72 on the substrate 71 may be used.
A feature is that an anisotropic conductive film 108 having a lower resistance in the vertical direction than in the horizontal direction is placed in a portion in contact with the zero electrode or the terminal 90a.

As shown in FIGS. 7 to 9, the above-mentioned problem is caused by the semiconductor head 40 being sucked by the handling head 50 through the ventilation holes 61a formed in the support member 60, and the semiconductor head 40 and the handling head 50 being connected to each other.
A part of the support 60 is sandwiched between the support 60 and the semiconductor device 4 by the handling head 50.
0 to move the support body 60 and the substrate 41A by the handling head 50 so that the electrode 40a of the semiconductor device 40 is moved.
Alternatively, the terminal is made to face the wiring 44 on the substrate 41A, and the support 60 is moved toward the substrate 41A to bring the electrode 40a or the terminal of the semiconductor device 40 into contact with the wiring 44, and The body 60 and the substrate 41A are magnetically attracted, and the support body 60 is mechanically fixed to the substrate 41A. Then, the suction of the semiconductor device by the handling head and the support body and the substrate are performed. The problem is solved by a method for fixing a semiconductor device, comprising a step of releasing magnetic attraction.

(3) The above-mentioned problem is solved by a plurality of electrode terminals 4
Substrate 111 for mounting a semiconductor device having the same Oa
And a plurality of contact terminals 115 provided on the substrate 111 corresponding to the arrangement pattern of the electrode terminals 40a.
A plurality of test wiring patterns 116 connected to the electrode terminals 40a and provided on the substrate 111, and made of a flexible material, covering the semiconductor device 40;
The problem is solved by a test carrier having a support 112 for pressing the semiconductor device 40 against the substrate 111 and an adhesive for fixing the support 112 to the substrate 111.

The support 112 is made of a flexible thin film, and a holding plate 114 made of a rigid material is formed on the thin film so as to surround a region where the semiconductor device 40 is mounted. The problem is solved by the test carrier according to the present invention, which is characterized by the following. A substrate 121 on which the semiconductor device 40 having a plurality of electrode terminals 40a is mounted; a plurality of contact terminals provided on the substrate 121 corresponding to the arrangement pattern of the electrode terminals 40a; To the substrate 121
A plurality of test wiring patterns provided thereon, a support member made of a flexible material, covering the semiconductor device and pressing the semiconductor device, and a magnet provided on a part of the substrate 125 and a magnetic carrier 123 provided on a part of the support.

Further, the problem is solved by the test carrier according to the present invention, wherein the material of the substrate has a higher coefficient of thermal expansion than the coefficient of thermal expansion of the material of the support. further,
The substrate includes a first layer 141 and a second layer 142 formed on the first layer 141 and formed of a material having a lower coefficient of thermal expansion than the material of the first layer 141. The test carrier according to the present invention is characterized in that the support 144 is fixed on the second layer 142.

Further, the problem is solved by the test carrier according to the present invention, wherein a groove is provided on the side of the first layer 141 which is not in contact with the second layer 142. Further, the problem is solved by the test carrier according to the present invention, wherein the support 151 is formed of a flexible thin film, and a large number of holes are formed in the support in a matrix.

A substrate 181 on which a semiconductor device having a plurality of electrode terminals 40a is mounted, and a support 182 made of a flexible material which covers the semiconductor device 40 and presses the semiconductor device 40, , The electrode terminal 40
a plurality of contact terminals 184 provided on the support 182 corresponding to the arrangement pattern a, a plurality of test wiring patterns 183 connected to the contact terminals 184 and provided on the support 182, The support 182
And an adhesive for fixing the substrate 181 to the substrate. further,
The problem is solved by the test carrier according to the present invention, wherein the support is made of a flexible thin film.

The support 192 has a plurality of through holes at least in a region in contact with the semiconductor device 40, and has a surface in contact with the semiconductor device 40, in the through hole 194, and through the through hole 194. The problem is solved by the test carrier according to the present invention, wherein a metal film 193 is attached to the support 192 on the opposite surface.

Further, the problem is solved by the test carrier according to the present invention, wherein the support 162 is made of an adhesive material such as clay or gel. Further, the problem is solved by the test carrier according to the present invention, wherein the support 172 is made of a material that contracts by heat. (4) The above-described problem is solved by the problem that the substrate 201 on which the semiconductor device 40 having the plurality of electrode terminals 40a is mounted and the substrate 20 corresponding to the arrangement pattern of the electrode terminals 40a.
1, a plurality of contact terminals provided on the substrate 201, the plurality of test wiring patterns connected to the contact terminals, the plurality of test wiring patterns provided on the substrate 201, and the semiconductor device 40. A step of preparing a test carrier having a support 203 pressed against the substrate 201 and a hole 202 provided in a part of a region of the substrate 201 on which the semiconductor device 40 is mounted; Mounting the semiconductor device 40 on the substrate 201, adsorbing the semiconductor device 40 from the hole 202, and fixing the semiconductor device 40 on the substrate 201, and holding the fixed state while maintaining the fixed state. Covering the semiconductor device 40 and the substrate 201 with each other, and fixing the support 203 on the substrate 201. Solved by mounting a semiconductor device to.

A substrate 211 for mounting the semiconductor device 40 having a plurality of electrode terminals 40a; a plurality of contact terminals provided on the substrate 211 corresponding to the arrangement pattern of the electrode terminals 40a; A plurality of test wiring patterns connected to the contact terminals and provided on the substrate 211; and a support body 213 that covers the semiconductor device 40 and presses the semiconductor device 40 against the substrate 211. A projection 21 provided on the substrate 211 so as to surround an area where the semiconductor device 40 is mounted.
Preparing a test carrier provided with the semiconductor device 40, mounting the semiconductor device 40 in a region of the substrate 211 surrounded by the protrusion 212, and fixing the support 213 on the substrate 211. And mounting the semiconductor device 40 on the substrate 211 by mounting the semiconductor device on a test carrier.

Further, a substrate 221 for mounting the semiconductor device 40 having a plurality of electrode terminals 40a and the substrate 221 corresponding to the arrangement pattern of the electrode terminals 40a.
A plurality of contact terminals provided thereon, a plurality of test wiring patterns connected to the electrode terminals, a plurality of test wiring patterns provided on the substrate, and the semiconductor device 40; Preparing a test carrier provided with a hole 223 in a part of a region of the support 222 that is in contact with the semiconductor device 40; and forming a hole 223 in the support 222. Adsorbing the semiconductor device 40 via the substrate 222 and pulling up the semiconductor device 40 together with the support 222; placing the semiconductor device 40 and the support 222 on the substrate 221; Fixing the semiconductor device on the substrate 221 and mounting the semiconductor device 40 on the substrate 221. To solve by the biasing method.

(Operation) Next, the operation of the present invention will be described. According to the present invention, when a support for pressing a semiconductor device against a substrate is fixed, the substrate and the support are fixed by magnetic force. For this reason, even if vibration occurs during the transfer to the test furnace or the test after the semiconductor device is mounted on the substrate, the semiconductor device is less likely to come off the substrate.

When a permanent magnet is used to fix the substrate and the support, the substrate and the support are easily separated from each other by generating a magnetic field in a direction opposite to that of the permanent magnet.
Since the semiconductor device may malfunction due to the permanent magnet, it is preferable to attach a magnetic shield surrounding the semiconductor device to the substrate or the support. When a semiconductor device is mounted on a substrate, a handling head that suctions the semiconductor device to the support through a vent provided in the support is used.
When the support and the semiconductor device are mounted on the substrate, no deviation of the semiconductor device with respect to the support occurs.

Further, by embedding the elastic body in the substrate below the wiring, it is possible to prevent an excessive pressing force from being applied between the terminal or electrode of the semiconductor device and the wiring on the substrate. The elastic body may be a rubber-like material, or may be an elastic pin. When the pin is projected from the bottom of the board, it can be used as a socket plug. In addition, if an insulating sheet is interposed between the substrate and the wiring thereon, the substrate can be formed of a conductor or a magnetic metal, so that it is not necessary to embed a magnetic piece in the substrate or the support. In other words, the substrate can be used for electrical shielding.

In the case of employing a structure in which the support is finally mechanically fixed to the substrate, a magnetic force may be used to temporarily press the semiconductor device against the substrate by the support. When a latch mechanism is employed as a mechanical fixing structure, the magnetic force may be removed because the fixing is stabilized after the support and the substrate are fixed by the latch mechanism. Further, according to the test carrier according to the present invention, since a flexible material such as a thin film is used for the support that covers the semiconductor device and presses it against the substrate, it flexibly follows the shape of the semiconductor device. The pressure can be surely brought into close contact.

Therefore, even if the semiconductor device is subjected to vibration during the transportation or the BI test, it is possible to prevent the semiconductor device from being shifted from a predetermined position. Therefore, it is possible to maintain a good electrical connection state during the test process. Further, in the test carrier according to the present invention, the support is made of a flexible thin film, and a holding plate made of a rigid material is formed so as to surround a region around the thin film where the semiconductor device is mounted. Have been. For this reason, even when an external force that cannot absorb a shock by the thin film alone is applied to the test carrier, it is possible to suppress the semiconductor device from being displaced by the holding plate as much as possible.

According to the test carrier of the present invention, the substrate has a substrate and a support, a magnet is provided on a part of the substrate, and a magnetic material is provided on a part of the support. And the support can be fixed by the magnet and the magnetic material. In the test carrier according to the present invention, a material having a higher coefficient of thermal expansion of the material of the substrate than the coefficient of thermal expansion of the material of the support is used. When the carrier is heated, the substrate expands more than the support, so that the support receives tensile stress due to a difference in expansion coefficient.

Since the semiconductor device is further pressed and adhered to the substrate by the tensile stress, it is possible to maintain a better electrical connection state during the test process. Also,
In the test carrier according to the present invention, the substrate is formed of a first layer and a second layer formed on the first layer and made of a material having a lower coefficient of thermal expansion than the material of the first layer. And a support is fixed on the second layer.

Therefore, when the test carrier is heated, the substrate warps to the first layer due to the difference in the coefficient of thermal expansion, and the support receives a tensile stress. The semiconductor device is further pressed and adhered to the substrate by the tensile stress, so that a good electrical connection state can be maintained during the test.
Further, in the test carrier according to the present invention,
Since the groove is provided on the surface of the layer opposite to the second layer, the substrate is largely warped toward the first layer, so that the semiconductor device is further pressed against and adhered to the substrate, and good electrical The connection state can be maintained during the test.

In the test carrier according to the present invention, the support is formed of a flexible thin film, and the support has a large number of holes formed in a matrix.
It becomes possible to fit the shape of the bare chip more flexibly than the support having no holes. In addition, since the semiconductor device is directly exposed to the outside air, there is an advantage that the heat dissipation effect is large as compared with the case where the semiconductor device is covered with a thin film having no holes.

Further, in the test carrier according to the present invention, the plurality of contact terminals provided corresponding to the electrode terminals and the plurality of test wiring patterns provided in connection with the electrode terminals are made of a flexible material. Provided on the support. Therefore, even if vibration is applied to the test carrier,
Since the contact terminals move up and down flexibly, a good contact state with the electrode terminals of the semiconductor device can be maintained. Further, even if the flatness of the electrode terminals of the semiconductor device varies, it can be pressed flexibly, so that a good contact state can be maintained.

Further, in the test carrier according to the present invention, the support has a plurality of through holes at least in a region in contact with the semiconductor device, and has a surface in contact with the semiconductor device, an inside of the through hole, and an opposite through the through hole. A metal film is attached to the support on the side surface. For this reason,
Since the semiconductor device directly contacts the outside air from the through hole, the heat radiation effect is enhanced. In addition, since a metal film having good heat dissipation properties is coated on the part directly in contact with the semiconductor device and on the surface on the opposite side via the through hole, compared with a case where the through hole is simply formed in the thin film. Further, the heat radiation effect is further enhanced, and a good BI test can be performed. This is particularly effective when applied to a device that generates a large amount of heat.

In the test carrier according to the present invention, since the support is made of an adhesive such as gel or clay, it is possible to further reduce the impact as compared with the case where a thin film or the like is used. Become. Furthermore, in the test carrier according to the present invention, since the support is made of a material that contracts due to heat, when heated in the BI test,
The support contracts and a tensile stress is applied. Since the semiconductor device comes into close contact with the substrate due to the tensile stress, it is possible to maintain a good electrical connection state even during a BI test or the like.

According to the method of mounting a semiconductor device on a test carrier according to the present invention, a substrate for mounting a semiconductor device having a plurality of electrode terminals and a substrate provided on the substrate corresponding to the electrode terminals are provided. A plurality of test terminals connected to the electrode terminals, a plurality of test wiring patterns provided on the substrate, and a support for covering the semiconductor device and pressing the semiconductor device. Prepare a test carrier provided with holes in a part of the area where the device is mounted, place the semiconductor device on the substrate, adsorb the semiconductor device from the hole, and fix the semiconductor device on the substrate. I have.

For this reason, the semiconductor device is fixed on the substrate by suction even when the semiconductor device is coated and pressed by using the support after that, so that the semiconductor device is not easily displaced by vibration or the like, and the semiconductor device is reliably mounted. It can be mounted on a substrate.

Further, according to the method of mounting a semiconductor device on another test carrier according to the present invention, a substrate on which a semiconductor device having a plurality of electrode terminals is mounted, and a substrate on the substrate corresponding to the electrode terminals. A plurality of contact terminals provided on the substrate, a plurality of test wiring patterns connected to the electrode terminals, a plurality of test wiring patterns provided on the substrate, and a support for covering the semiconductor device and pressing the semiconductor device; A test carrier provided with a projection provided on a substrate so as to surround a region where a device is mounted is prepared, and a semiconductor device is mounted on a region of the substrate surrounded by the projection.

For this reason, even when the semiconductor device is subsequently covered with the support, the semiconductor device is prevented from being displaced by the projection, so that the semiconductor device can be securely mounted on the substrate. According to the method for mounting a semiconductor device on another test carrier according to the present invention, a substrate for mounting a semiconductor device having a plurality of electrode terminals and a substrate provided on the substrate corresponding to the electrode terminals are provided. The plurality of contact terminals and the plurality of test wiring patterns connected to the electrode terminals and provided on the substrate, and cover the semiconductor device,
And a support for pressing the semiconductor device, a test carrier provided with a hole in a part of the region of the support in contact with the semiconductor device is provided, and the semiconductor device is sucked through the hole of the support. Then, the semiconductor device is sucked together with the support, and the semiconductor device and the support are placed on the substrate. Therefore, the semiconductor device is placed on the substrate, and then the support is placed on the substrate and the semiconductor device. The number of steps can be reduced as compared with the case of performing coating.

[0045]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention. First Embodiment FIGS. 1A and 1B show a method of mounting a semiconductor device on a test carrier according to a first embodiment of the present invention.

The test carrier shown in FIGS. 1A and 1B has a test wiring substrate 41 and a support substrate 51 sandwiching a chip (hereinafter, referred to as a bare chip) on which a semiconductor integrated circuit is formed. One side of the test wiring board 41 is
5 to 10 mm larger than one side. Also,
The test wiring substrate 41 and the support substrate 51 are formed of an insulating non-magnetic material such as Al2O3 or a resin (PES, PEI, epoxy resin containing glass).

A concave portion 42 is formed in a region near the center of the upper surface of the test wiring board 41, and a rubber elastic body 43 is embedded in the concave portion 42. On the upper surface of the test wiring substrate 41, a plurality of test wiring patterns 44 are drawn out from the region surrounding the center of the elastic body 43 to the edge of the substrate while increasing the pitch and width. A contact terminal 45 is formed at an inner end of the test wiring pattern 44, and an outer terminal 46 is formed at an outer end. The contact terminal 45 is a bare chip 40
Are arranged corresponding to the electrodes 40a.

The plurality of test wiring patterns 44 are arranged so as to spread radially. Further, at least two magnetic pieces 47 are embedded around the elastic body 43 of the test wiring board 41. Those magnetic pieces 47 are
It is made of iron, iron alloy, cobalt, cobalt alloy, etc., and is formed under the condition that it is not magnetized and hardly generates a magnetic field.

A concave portion 52 for supporting the bare chip 40 is formed in a region of the support substrate 51 facing the elastic body 43 of the test wiring substrate 41. In the center of the concave portion 52, a ventilation hole 53 having a diameter of about 3 mm penetrating the support substrate 51 is provided.
Are formed. A magnet (permanent magnet) 5 made of, for example, cobalt, a cobalt alloy, chromium, or a chromium alloy is provided at a position facing the magnetic piece 47 of the test wiring board 41.
4 are embedded.

The lower surface of the support substrate 51 has, for example, a shape as shown in FIG. 2A, and the upper surface of the test wiring substrate 41 has, for example, a shape as shown in FIG. 2B. Note that reference numeral 50 in FIG.
Is a hollow handling head, which is a support substrate 51
The outside air is sucked from the tip end larger than the ventilation hole 53, and the drive mechanism 37 is configured to be able to move vertically and horizontally.

When the bare chip 50 is mounted on the test wiring board 41 as described above, the following method is used.
First, the bare chip 40 is positioned in the concave portion 52 of the support substrate 51 so that the electrode 40a of the bare chip 40 faces outward. Then, the supporting substrate 51 is sucked and supported by the handling head 50, and the bare chip 40 is sucked through the ventilation hole 53 to be fixed on the supporting substrate 51.

Subsequently, the handling head 50 is moved so that the support substrate 51 faces the test wiring substrate 41 at an interval. Next, the position recognizing camera 55 capable of recognizing the upper and lower images is connected to the test wiring board 41 and the support board 5.
Then, all the contact terminals 45 on the test wiring board 41 and all the electrodes 40 a on the bare chip 40 are imaged by the position recognition camera 55 from the position recognition camera 55.

The data obtained from the position recognition camera 55 is taken into the image processing device 56 and the contact terminals 45 on the test wiring board 41 and the electrodes 4 of the bare chip 40 are
The position of 0a is converted into coordinate data. And
Contact terminal 45 and electrode 40A of bare chip 40 are 1
If the image processing device 56 determines that the pair is not facing each other, the position of the handling head 50 is adjusted by the driving mechanism 37 and the electrode 40 of the bare chip 40 at the tip thereof is adjusted.
a and the contact terminals 45 are opposed to each other on a one-to-one basis.

When all of the contact terminals 45 and all of the electrodes 40a face one to one, the image processing apparatus 5
If the judgment is 6, the handling head 50 is lowered vertically toward the upper surface of the test wiring board 41, and the position recognition camera 55 is removed from between the test wiring board 41 and the support board 51 at an appropriate time. . Further, when the handling head 50 is lowered, the magnet 54 and the magnetic piece 47 are finally attracted by the magnetic field H. Thus, the support substrate 51 is firmly fixed to the test wiring board 41 via the magnet 54 and the magnetic piece 47, and the electrode 40 a of the bare chip 40 contacts the contact terminal 45 on the test wiring board 41. By the way, if the electrode 40a and the contact terminal 45 are not pressed by an external force, they will be shifted from each other immediately after the suction by the handling head 50 is released. Therefore, the magnet 54 and the magnetic piece 47
It is necessary that the contact terminals 45 be pressed against the electrodes 40a of the bare chip 40 by the elastic force of the elastic body 43 in the test wiring board 41 in a state where they are attracted to each other. In order to generate this pressing force, the condition is that the electrode 40a of the bare chip 40 pushes down the elastic body 43 in a state where the magnetic piece 47 and the magnet 54 are in contact with each other. In order to satisfy this condition, the terminals 40a of the bare chip 40 and the contact terminals 45
Of the magnets 54 and the magnetic pieces 47 must be smaller than the sum of the protrusion amounts of the magnet 54 and the magnetic pieces 47 from the substrate. Moreover, it is necessary to make the attraction force between the magnet 54 and the magnetic piece 47 larger than the elastic force of the elastic body 43. For example, when a pressing force of 10 g is required for one electrode 40a, the total pressing force applied to the 100 electrodes 40a under the bare chip 40 is 1 kg, so that the magnet force of the magnet 54 becomes 1 kg or more. 54 will be embedded in the support substrate 51.

The semiconductor circuit in the bare chip 40 mounted on the test wiring board 41 in this manner is subjected to a circuit operation test via a test probe 48 which comes into contact with a terminal 46 outside the test wiring pattern 44. Done. Moreover, since the test wiring board 41 and the support board 51 are firmly fixed via the magnet 54 and the magnetic piece 47, the circuit operation test is completed after removing the handling head 50 from the boards 41 and 51. There is no gap between them.

As shown in FIG. 3, the magnet 54 is embedded in the test wiring board 41 and the magnetic piece 47 is attached to the support board 5.
Even when embedded in 1, the above-described effects can be obtained. Further, a through hole 49 shown in FIG. 3 may be provided instead of the concave portion 42 of the test wiring board 41, and the elastic body 43 may be embedded therein. By the way, after the above-described test carrier has been subjected to a circuit test such as a BI test in a heating furnace 39 using a tester 38, the test wiring substrate 41 and the support substrate 51 are separated and the bare chip 40 is taken out. Become. However, when the magnetic force of the magnet 54 is strong, there is a risk that the separating operation takes time or that the bare chip 40 is damaged during the separating operation.

Therefore, as shown in FIG. 4A, a structure is adopted in which the magnetic piece 47a attached to the test wiring board 41 protrudes downward. Then, the test wiring board 41
When the support substrate 51 and the support substrate 51 are separated from each other, as shown in FIG. 4B, the lower projecting portion of the magnetic piece 47a is inserted into a magnetic field generating coil 57 for generating a magnetic field. A current is passed from a power supply 58 to 57 to generate a magnetic field H1. If the direction of the magnetic field H1 is reversed from the direction of the magnetic field H from the magnet 54 on the support substrate 51, the magnet 54 and the magnetic piece 47a are easily separated by the repulsive force of the same magnetic polarity.

In FIG. 4 (b), reference numeral 59 denotes a power source 58.
Are connected to the magnetic field generating coil 57. As described above, if the repulsive magnetic field is generated in the magnetic piece 47a only when the suction between the test wiring substrate 41 and the support substrate 51 is released, the working efficiency for separating the substrates is increased.

In the case of employing a structure in which the magnet 54 is attached to the test wiring board 41, as shown in FIG. 5, the upper end of the magnetic piece 47 b attached to the support board 51 is protruded from the support board 51, and Fig. 4
(b) may be inserted into the magnetic field generating coil 57 to generate a repulsive magnetic field. In addition, bare chip 40
A magnetic shield 76 may be attached along the inner periphery of the concave portion 52 of the support substrate 51 in order to suppress the influence of an external magnetic field during the test of the semiconductor device therein.

Each of the test carriers described above may be used not only for testing a semiconductor device in a bare chip state but also for testing a packaged semiconductor device. (Second Embodiment) FIG. 6 shows a support for supporting a bare chip on a test wiring board.

The support 60 has a substantially U-shaped pressing portion 61 made of a magnetic material and a band-shaped beam portion 63 having an insertion hole 62 through which both arms of the pressing portion 61 are inserted. A plate-like latch portion 64 made of an elastic material extends downward from both side ends of the beam portion 63, and the lower end thereof is connected to the test wiring board 41A.
It is bent to hold. Further, plate-shaped latch release portions 65 extend upward from both side ends of the beam portion 63.

The pressing portion 61 has a flat bottom surface which is parallel to the upper surface of the test wiring board 41A, and a vent 61a smaller than the semiconductor device is formed at the center thereof. An insertion hole 63a for passing the handling head 50 is formed at the center of the beam 63, and the handling head 50 passing through the insertion hole 63a hits the periphery of the ventilation hole 61a of the pressing portion 61.

The upper ends of both arms of the pressing portion 61 are bent in order to prevent the upper portion from dropping out of the insertion hole 62, and the pressing portion 61 is constantly applied with a downward force by the elasticity of the coil spring 66 wound around the both arms. . The test wiring board 41A to which the support 60 having such a structure is mounted is almost the same as the structure shown in FIG. 4, and is different in that tapered surfaces 41B are formed on both sides thereof. Note that the same reference numerals as those in FIG. 4 indicate the same elements.

A test carrier is constituted by the support member 60 and the test wiring board 61A as described above. Then, in order to mount the bare chip 40 in the test carrier, the following procedure is performed. First, the bare chip 4 is exposed so that the electrode 40a of the bare chip 40 is exposed.
0 is positioned below the pressing portion 61 of the support 60. Further, the handling head 50 is inserted into the insertion hole 63a of the beam 63.
To the upper surface of the pressing portion 61. And the pressing part 6
The bare chip 40 is attracted to the handling head 50 through the one ventilation hole 61a, and the pressing part 61 is also attracted to the handling head 50.

Subsequently, by moving the handling head 50, as shown in FIG. 7, the bare chip 40 is opposed to the test wiring board 41A at an interval. And
The position recognition camera 55 recognizes the positions of the contact terminals 45 of the test wiring pattern 44 and the electrodes 40a of the bare chip 40 on the test wiring board 41A. Based on the data obtained from the position recognition camera 55, as described in the first embodiment, the contact terminals 45 on the test wiring board 41A and the electrodes 40a of the bare chip 40 are in a one-to-one correspondence.
To move the handling head 50 to a position facing the same.

Then, after removing the position recognition camera 55 at an appropriate time, the support tool 60 is placed on the test wiring board 41A by lowering the handling head 50. Also, a magnetic piece 47a protruding below the test wiring board 41
Is wound around the magnet coil around the protruding portion. When a current is applied to the magnetic field generating coil 57, the magnetic field concentrates along the magnetic piece 47, and the magnetic field causes the magnetic piece 47 to be attracted to the pressing portion 61 of the support 60.

In this state, the beam 63 is connected to the coil spring 66
The distance from the bottom surface of the pressing portion 61 does not change due to the elastic force of, and the lower end of the latch portion 64 does not reach the bottom surface of the test wiring board 16A. Then, when the area near both ends of the beam portion 63 is pushed down toward the test wiring board 41A using the pressing pins 67, as shown in FIG. 8, the latch portion 64 becomes the taper surface on the side of the test wiring board 41A. It spreads while sliding on 41B. When the tip of the latch section 64 reaches the bottom of the test wiring board 41A, the latch section 64 becomes narrow and clicks.

As a result, the beam 63 is connected to the test wiring board 4.
The state is fixed at 1A. Moreover, when the pressing portion 61 is pressed down by the pressing pin 67, the beam portion 63 applies an elastic force to the coil spring 66, so that the pressing force of the electrode 40 a of the bare chip 40 against the contact terminal 45 increases.
Therefore, the position of the electrode 40a of the bare chip 40 and the position of the contact terminal 45 do not shift due to the impact of the click of the latch portion 64.

The tip of the latch 64 is connected to the test wiring board 41.
In the state where the bottom of A is held, the support member 60 is fixed to the test wiring board 41A by the latch portion 64, so that the magnetic field by the magnetic field generating coil 57 becomes unnecessary. Therefore, the supply of the current to the magnetic field generating coil 57 is stopped. Then, the handling head 50 and the pressing pin 67 are detached from the support 60 so as to be in the state shown in FIG. 9, and the magnetic piece 57 of the test wiring board 41A is detached from the magnetic field generating coil 57.
To the test equipment.

Next, a circuit operation test of the semiconductor device formed on the bare chip 40 is performed by applying a test probe or the like to the outer end of the test wiring 41A. During this test, the test wiring board 41A and the support 60 are also connected to the latch portion 64.
Are firmly fixed to each other via the interface, so that the vibration due to the conveyance from the removal of the handling head 50 to the end of the circuit operation test is not shifted by the vibration during the test.

After completing the circuit test, the support 6
When the latch release portion 65 on the upper side of the inner side
By the elastic force of 3, the latch portion 64 spreads outward to release the test wiring board 41A and the bare chip 40 from the support 60. In order to eliminate the displacement of the pressing portion 61 when the latch portion 64 is clicked, the larger the opening portion 62 through which both arms of the pressing portion 61 pass, the better. (Third Embodiment) In the above embodiment, the fixation of the bare chip in the test carrier has been described. However, there are cases where the test target is a packaged semiconductor device,
Further, the test object may be attached to a board-shaped test wiring board. Therefore, in the present embodiment, fixing a packaged semiconductor device on a BI board will be described.

FIG. 10 shows a state before supporting a semiconductor device packaged on a board-shaped test wiring board. The test wiring board 71 is large enough to mount a plurality of semiconductor devices. A support 80 for supporting the semiconductor device on the test wiring board 71 has a substrate-shaped pressing portion 81 and a beam portion 83 coupled to the pressing portion 81. Pins 81p extending in a substantially vertical direction are attached to two places on the upper surface of the pressing portion 81.
A coil spring 86 is wound around p. Further, a key-shaped stopper 81b is attached to the upper end of the pin 81p, and the pin 81p is inserted through the insertion hole 82 of the beam 83.
p is prevented from falling off from the beam portion 83.

A latch 84 is provided below both sides of the beam 83.
Extends. The latch portion 84 has a length such that the tip of the latch portion 84 projects downward from the pressing portion 81 when the coil spring 86 is contracted. The pressing portion 81 has a structure similar to the supporting substrate 51 of the first embodiment. That is, a concave portion 85 in which the semiconductor device 90 is disposed is formed at the center of the pressing portion 81, and the pressing portion 8 is further formed at the center of the concave portion 85.
1 is formed. The distal end of the handling head 50 through the center insertion hole 83a of the beam portion 83 abuts on the pressing portion 81 around the ventilation hole 81a. Around the recess 85, at least two non-magnetized magnetic pieces 87 are embedded.

Further, on the test wiring board 71, FIG.
As shown in FIG. 7, a wiring 72 connected to the plurality of terminals 90a of the semiconductor device 90 is formed. Further, on the test wiring board 71, a support 80 placed at a predetermined position is used.
An opening 73 is formed at a position directly below the magnetic piece 87 of FIG. Further, a latch hole 74 is formed in the test wiring board 71 at a position directly below the latch portion 84 of the support 80 placed at a predetermined position.

It should be noted that reference numeral 91 in FIG.
A frame-shaped pad 92, which is in close contact with the pressing portion 81,
Is a magnetic core passing through the central axis of the magnetic field generating coil 57;
2a is a contact terminal formed at the inner end of the wiring 72 on the test wiring board 71, and 72b is the wiring 72
3 shows an outer terminal formed at an outer end of the outer terminal. In order to mount the semiconductor device 90 packaged on such a test wiring board 71, the following is performed.

First, the semiconductor device 90 is positioned below the pressing portion 81 of the support 80 so that the terminal 90a of the semiconductor device 90 is exposed. In addition, the handling head 5
0 is applied around the ventilation hole 81a of the pressing portion 81 through the insertion hole 82 of the beam portion 83. And the handling head 5
With the suction force of 0, the semiconductor device 90 is sucked and fixed through the ventilation hole 81a of the pressing portion 81.

Subsequently, the semiconductor device 90 is made to face the sample setting area of the test wiring board 71 by moving the handling head 50. And with the position recognition camera,
The positions of the contact terminal 72a and the terminal 90a of the semiconductor device 90 in the sample setting area are recognized. Based on the data obtained from the position recognition camera, as described in the first embodiment, the handling head 50 is moved to a position where the contact terminal 72a and the terminal 90a of the semiconductor device 90 face each other.

Next, after removing the position recognition camera at an appropriate time, the handling head 50 is lowered to bring the contact terminal 72a into contact with the terminal 90a of the semiconductor device 90. At the same time, the magnetic core 92 of the magnetic field generating coil 57 is placed under the test wiring board 71 through the opening 73 thereof.
To make contact with the magnetic piece 87 in the pressing portion 81.
Further, a current is applied to the magnetic field generating coil 57 to attract the magnetic core 92 and the magnetic piece 87 by the magnetic field generated from the magnetic field generating coil 57. As a result, the pressing portion 81 of the support 80 and the semiconductor device 90 are fixed to the test wiring board 71.

Then, as shown in FIG. 12, when the upper surface of the beam portion 83 is pressed down by the pressing pin 67, the latch portion 84 clicks into the latch hole 74 of the test wiring board 71, and the bent end of the latch portion 84 is bent. Is hung on the bottom surface of the test wiring board 71. In this case, as in the second embodiment, the pressing portion 81 is pressed against the test wiring board 71 by the elastic force of the coil spring 86 and maintains a fixed state.

Accordingly, the terminal 90a of the semiconductor device 90 maintains the state in which it is in contact with the contact terminal 72a of the test wiring 72. In such a state, the support member 80 is fixed to the test wiring board 71 by the latch portion 84, so that the magnetic field generated by the magnetic field generating coil 57 becomes unnecessary. Therefore, as shown in FIG. 13, the handling head 50 and the pressing pin 67 are removed, and the supply of the current to the magnetic field generating coil 57 is stopped.

The semiconductor device 90 and the support 8 as described above
After attaching 0 to a plurality of locations on the test wiring board 71, the test wiring board 71 is transported, for example, into a BI test furnace, and a circuit operation test of the semiconductor device 90 is performed. As mentioned above,
Since the test wiring board 71 and the support member 80 are firmly fixed on the test wiring board 71 via the latch portion 84, there is no deviation due to the vibration accompanying the conveyance or the vibration at the time of the BI test. (Fourth Embodiment) FIGS. 14A and 14B show a test wiring board on which a contact sheet called a “membrane” is formed on the upper surface, and the same reference numerals as those in FIG. 4 indicate the same elements. .

In the membrane, a contact electrode 45 is formed in a semiconductor mounting region on a film 75 having high electrical insulation such as polyimide. On the film 75, the test wiring pattern 44 is drawn out from the contact electrode 75 to the outer terminal 46 while increasing the pitch and width. The use of such a membrane is superior in mass productivity of the test wiring board as compared with the case where the test wiring pattern 44 is formed directly on the substrate. (Fifth Embodiment) In the first embodiment, the support substrate 51 and the semiconductor device 40 are connected to the test wiring board 41 using the magnets 54.
The structure to fix to is adopted. However, a magnetic field generated from the magnet 54 may cause a malfunction of the semiconductor device.

Therefore, as shown in FIG. 15, a magnetic shield fence 76 surrounding the semiconductor device 40 is preferably mounted on the test wiring board 41 in order to reduce the influence of an external magnetic field on the semiconductor device 40. The magnetic shield fence 76 has an area where the semiconductor device 40 is mounted and a magnet 5.
4 are arranged between them. The magnetic shield fence 76 is formed of a non-magnetic material such as copper, and has a gate 77 for straddling the test wiring pattern 46 serving as a signal line or a power supply line. The magnetic shield fence 76 is connected to the ground wiring pattern 46g, and has a function of electrically shielding the semiconductor device 40 during a test. The ground wiring 46g is connected to the ground terminal of the tester. (Sixth Embodiment) FIGS. 16A and 16B show QFP (quad flat).
The structure shown in the first embodiment is applied to an IC socket used for testing a package) type semiconductor device.

The IC socket 93 employs a structure in which the functions of the elastic body 43 and the wiring pattern 44 shown in FIG. That is, the test circuit board 95 has a structure in which a concave portion 96 is formed in the mounting region of the semiconductor device and its periphery in the test wiring substrate 95, and a plurality of contact pins 94 are mounted inside the concave portion 96. The contact pin 94 has a conductive U (or V) -shaped spring 94a.
Is placed sideways and a plug 94b is connected to its lower part. The plug 94b is inserted into the bottom of the concave portion 96 and protrudes below the test wiring board 95.

Further, the recess 9 in the test wiring board 95
A magnetic piece 97 that is in contact with the magnet 54 of the support substrate 51 is mounted around the periphery of the support 6. The support substrate 51 has the same structure as FIG. 1 or FIG. 3 except for its size. In the IC socket 93 having such a structure, the semiconductor device 90 and the support substrate 51 are mounted on the test wiring board 95 by using the handling head 50 as in the first embodiment. In this state, the support substrate 51 and the test wiring substrate 95 are firmly fixed to each other by the attraction of the magnet 54 and the magnetic piece 97. Each terminal 90a projecting from the side of the semiconductor device 90 contacts the upper end of the spring 94a of each contact pin 94, and is pressed toward the support substrate 51 by the elasticity of the spring 94a itself. (Seventh Embodiment) The test carrier shown in FIG.
As shown in FIGS. 7A and 7B, a bare chip 40 on which a solder bump 40b is formed may be attached. However, since the solder bumps 40b are arranged in a matrix on one surface of the bare chip 40, a multilayer wiring structure may be employed when the density of the wiring patterns 44 increases.

In FIGS. 17A and 17B, a structure in which a membrane is formed on a test wiring board 41B is employed. (Eighth Embodiment) A sectional view of FIG. 18A shows that a recess 99 wider than a semiconductor device is formed in a housing 98,
A structure in which a step 100 is formed around the concave portion 99 is shown. A spring 101 placed on the step 100
Supports the lid 102 of the recess 99. A dent of the lid 102 has a needle-like pin 103
Is penetrating. The pin 103 is made of a conductive elastic material, and is slightly bent. The lower end of the pin 103 projects to the bottom of the housing 98 and is connected to the wiring pattern 105 of the board-like test wiring board 104. The housing 98 is adhered to the test wiring board 104.

The housing 9 is provided around the recess 99.
8 is embedded, and the lower end of the magnetic piece 106 is connected to the test wiring board 10.
4 through the opening 107. Also,
The upper end of the magnetic piece 106 is arranged so as to be able to contact the pressing portion 61 of the support 60, and the magnetic piece 106 is attracted to the pressing portion 61 in a state magnetized by a magnetic field generating coil (not shown). .

With such a structure, the support 60 is attached to the housing 98 by the method described in the second embodiment. As a structure for electrically connecting the pin 103 to the wiring 105 of the test wiring board 104, there is a structure shown in FIG. 18B in addition to FIG. 18A. In the test wiring board 104 and the wiring 105 of FIG. 18B, a through hole 108 in which a conductive film is present is formed on the inner surface at a position where the pin 103 protruding from the bottom of the housing 98 hits. The pin 103 is inserted into the through hole 108, and the pin 103 in the through hole 108 and the test wiring board 104 are fixed by solder 109. Further, the wiring 105 and the pin 103 are electrically connected via the solder 109 and the through hole 108. The solder 109 is applied by solder reflow.

In FIGS. 18A and 18B, the same reference numerals as those in FIG. 7 indicate the same elements. (Ninth Embodiment) FIG. 19 shows a contact terminal 72 of a wiring 72 formed on a test wiring board 71 shown in FIG.
A state in which an anisotropic rubber sheet 108 is mounted on a is shown. This anisotropic rubber sheet 108 has a frame-like planar shape that overlaps with the contact terminal 72a as shown by a two-dot chain line in FIG.

The anisotropic rubber sheet 108 is formed by embedding conductive fibers extending in the up-down direction. In the anisotropic rubber sheet 108, the upper surface and the lower surface of the sheet are electrically connected via the conductive fibers. However, the resistance is high in the direction along the plane. When such an anisotropic rubber sheet 108 is placed on the contact terminals 72a, the contact terminals 72a
Since the “a” and the irregularities around the “a” are reduced, the terminal 90 a of the semiconductor device 90 on the “a” is stabilized. (Tenth Embodiment) FIG. 20 is a view for explaining a test carrier according to a tenth embodiment of the present invention.

FIG. 20A is a cross-sectional view of the test carrier according to the present embodiment, and FIG. 20B is a top view illustrating a substrate used for the test carrier according to the present embodiment. As shown in FIG. 20A, the test carrier has a substrate 11 on which a bare chip 40 is mounted.
1 and thin film 1 for fixing bare chip 40 on substrate 111
It consists of 12. The thin film 112 and the substrate 111 are bonded with the adhesive 1
13 is fixed.

As shown in FIG. 20B, a plurality of test wiring patterns 116 are formed on the upper surface of the substrate 111. The test wiring pattern 116
Are arranged to spread radially. At the inner end of the test wiring pattern 116, contact terminals 115 provided corresponding to the arrangement pattern of the electrodes 40a of the bare chip 40 are provided.

As shown in FIG. 20A, the test carrier is aligned such that the contact terminals 115 correspond to the electrodes 40a of the bare chip 40, and the bare chip 40 is mounted on the substrate 111 of the test carrier. The thin film 112 is covered from above, and fixed by an adhesive 113. According to the test carrier of the present embodiment, since the thin film 112 is used as the support, the test carrier can flexibly follow the shape of the bare chip 40 and can be closely pressed. Therefore, even when vibration is applied from the outside, the impact between the thin film 112 and the bare chip 40 is small.

As a result, the shock applied to the bare chip 40 by the thin film 112 is alleviated even if it is subjected to vibration during transportation or a BI test, etc., and a good electrical connection between the contact terminal 115 of the substrate 111 and the electrode 40a of the bare chip 40 is obtained. The connection state can be maintained during the test process. In addition, as shown in FIG. 21A, a holding plate 114 made of resin or the like may be formed on a thin film so as to surround a region for mounting a bare chip. In this case, even when an external force that cannot absorb a shock by the thin film alone is applied, the lateral displacement of the bare chip by the holding plate can be suppressed as much as possible. (Eleventh Embodiment) FIG. 21B is a cross-sectional view illustrating a test carrier according to an eleventh embodiment of the present invention.

As shown in FIG. 21 (b), the test carrier comprises a substrate 121 on which the bare chip 40 is mounted, and a support 124 for fixing the bare chip 40 on the substrate 121. The support 124 includes a thin film 122 and a magnetic body 123 as shown in FIG. Further, a magnet 125 is provided in a region other than the region on the back surface of the substrate 121 where the bare chip 40 is mounted.

Although a test wiring pattern for making contact with a bare chip is formed on the upper surface of the substrate 121, its structure is the same as that shown in FIG. According to the test carrier according to this embodiment, the thin film 11 is formed by utilizing the magnetic force acting between the magnet 115 and the magnetic body 113.
2 is brought into close contact with the substrate 111, and the bare chip 40 is
By keeping it in close contact with 11, it is possible to maintain a good electrical connection state even during the subsequent BI test.

There is also an advantage that the pressure applied to the bare chip can be adjusted by changing the strength of the magnetic force. In the present embodiment, the thin film 112 is made of polyimide, and the magnetic body 113 is made of Cu or the like, but is not limited to this. Similar effects can be obtained by using the thin film itself as a magnetic material. (Twelfth Embodiment) FIG. 22A is a cross-sectional view illustrating a test carrier according to a twelfth embodiment of the present invention.

As shown in FIG. 22A, the test carrier includes a substrate 131 on which the bare chip 40 is mounted, and a thin film 132 for fixing the bare chip 40 on the substrate 131. The thin film 132 and the substrate 131 are fixed with an adhesive 133. The configuration of the upper surface of the substrate 131 is the same as that in FIG. In this embodiment,
When selecting the material of the substrate 131 and the thin film 132, the coefficient of thermal expansion of the substrate 131 is set to be larger than the coefficient of thermal expansion of the thin film 132.

In practice, the material of the substrate 131 is, for example, glass epoxy (coefficient of thermal expansion: about 30 PPM / ° C.) or P
EI (coefficient of thermal expansion of about 27 PPM / ° C.), PES (coefficient of thermal expansion of about 30 PPM / ° C.), or the like is used as a material of the thin film 132, for example, a low thermal expansion polyimide (coefficient of thermal expansion of
M / ° C.). As described above, by using the substrate 131 having a higher coefficient of thermal expansion than the thin film 132, when heated later by the BI test,
Since 1 expands more than the thin film 132, the thin film 132 receives a tensile stress due to a difference in expansion coefficient.

Since the bare chip 40 is further pressed and adhered to the substrate 131 by the tensile stress, it is possible to maintain a better electrical connection state during the test process. (Thirteenth Embodiment) FIG. 22B is a sectional view of a test carrier according to a thirteenth embodiment of the present invention.

As shown in FIG. 22B, the test carrier includes a substrate 143 on which the bare chip 40 is mounted and a thin film 144 for fixing the bare chip 40 on the substrate 143. The thin film 144 and the substrate 143 are fixed with an adhesive 146. Further, as shown in FIG. 22B, the substrate 143 has a two-layer structure of a first layer 141 and a second layer 142. The first layer 141 has a smaller coefficient of thermal expansion than the second layer 142.

Specifically, the first layer 141 is made of, for example, ceramic (coefficient of thermal expansion of about 9 PPM / ° C.) or copper (coefficient of thermal expansion of about 10 to 13 PPM / ° C.), and the second layer 142 is made of, for example, glass epoxy ( Thermal expansion coefficient of about 30 PPM / ° C), PEI (thermal expansion coefficient of about 27 PPM / ° C), PE
S (a coefficient of thermal expansion of about 30 PPM / ° C.) or the like is used.

Also, the point that a test wiring pattern is formed on the upper surface of the substrate 143 is the same as FIG. 20B. In the test carrier according to the present embodiment, the coefficient of thermal expansion of the first layer 141 is set to be smaller than the coefficient of thermal expansion of the second substrate 142. As shown in FIG.
Warp to one side.

As a result, the thin film 132 receives a tensile stress. The bare chip 40 is further pressed and adhered to the substrate 143 by the tensile stress, so that a good electrical connection state can be maintained during the test. FIG.
As shown in FIG. 2C, the groove 14 is formed on the back of the first layer 141.
5 may be provided. Since the warpage of the substrate is further improved by the groove 145, the pressure adhesion of the bare chip is improved, and a more favorable electrical connection state can be maintained during the BI test. (Fourteenth Embodiment) FIG. 23 is a view showing a test carrier according to a fourteenth embodiment of the present invention. FIG. 23 (a)
FIG. 2 is a perspective view illustrating a structure of a test carrier according to the present embodiment. FIG. 23 (b) is a graph showing I in FIG. 23 (a).
FIG. 2 is a sectional view taken along line I.

As shown in FIG. 23 (b), the test carrier comprises a substrate 151 on which the bare chip 40 is mounted, and a thin film 152 made of polyimide for fixing the bare chip 40 on the substrate 151. The thin film 152 and the substrate 151 are fixed with an adhesive. Also, substrate 1
A test wiring pattern is formed on the upper surface of 51, and the structure of the upper surface is the same as that of FIG.

Further, a large number of holes are formed in the thin film 152 in a matrix as shown in FIG. This makes it possible to more flexibly fit the shape of the bare chip than a thin film having no holes. In addition, bare chip 40
Is directly exposed to the outside air, so that there is also an advantage that the heat radiation effect is large as compared with the case where it is covered with a thin film having no holes formed.

In place of this thin film, a metal net,
Similar effects can be obtained by using a net made of another fiber having high heat resistance. (Fifteenth Embodiment) FIG. 24A is a cross-sectional view illustrating a test carrier according to a fifteenth embodiment of the present invention.

As shown in FIG. 24A, the test carrier comprises a substrate 161 on which the bare chip 40 is mounted and an adhesive 162 made of clay for fixing the bare chip 40 on the substrate 161. Consists of Adhesive 16
2 and the substrate 161 are fixed with an adhesive. Further, a test wiring pattern is formed on the upper surface of the substrate 161, and the arrangement state is the same as that in FIG. 20B.

In this embodiment, an adhesive 162 made of clay is used instead of the thin film used in the tenth to fourteenth embodiments. As a result, similarly to the tenth to fourteenth embodiments, not only can the bare chip 40 be pressed against the substrate 161 and held, but also the impact on the bare chip 40 can be reduced more reliably than the thin film because the adhesive is used. Can be done. Therefore, even if vibration occurs due to a BI test or the like, it is possible to minimize the displacement of the bare chip. (Sixteenth Embodiment) FIG. 24A is a cross-sectional view illustrating a test carrier according to a sixteenth embodiment of the present invention.

As shown in FIG. 24A, the test carrier comprises a substrate 171 on which the bare chip 40 is mounted and a heat-shrinkable material 172 such as Teflon, which is a material that shrinks by heat. Consists of This heat-shrinkable material 1
As shown in FIG. 24B, reference numeral 72 is formed so as to surround the substrate 171 and the bare chip 40 mounted thereon.

A test wiring pattern is formed on the upper surface of the substrate 171 and is the same as that shown in FIG. According to the present embodiment, since the substrate 171 and the bare chip 40 are surrounded by the heat-shrinkable material 172, when the heat-shrinkable material 172 shrinks, a tensile stress is applied to the heat-shrinkable material 172. The bare chip 40 comes into close contact with the substrate 171 due to the tensile stress, so that a good electrical connection state can be maintained even during a BI test or the like. (Seventeenth Embodiment) FIGS. 25A and 25B are diagrams illustrating a test carrier according to a seventeenth embodiment of the present invention. FIG. 25A is a cross-sectional view illustrating a test carrier according to the present embodiment. FIG. 25 (b)
FIG. 3 is a top view illustrating a thin film used for a test carrier according to the embodiment.

As shown in FIG. 25A, the test carrier includes a substrate 181 on which the bare chip 40 is mounted, and a thin film 182 made of polyimide for fixing the bare chip 40 on the substrate 181. The thin film 182 and the substrate 181 are fixed with an adhesive. The test carrier according to the present embodiment is different from the test carriers according to the tenth to sixteenth embodiments in that no test wiring pattern is formed on the upper surface of the substrate 181.

That is, as shown in FIG. 25B, a plurality of test wiring patterns 183 are formed on the upper surface of the thin film 182. The test wiring pattern 183 is arranged to spread radially. At the inner end of the test wiring pattern 183, contact terminals 184 provided corresponding to the terminal patterns of the bare chip 40 are provided.

Therefore, when attaching the bare chip 40 to this test carrier, unlike the tenth to sixteenth embodiments, as shown in FIG.
The bare chip 4 is placed on the substrate 181 so that 0a faces upward.
0 and the thin film 182 is placed on the substrate 18 so that the test wiring pattern 183 and the contact terminals 184 face downward.
1 and facing each other.

Thereafter, the contact terminals 184 are aligned with the bare chip electrodes 40a, and the thin film 182 is attached to the substrate 181.
Is fixed with an adhesive. According to the present embodiment, since the test wiring pattern 183 and the contact terminals 184 are formed on the flexible thin film 182, the contact terminals 184 move up and down flexibly even when vibration is applied to the test carrier. Satisfactorily can be maintained in contact with the substrate.

Further, even if the flatness of the bare chip electrode 40a varies, it can be pressed flexibly, so that a good contact state can be maintained. (Eighteenth Embodiment) FIG. 26 is a view showing a test carrier according to an eighteenth embodiment of the present invention. FIG. 26 (a)
FIG. 3 is a cross-sectional view illustrating the structure of the test carrier according to the present embodiment. FIG. 26B is a partially enlarged cross-sectional view of FIG.

As shown in FIG. 26A, this test carrier comprises a substrate 191 on which a bare chip 40 is mounted, a thin film 192 made of polyimide for fixing the bare chip 40 on the substrate 191, and a thin film 192. Consists of a metal film 193 coated on the surface. The thin film 192 and the substrate 191 are fixed with an adhesive. Also, substrate 1
Test wiring patterns are formed on the upper surface of 51, and are arranged in the same manner as in FIG.

As shown in FIG. 26B, the bare chip 4
A plurality of through holes 194 are formed in the thin film 192 corresponding to the 0 mounting region. Further, a portion of the thin film 192 which is in direct contact with the bare chip 40 and the through hole 19
The metal film 193 is coated on the surface on the opposite side via 4. According to the present embodiment, the through hole 1
94 is formed, and the bare chip 40 directly contacts the outside air, so that the heat radiation effect is enhanced. In addition, since a metal film 193 having good heat dissipation properties is coated on a portion directly adhering to the bare chip 40 and a surface on the opposite side via the through hole 194, compared with a case where a through hole is simply formed in a thin film. As a result, the heat radiation effect is further enhanced, and a good BI test can be performed. This is particularly effective when applied to a device that generates a large amount of heat. (Nineteenth Embodiment) Hereinafter, a method of attaching a bare chip to a test carrier according to a nineteenth embodiment of the present invention will be described with reference to the drawings.

FIGS. 27A and 27B are cross-sectional views for explaining a method of attaching a bare chip to a test carrier according to the present embodiment. According to this mounting method, first, there is a substrate 201 on which the bare chip 40 is mounted, and a thin film 202 for fixing the bare chip 40 on the substrate 201,
A test carrier in which a vent 203 having a diameter of about 1 to 2 mm is formed in a part of a region of the substrate 201 where a bare chip is to be placed is prepared in advance.

Then, as shown in FIG. 27A, after the bare chip 40 is placed on the substrate 201 for temporary alignment, the bare chip 40 is sucked through the vent hole 202.
Since the bare chip 40 is fixed to the substrate 201 as long as it is adsorbed, it is possible to minimize the occurrence of positional deviation during this. Accordingly, thereafter, as shown in FIG. 27B, when the bare chip 40 and the substrate 201 are covered with the thin film 203 and they are fixed to each other, a displacement occurs, and the electrode 40a of the bare chip 40 and the It is possible to minimize the deviation from the contact terminal (not shown) formed in the above. Twentieth Embodiment A method for attaching a bare chip to a test carrier according to a twentieth embodiment of the present invention will be described below with reference to the drawings.

FIGS. 28A and 28B are cross-sectional views for explaining a method of attaching a bare chip to a test carrier according to the present embodiment. According to the mounting method according to the present embodiment, as shown in FIG. 28A, a substrate 211 having a projection 212 formed on its surface so as to surround a region on which a bare chip is placed, and a bare chip 40 are formed. A test carrier having a thin film to be fixed on the substrate 221 is prepared in advance.

Then, as shown in FIG. 28A, the bare chip 40 is placed in a region of the substrate 211 surrounded by the protrusion 212. Since the bare chip 40 is surrounded by the projections 212, it is possible to prevent the bare chip 40 from being displaced due to vibration or the like. Therefore, after that, when the bare chip 40 and the substrate 211 are covered with the thin film 213 as shown in FIG. 28B, and they are fixed, a displacement occurs, and the electrode 40a of the bare chip 40 and the substrate It is possible to minimize the deviation from the contact terminal (not shown) formed in the above. Embodiment 21 Hereinafter, a method for attaching a bare chip to a test carrier according to a twenty-first embodiment of the present invention will be described with reference to the drawings.

FIGS. 29A and 29B are cross-sectional views for explaining a method of attaching a bare chip to a test carrier according to the present embodiment. The mounting method according to this embodiment includes a substrate 221 on which the bare chip 40 is mounted and a thin film 222 for fixing the bare chip 40 on the substrate 221, as shown in FIG. To
A test carrier in which a hole 223 having a diameter of 1 to 2 mm is formed is prepared in advance.

Then, as shown in FIG. 29A, the thin film 222 and the bare chip 40 are attracted to the handling head 50 through the hole 223 of the thin film 222 by using the handling head 50 described in the first embodiment. Let me do it. Then, as shown in FIG. 29B, the handling head 50 is moved onto the substrate 221 and the thin film 222 is moved.
The thin film 222 is fixed on the substrate 221 with an adhesive after the substrate and the bare chip 40 are placed on the substrate 221 and aligned.

As a result, the bare chip 40 and the thin film 222
Can be fixed to the substrate 221 while simultaneously adsorbing them, so that the number of steps can be reduced and the handling becomes easy.

[0126]

As described above, according to the present invention, when the support for pressing the semiconductor device against the substrate is fixed, the substrate and the support are fixed by magnetic force. Even if vibration occurs during the transfer to the test furnace or the test after the semiconductor device is mounted on the semiconductor device, the semiconductor device can be prevented from being displaced on the substrate.

When a permanent magnet is used to fix the substrate and the support, a magnetic field in a direction opposite to that of the permanent magnet is generated, so that the substrate and the support can be easily separated. . When a permanent magnet is employed, a magnetic shield surrounding the semiconductor device is attached to the substrate or the support, so that a malfunction due to an external magnetic field of the semiconductor device can be prevented.

When a semiconductor device is mounted on a substrate, a handling head that sucks the semiconductor device into the support through a vent hole provided in the support is used. Therefore, when the support and the semiconductor device are mounted on the substrate. In addition, deviation of the semiconductor device from the support can be prevented. Further, embedding the elastic body in the substrate below the wiring can prevent an excessive pressing force from being applied between the terminal or electrode of the semiconductor device and the wiring on the substrate. The elastic body may be a rubber-like material, or may be an elastic pin. When the pin is projected from the bottom of the board, it can be used as a socket plug.

Further, if an insulating sheet is interposed between the substrate and the wiring thereon, the substrate can be formed of a conductor or a magnetic metal, so that the magnetic piece can be embedded in the substrate or the support. Is unnecessary, and the substrate can be used for electrical shielding. In the case of employing a structure in which the support is finally mechanically fixed to the substrate, a magnetic force may be used to temporarily press the semiconductor device against the substrate with the support. When a latch mechanism is employed as a mechanical fixing structure, the magnetic force may be removed because the fixing is stabilized after the support and the substrate are fixed by the latch mechanism.

According to the test carrier of the present invention, since a flexible material such as a thin film is used for the support that covers the semiconductor device and presses the substrate, the shape of the semiconductor device is reduced. It can flexibly follow, press tightly and securely. For this reason, even if the semiconductor device is subjected to vibration during the transport or BI test, it is possible to prevent the semiconductor device from deviating from a predetermined position, so that a good electrical connection state can be maintained during the test process.

Further, according to the test carrier of the present invention, since the test carrier has a substrate and a support, a magnet is provided on a part of the substrate, and a magnetic material is provided on a part of the support. And the support can be fixed by the magnet and the magnetic material. Further, in the test carrier according to the present invention, the plurality of contact terminals provided corresponding to the electrode terminals and the plurality of test wiring patterns provided in connection with the electrode terminals are formed of a flexible material. It is provided in.

Therefore, even if vibrations are applied to the test carrier, the contact terminals move up and down flexibly, so that a good contact state with the electrode terminals of the semiconductor device can be maintained. Furthermore, even if the flatness of the electrode terminals of the semiconductor device varies, it can be pressed flexibly, so that a good contact state can be maintained.

Further, according to the method of mounting a semiconductor device on a test carrier according to the present invention, the semiconductor device has a substrate and a support for covering the semiconductor device and pressing the semiconductor device. A test carrier provided with a hole in a part of the mounting area is prepared, the semiconductor device is mounted on the substrate, the semiconductor device is sucked from the hole, and the semiconductor device is fixed on the substrate.

For this reason, even when the semiconductor device is subsequently coated and pressed by using the support, the semiconductor device is fixed on the substrate by suction, so that displacement is unlikely to occur, and the semiconductor device is securely placed on the substrate. It becomes possible to attach. Further, according to the method for attaching a semiconductor device to another test carrier according to the present invention, a substrate for mounting the semiconductor device having a plurality of electrode terminals, the semiconductor device is covered, and the semiconductor device is pressed. A test carrier having a projection provided on the substrate so as to surround a region where the semiconductor device is to be mounted, and mounting the semiconductor device in the region of the substrate surrounded by the projection. It is location.

Therefore, even when the semiconductor device is subsequently covered with the support, the semiconductor device can be securely mounted on the substrate because the semiconductor device is prevented from being displaced by the projections. Further, according to the method for attaching a semiconductor device to another test carrier according to the present invention,
A substrate for mounting a semiconductor device having a plurality of electrode terminals, and a support that covers the semiconductor device and presses the semiconductor device, and a hole is formed in a part of a region of the support that is in contact with the semiconductor device. A test carrier provided with is provided, the semiconductor device is sucked through the hole of the support, the semiconductor device is sucked together with the support, and the semiconductor device and the support are mounted on the substrate, The number of steps can be reduced as compared with a case where a semiconductor device is mounted on a substrate and a support is then mounted on the substrate and the semiconductor device to cover the substrate.

[Brief description of the drawings]

FIGS. 1A and 1B are cross-sectional views illustrating a semiconductor device support device according to a first embodiment of the present invention.

FIG. 2A is a bottom view of a support substrate of a support device of the semiconductor device according to the first embodiment of the present invention, and FIG. 2B is a top view of a test wiring board of the support device. is there.

FIG. 3 is a cross-sectional view showing a structure of the test carrier according to the first embodiment of the present invention in which the positions of the magnet and the magnetic piece are exchanged.

FIG. 4 (a) is a cross-sectional view of a test carrier according to the first embodiment of the present invention in which a magnetic piece protrudes below a wiring board, and FIG. It is sectional drawing which shows the state which applies a magnetic field.

FIG. 5 is a cross-sectional view of the test carrier according to the first embodiment of the present invention in which a magnetic piece is projected above a wiring board.

FIG. 6 is a perspective view showing a support used for a test carrier according to a second embodiment of the present invention.

FIG. 7 is a sectional view showing a state immediately before a semiconductor device is mounted on a test carrier according to a second embodiment of the present invention.

FIG. 8 is a sectional view showing a process of fixing a semiconductor device to a test carrier according to a second embodiment of the present invention.

FIG. 9 is a cross-sectional view showing a state where the semiconductor device has been completely fixed in the test carrier according to the second embodiment of the present invention.

FIG. 10 is a cross-sectional view illustrating a state immediately before a semiconductor device is mounted on a test carrier according to a third embodiment of the present invention.

FIG. 11 is a plan view showing a part of a board-shaped test wiring board according to a third embodiment of the present invention.

FIG. 12 is a cross-sectional view illustrating a process of fixing a semiconductor device to a test carrier according to a third embodiment of the present invention.

FIG. 13 is a cross-sectional view illustrating a state where the semiconductor device has been completely fixed in the test carrier according to the third embodiment of the present invention.

FIG. 14 (a) is a sectional view of a test carrier according to a fourth embodiment of the present invention, and FIG. 14 (b) is a perspective view showing a test wiring board of the test carrier.

FIG. 15A is a sectional view of a test carrier according to a fifth embodiment of the present invention, and FIG. 15B is a perspective view illustrating a test wiring board of the test carrier.

FIG. 16 is a sectional view of a test carrier according to a sixth embodiment of the present invention.

FIG. 17 (a) is a cross-sectional view of a test carrier according to a seventh embodiment of the present invention, and FIG. 17 (b) shows a connection state between a test wiring board and a bare chip of the test carrier. It is an enlarged view.

FIG. 18 (a) is a cross-sectional view of a test carrier according to an eighth embodiment of the present invention, and FIG. 18 (b) is a partial cross-sectional view illustrating a partially modified example thereof.

FIG. 19 is a sectional view of a test carrier according to a ninth embodiment of the present invention.

FIG. 20A is a cross-sectional view of a test carrier according to a tenth embodiment of the present invention, and FIG. 20B is a top view of a substrate of the test carrier according to the tenth embodiment of the present invention. is there.

FIG. 21A is a cross-sectional view of another test carrier according to the tenth embodiment of the present invention, and FIG. 21B is a cross-sectional view of the test carrier according to the eleventh embodiment of the present invention. FIG.

FIG. 22A is a sectional view of a test carrier according to a twelfth embodiment of the present invention, and FIG.
FIG. 22C is a cross-sectional view of a test carrier according to a third embodiment, and FIG. 22C is a cross-sectional view of another test carrier according to a thirteenth embodiment of the present invention.

FIG. 23 (a) is a perspective view of a test carrier according to a fourteenth embodiment of the present invention. FIG. 23B shows FIG.
It is the II sectional view taken on the line of (a).

FIG. 24 (a) is a cross-sectional view of a test carrier according to a fifteenth embodiment of the present invention, and FIG. 24 (b) is a cross-sectional view of a test carrier according to a sixteenth embodiment of the present invention. is there.

FIG. 25 (a) is a sectional view of a test carrier according to a seventeenth embodiment of the present invention, and FIG. 25 (b) is a top view illustrating a test wiring board of the test carrier.

FIG. 26A is a cross-sectional view of a test carrier according to an eighteenth embodiment of the present invention, and FIG. 26B is an enlarged cross-sectional view illustrating a part of the test carrier. is there.

FIG. 27 (a) is a first sectional view illustrating a method for attaching a test carrier according to a nineteenth embodiment of the present invention,
FIG. 27 (b) is a second sectional view for explaining the method of attaching the test carrier according to the nineteenth embodiment of the present invention.

FIG. 28 (a) is a first sectional view illustrating a method of attaching a test carrier according to a twentieth embodiment of the present invention,
FIG. 28 (b) is a second cross-sectional view for explaining the method of attaching the test carrier according to the twentieth embodiment of the present invention.

FIG. 29A is a first cross-sectional view illustrating a method of attaching a test carrier according to a twenty-first embodiment of the present invention, and FIG. 29B is a cross-sectional view according to a twenty-first embodiment of the present invention. It is a 2nd sectional view explaining the attachment method of the test carrier.

FIGS. 30A and 30B are cross-sectional views showing a first example of a conventional test carrier.

FIG. 31 is a cross-sectional view showing a second example of a conventional test carrier.

[Explanation of symbols]

 Reference Signs List 40 bare chip (semiconductor device) 40a electrode 41, 41A test wiring board 41B tapered surface 42 concave portion 43 elastic body 44 test wiring pattern 45 contact terminal 46 terminal 47 magnetic piece 48 test probe 49 through hole 50 handling head 51 supporting substrate 52 Concave portion 52 53 Vent hole 54 Magnet 57 Magnetic field generating coil 60 Support 61 Press portion 62 Insertion hole 61a Vent hole 62 Insertion hole 63 Beam portion 63a Insertion hole 64 Latch portion 65 Latch release portion 111 Substrate 112 Thin film (support) 113 Adhesion Agent 114 press plate 115 contact terminal 116 test wiring pattern 121 substrate 122 thin film 123 magnetic body 124 support 125 magnet 131 substrate 132 thin film (support) 133 adhesive 141 first layer 142 second layer 143 substrate 144 thin 145 groove 151 substrate 152 thin film 161 substrate 162 adhesive 171 substrate 172 heat shrink material 181 substrate 182 thin film (support) 183 test wiring pattern 184 contact terminal 191 substrate 192 thin film 193 metal film 194 through hole 201 substrate 202 vent hole ) 203 thin film 211 substrate 212 protrusion 213 thin film (support) 221 substrate 222 thin film (support) 223 hole

Claims (34)

[Claims] A substrate having wiring on which electrodes or terminals of the semiconductor device are overlapped; a support for supporting the semiconductor device and pressing the semiconductor device against the substrate; and one of the support and the substrate And a magnetic part made of a magnetic material provided on one of the substrate and the support opposite to the magnet. 2. A supporting device for a semiconductor device according to claim 1, further comprising a magnetic field generating section for applying a magnetic field in a direction opposite to that of said magnet to said magnetic section. 3. The semiconductor device supporting device according to claim 1, further comprising a ventilation hole formed in said support, and a handling head for sucking said semiconductor device through said ventilation hole. 4. The method according to claim 1, wherein either the support or the substrate includes:
2. The device according to claim 1, wherein a magnetic shield surrounding the semiconductor device is formed. 5. The supporting device for a semiconductor device according to claim 1, wherein an elastic body is embedded in the substrate below a portion of the wiring on which the semiconductor device is mounted. 6. The semiconductor device supporting device according to claim 1, wherein said wiring of said substrate is a pin made of an elastic material, and is arranged in a recess formed in said substrate. 7. The wiring is formed on an insulating sheet,
2. The device according to claim 1, wherein the insulating sheet is formed on the substrate. 8. A semiconductor device is sucked by a handling head through an air hole formed in a support, the support is sandwiched between the semiconductor device and the handling head, and the support and the semiconductor device are sandwiched by the handling head. Moving the support and the substrate by the handling head to move the support and the substrate so that the electrodes or terminals of the semiconductor device face the wiring on the substrate; Moving the electrode or the terminal of the semiconductor device into contact with the wiring, magnetically adsorbing and fixing the support and the substrate, and releasing the adsorption of the semiconductor device by the handling head. A method for fixing a semiconductor device, comprising: 9. A state in which a terminal or an electrode of a semiconductor device contacts a wiring of a substrate, the semiconductor device is pressed against the substrate by a support, and the substrate and the support are fixed by an attractive force of a magnet and a magnetic piece. Wherein a magnetic field opposite to the magnetic field of the magnet is generated through the magnetic piece to separate the support and the substrate by a repulsive force of the magnet and the magnetic piece. Withdrawal method. 10. A substrate having a wiring on which an electrode or a terminal of a semiconductor device is overlapped and an opening formed around the wiring, a magnetic field generator inserted into the opening of the substrate, and the semiconductor device. And a support member attached to the substrate and supporting at least a portion facing the opening and made of a magnetic material. 11. The supporting device for a semiconductor device according to claim 10, wherein said magnetic field generator is a magnetic core wound with a coil. 12. The semiconductor device supporting device according to claim 10, further comprising a vent formed in said support, and a handling head for sucking said semiconductor device through said vent. 13. The semiconductor device supporting device according to claim 10, wherein said support has a pressing portion having a spring for pressing said semiconductor device against said substrate. 14. The apparatus according to claim 10, wherein said wiring of said substrate is a pin made of an elastic material, and is disposed in a concave portion formed in said substrate. 15. The semiconductor device supporting device according to claim 10, wherein an insulating sheet is interposed between said wiring and said substrate. 16. The semiconductor device supporting device according to claim 1, wherein the wiring is a pin made of an elastic material, and a lower end of the wiring protrudes from the bottom of the substrate to the outside. 17. An anisotropic conductive film having a lower resistance in a vertical direction than in a horizontal direction is placed on a portion of the wiring on the substrate that contacts an electrode or a terminal of the semiconductor device. The pointing device of a semiconductor device according to claim 1 or 10, wherein 18. A semiconductor device is sucked by a handling head through an air hole formed in a support, and
The support is interposed between the semiconductor device and the handling head, the support and the semiconductor device are moved by the handling head to face a substrate at an interval, and the support and the substrate are moved by the handling head. Moving the electrode or the terminal of the semiconductor device to face the wiring on the substrate, and moving the support toward the substrate to contact the electrode or the terminal of the semiconductor device with the wiring, Magnetically attracting the support and the substrate; mechanically fixing the support to the substrate; attracting the semiconductor device by the handling head; and magnetically attracting the support and the substrate. A method for fixing a semiconductor device, comprising a step of solving the problem. 19. A substrate for mounting a semiconductor device having a plurality of electrode terminals, a plurality of contact terminals provided on the substrate corresponding to the arrangement pattern of the electrode terminals, and a connection to the contact terminals. A plurality of test wiring patterns provided on the substrate, a support made of a flexible material, covering the semiconductor device, and pressing the semiconductor device against the substrate; and the support A test carrier comprising: an adhesive for fixing the substrate. 20. The support according to claim 1, wherein the support is formed of a flexible thin film, and a rigid plate made of a rigid material is formed on the thin film so as to surround a region where the semiconductor device is mounted. 20. The test carrier of claim 19, wherein 21. A substrate on which a semiconductor device having a plurality of electrode terminals is mounted, a plurality of contact terminals provided on the substrate corresponding to an arrangement pattern of the electrode terminals, and a connection to the contact terminals. A plurality of test wiring patterns provided on the substrate; a support made of a material having flexibility, covering the semiconductor device and pressing the semiconductor device; and a support provided on a part of the substrate. A test carrier comprising: a magnet provided; and a magnetic body provided on a part of the support. 22. The test carrier according to claim 19, wherein a thermal expansion coefficient of the material of the substrate is higher than a thermal expansion coefficient of the material of the support. 23. The substrate, comprising: a first layer; and a second layer formed on the first layer and made of a material having a lower coefficient of thermal expansion than a material of the first layer. 20. The test carrier according to claim 19, further comprising: fixing the support on the second layer. 24. A groove is provided on a side of said first layer which is not in contact with said second layer.
Test carrier as described. 25. The test carrier according to claim 19, wherein the support is formed of a flexible thin film, and the support has a large number of holes formed in a matrix. 26. A substrate for mounting a semiconductor device having a plurality of electrode terminals, a support made of a flexible material, covering the semiconductor device, and pressing the semiconductor device; A plurality of contact terminals provided on the support corresponding to the arrangement pattern; a plurality of test wiring patterns connected to the contact terminals and provided on the support; and the support and the substrate. A test carrier, comprising: an adhesive for fixing the test carrier. 27. The test carrier according to claim 26, wherein the support is made of a flexible thin film. 28. The support has at least a plurality of through holes in a region in contact with the semiconductor device, and has a surface in contact with the semiconductor device, a surface in the through hole, and a surface on an opposite side through the through hole. 20. The test carrier according to claim 19, wherein a metal film is attached to the support. 29. The test carrier according to claim 19, wherein the support is made of an adhesive such as clay or gel. 30. The test carrier according to claim 19, wherein the support is made of a material that contracts by heat. 31. A substrate on which a semiconductor device having a plurality of electrode terminals is mounted, a plurality of contact terminals provided on the substrate corresponding to an arrangement pattern of the electrode terminals, and connection to the contact terminals. And a plurality of test wiring patterns provided on the substrate, and a support that covers the semiconductor device and presses the semiconductor device against the substrate, and mounts the semiconductor device on the substrate. Preparing a test carrier provided with a hole in a part of the region to be formed, mounting a semiconductor device on the substrate, adsorbing the semiconductor device from the hole, and placing the semiconductor device on the substrate Fixing the support on the semiconductor device and the substrate while maintaining the fixed state, and fixing the support on the substrate. Mounting method for a semiconductor device to the test carrier. 32. A substrate on which a semiconductor device having a plurality of electrode terminals is mounted, a plurality of contact terminals provided on the substrate corresponding to an arrangement pattern of the electrode terminals, and connection to the contact terminals. A plurality of test wiring patterns provided on the substrate, a support for covering the semiconductor device, and pressing the semiconductor device against the substrate; and a region for mounting the semiconductor device. Preparing a test carrier having a projection provided on the substrate so as to surround the semiconductor device; placing the semiconductor device in a region on the substrate surrounded by the projection; Mounting the semiconductor device on the substrate by fixing the semiconductor device on the substrate. 33. A substrate on which a semiconductor device having a plurality of electrode terminals is mounted, a plurality of contact terminals provided on the substrate corresponding to the arrangement pattern of the electrode terminals, and connection to the contact terminals. A plurality of test wiring patterns provided on the substrate, a support for covering the semiconductor device, and pressing the semiconductor device against the substrate, wherein the support comes into contact with the semiconductor device; A step of preparing a test carrier provided with a hole in a part of the region; a step of sucking the semiconductor device through the hole of the support, and pulling up the semiconductor device together with the support; A step of mounting the semiconductor device and the support thereon, and a step of fixing the support on the substrate and mounting the semiconductor device on the substrate. A method for attaching a semiconductor device to a carrier. 34. A method for testing a semiconductor device according to claim 1, wherein: