JPH1056197A - Hgcdte semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To execute channel stop for electrically separating photodiodes without using a heat processing process by providing a negative processing layer between a coating film in an n-type area with a p-type HgCdTe layer and inducing a p<+> -area just below. SOLUTION: Boron is selectively ion-injected in a p-type HgCdTe layer and plural n-type areas 12 are formed so as to constitute a photodiode array. Then, a ZnS protection film is formed on the whole face by an evaporation method and the AnS film is patterned by etching liquid. Then, a channel stop forming area 14 is opened. Then, a thin oxygen plasma processing layer 16 accompanied by oxidation is formed on the exposed face of the p-type HgCdTe layer 11 by using an electronic cyclotron resonance plasma processor. Then, a ZnS film 13 is removed and the SiN film 17 is formed on the whole face by the CVD method. Then, the contact hole 18 is formed by dry etching and In is provided on n-side electrode and Au on a p-side electrode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a HgCdTe semiconductor device and a method for manufacturing the same, and more particularly, to HgCdTe semiconductor devices.
The present invention relates to an HgCdTe semiconductor device in which a channel stop for electrically separating CdTe photodiodes is formed by making an interface state between an HgCdTe layer and a coating layer into an accumulation state, and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, as an infrared detector for detecting infrared rays in the vicinity of the 10 μm band, Hg having a Cd ratio of about 0.2 has been proposed.
A pn junction diode formed in a CdTe layer is used as a photodiode. The photodiode is arranged in a one-dimensional array or a two-dimensional array, and the photodiode is used for making electrical contact with a readout circuit. A structure is employed in which an array substrate and a readout circuit substrate are bonded to each other with a metal bump such as In formed on both.

[0003] This conventional photodiode array includes:
Since there is no channel stop, p-type HgCd
Depending on the diffusion length of the electrons in the Te layer, a phototransistor having an npn-type lateral structure is formed between the adjacent photodiodes, and electrons flow from the surrounding diodes to generate signals to the individual diodes. And the resolution of the infrared imaging screen is reduced.

In order to solve such a problem, a channel stop such as ap ⁺ type region may be provided between each active region, as in a silicon device.
An HgCdTe photodiode array provided with such a channel stop will be described with reference to FIG.

Referring to FIG. 6A, a plurality of n-type regions 42 are formed by implanting boron ions into a p-type HgCdTe layer 41 to form a photodiode, and the n-type regions 42 are separated from each other. A p ⁺ type region 43 is formed by ion-implanting an acceptor impurity to form a channel stop, and then a ZnS film 44 serving as a protective film is deposited on the entire surface, and then a contact hole for the n type region 42 is formed. The n-side electrode 45 is formed by depositing and patterning In.

The channel formed by such ap ⁺ type region 43
Due to the stop, electrons flowing out of a certain n ⁺ -type region 42 are blocked by the potential barrier at the p / p ⁺ boundary and cannot reach the adjacent n-type region 42, so that leakage current is prevented. It becomes. The formation of such a p ⁺ -type region 43 can also be achieved by releasing Hg atoms in the crystal by heat treatment or the like to generate Hg vacancies.

As another example, there is a method of forming an n ⁺ type region 46 by ion implantation of boron or the like instead of providing the p ⁺ type region 43. In this case, electrodes, electrons flow out from one n ⁺ -type region 42, which is absorbed by the n ⁺ -type region 46 serving as a drain connected with the n ⁺ -type region 46,
That is, because it is discharged to the outside through the metal grid 47 in FIG, since it is impossible to reach the n-type region 42 adjacent, which leakage current is prevented, the n ⁺ -type region 46 is a channel -It has the same action as the stop.

[0008]

However, the conventional HgCdT in which the p ⁺ type region 43 is provided as a channel stop is used.
In the e photodiode array, the p ⁺ type region 43
Requires a heat treatment step, which complicates the process, and also has a problem that it is difficult to form the p ⁺ -type region 43 reliably.

Further, in the HgCdTe photodiode array provided with the n ⁺ type region 46 as a drain,
In consideration of the voltage drop due to the substrate resistance, it is ideal to provide the metal grid 47 as shown in the figure, but there is a problem that the structure becomes complicated.

Accordingly, it is an object of the present invention to form a channel stop in an HgCdTe photodiode array with a simple structure and a simple manufacturing process with good reproducibility.

[0011]

FIG. 1 is an explanatory view of the principle configuration of the present invention. Referring to FIG. 1, means for solving the problems in the present invention will be described. See FIG. 1. (1) The present invention relates to an HgCdTe semiconductor
A plurality of n-type regions 2 are provided in the type HgCdTe layer 1 to form a photodiode array, and a negative fixed charge is applied between the coating film 6 between the n-type regions 2 and the p-type HgCdTe layer 1. And a p ⁺ -type region 5 is induced directly below the processing layer 4 having the negative fixed charge.

As described above, the coating film 6 between the n-type region 2 and the p-type
Between the type HgCdTe layer 1, by providing the processing layer 4 having a negative fixed charge, p ⁺ -type region 5 is induced immediately below the processing layer 4 having a negative fixed charge, the p ⁺ -type region 5 Acts as a channel stop, so that crosstalk and leakage current can be reduced.

In the present specification, “a processing layer having a negative fixed charge” refers to a layer containing a negative fixed charge in the processing layer itself, or a negative layer at the interface between the processing layer and the p-type HgCdTe layer 1. , And both cases.

(2) Further, according to the present invention, in a method of manufacturing a HgCdTe semiconductor device, a photodiode array including a plurality of n-type regions 2 is formed on a p-type HgCdTe layer 1 and then a space between the n-type regions 2 is formed. It is characterized in that the region is surface-treated with at least ionized oxygen, and at least the region that has been surface-treated with ionized oxygen is covered with the coating film 6.

As described above, the region between the n-type regions 2 is reduced.
Surface treatment using both ionized oxygen
Ionized oxygen, ie, oxygen plasma, or
The surface of the area treated with oxygen ions has a negative solid
A processing layer 4 having a constant charge is formed, and the negative fixed charge
P serving as a channel stop immediately below the processing layer 4 having
⁺Although the mold region 5 is formed, heat treatment is performed as in the conventional process.
Since no process is involved, the process is simplified, and p⁺Type
The formation of the region 5 is ensured.

(3) The present invention is characterized in that in (2), the surface treatment using ionized oxygen is an oxygen plasma treatment.

As described above, by using the oxygen plasma treatment as the surface treatment using the ionized oxygen, the treatment layer 4 having a negative fixed charge can be easily formed with good reproducibility.

(4) Further, according to the present invention, in a method of manufacturing a HgCdTe semiconductor device, a plurality of n-type regions 2 are provided in a p-type HgCdTe layer 1 to form a photodiode array. After the surface of the region is surface-treated with an acid, at least the region treated with the acid is covered with a coating film 6.

As described above, by treating the region between the n-type regions 2 with an acid, a treatment layer 4 having a negative fixed charge is formed on the surface of the region surface-treated with the acid.
A channel is located immediately below the processing layer 4 having the negative fixed charge.
Although the p ⁺ -type region 5 serving as a stop is formed, a heat treatment step is not involved unlike the conventional process, so that the process is simplified and the formation of the p ⁺ -type region 5 is ensured.

(5) The present invention is characterized in that, in the above (4), the surface treatment with an acid is a surface treatment with a mixed solution of sulfuric acid and water or a mixed solution of sulfuric acid and perchloric acid. Features.

As a surface treatment with an acid for forming the treatment layer 4 having such a negative fixed charge, sulfuric acid (H ₂ S
O ₄ ) and water, or sulfuric acid and perchloric acid (HCl
By using the surface treatment with the mixed solution of O ₄ ), the treatment layer 4 having a negative fixed charge can be easily formed with good reproducibility.

(6) The present invention is characterized in that in (4) or (5) above, the surface treatment with an acid is performed as a patterning step of the protective film 3.

As described above, by performing the surface treatment with an acid as a patterning step of the protective film 3, a unique step for forming the treatment layer 4 having a negative fixed charge is not required, and the manufacturing process is simplified. can do.

(7) The present invention is characterized in that in any one of the above (2) to (6), a SiN film is used as the coating film 6.

As described above, by using the SiN film as the coating film 6, the pn junction can be protected stably.
Further, the interface state of the SiN film / p-type HgCdTe layer 1 is
The accumulation state can be achieved with good reproducibility together with the processing layer 4 having a negative fixed charge.

[0026]

FIG. 2 shows a first embodiment of the present invention.
This will be described with reference to FIG. FIG. 2 is an explanatory diagram of the manufacturing process of the first embodiment, and FIG. 3 is an explanatory diagram of the function of the oxygen plasma processing layer formed in the first embodiment.

Referring to FIG. 2A, first, boron ions are selectively implanted into the p-type HgCdTe layer 11 to form a plurality of n-type regions 12, thereby forming a photodiode array. 10
A ZnS film 13 having a thickness of 00 to 3000 °, for example, 2000 °
Is formed as a protective film, and then the ZnS film 13 is patterned using an etching solution in which sulfuric acid (H ₂ SO ₄ ) and water (H ₂ O) are mixed at a volume ratio of 1: 1 to form a channel.
The stop formation region 14 is opened.

Next, referring to FIG. 2 (b), using an electron cyclotron resonance (ECR) plasma processing apparatus, only oxygen gas is allowed to flow to 5 × 10 ^-4 to 5 × 10 ^-4.
3 to 10 minutes, for example, 5 × 10 ⁻³ Torr, for example, at a pressure of 1 × 10 ⁻³ Torr, and in an oxygen plasma 15 at room temperature to 100 ° C., for example, room temperature.
For a minute, a thin oxygen plasma treatment layer 16 is formed on the exposed surface of the p-type HgCdTe layer 11 due to oxidation.

Next, after the ZnS film 13 is removed, a SiN film 17 is formed on the entire surface by a CVD method, and then a contact hole 18 is formed by dry etching using CF ₄ + O ₂ as a reaction gas. Then, for n-type region 12, In is n
Provided as a side electrode (not shown), p-side electrode (not shown)
Is provided as Au.

The oxygen plasma processing layer 16 formed by such an oxygen plasma processing contains many negative fixed charges, and the oxygen plasma processing layer 16 and the p-type H
Since many of the negative fixed charge at the interface between gCdTe layer 11 is considered to be generated, holes are attracted p ⁺ -type region 19 directly below the oxygen plasma treatment layer 16 is induced, and this p ⁺ -type region 19 Channel stop, p-type H
The p / p ⁺ interface formed between the gCdTe layer 11 and the gCdTe layer 11 serves as a potential barrier to prevent electron diffusion.

3 (a) and 3 (b). FIG. 3 (b) shows the gate electrode 20 on the oxygen plasma treatment layer 16 via the SiN film 17 as shown in FIG. 3 (a).
Indicates the voltage dependence of the MIS capacitance formed by providing the capacitance C, and indicates the relative value of the capacitance C to the capacitance C ₀ of the SiN film 17.

As is apparent from the figure, the CV curve shifts to the positive voltage side due to the presence of the oxygen plasma processing layer 16.
^It can be seen that a ⁺ type region is induced.

As described above, according to the first embodiment of the present invention, the p ⁺ -type region 19 can be formed without requiring an additional heat treatment step, so that the steps are simplified and , Reproducibility becomes good.

In the first embodiment, the oxygen plasma processing is performed to induce the p ⁺ -type region 19, but the present invention is not limited to the oxygen plasma processing, and is not limited to the oxygen plasma processing. An ion implantation process of ions may be used.

Next, a second embodiment of the present invention will be described with reference to FIGS. First, as shown in FIG. 4A, a plurality of n-type regions 22 are formed by selectively ion-implanting boron into the p-type HgCdTe layer 21 to form a photodiode array.
A ZnS film 23 having a thickness of 00 to 5000 °, for example, 2000 °
Is formed as a protective film, and then the ZnS film 23 is patterned by using an etching solution in which sulfuric acid (H ₂ SO ₄ ) and water (H ₂ O) are mixed at a volume ratio of 1: 1 to expose the pn junction. After that, CdT having a thickness of 1000 to 5000 Å, for example, 1000 に is formed on the entire surface by sputtering.
An e-film 24 is deposited.

The CdTe film 24 is suitable as a passivation film for protecting a pn junction,
This is suitable as a selective etching mask for the film 23.

Next, referring to FIG. 4B, using the pattern of the photoresist 25 as a mask, CdTe using an etching solution in which nitric acid (HNO ₃ ), acetic acid (CH ₃ COOH) and hydrofluoric acid (HF) are mixed.
The film 24 is etched to form openings 26 corresponding to contact holes and openings 2 corresponding to channel stops.
7 is formed.

Referring to FIG. 5C, the photoresist 25 is removed, and then CdTe
Using the film 24 as a mask, sulfuric acid (H ₂ SO ₄ ) and water (H ₂ SO ₄ )
The contact hole 29 is formed by patterning the ZnS film 23 using an etching solution in which O) is mixed at a capacitance ratio of 1: 1 to 1: 5, for example, 1: 1 and the channel / stop formation region 30 is exposed. Let it.

In this etching step, a thin acid-treated layer 31 due to oxidation is formed on the exposed surface of the contact hole 29 and the surface of the channel / stop formation region 30, and the thickness of the thin acid-treated layer 31 is excessive. This depends on the etching time, that is, the time longer than the time required for patterning the ZnS film 23.

Next, after forming an SiN film 32 over the entire surface by the CVD method, the SiN film 32 is formed by dry etching using a photoresist pattern (not shown) as a mask and CF ₄ + O ₂ as a reaction gas. By patterning the film 32, the SiN film 32 is left so as to cover the acid treatment layer 31, the contact hole 29 is opened again, and In is applied to the n-type region 22 with an n-side electrode (not shown). And Au as the p-side electrode (not shown). The acid treatment layer 31 formed on the exposed surface of the contact hole 29 is removed when the SiN film 32 is patterned.

Such sulfuric acid (H ₂ SO ₄ ) and water (H
_The acid treatment layer 31 formed by the etching process using ₂ O) contains many negative fixed charges, and many negative fixation at the interface between the acid treatment layer 31 and the p-type HgCdTe layer 21. Since it is considered that an electric charge is generated, holes are attracted directly below the acid-treated layer 31 and the p ⁺ -type region 33 is formed.
Is induced, and this p ⁺ type region 33 becomes a channel stop, thereby preventing diffusion of electrons.

As described above, according to the second embodiment of the present invention, the p ⁺ -type region 33 can be formed without requiring an additional heat treatment step. Since the reproducibility is improved and the step of exposing the channel / stop formation region 30 and the step of forming the acid treatment layer 31 are the same step, a unique process for forming a treatment layer having a negative fixed charge is performed. The process becomes unnecessary.

In the second embodiment, the second etching step of the ZnS film 23 is performed using sulfuric acid and water. However, the present invention is not limited to a mixed solution of sulfuric acid and water. , Sulfuric acid (H ₂ SO ₄ ) and perchloric acid (HClO)
An etching solution in which ₄ ) is mixed in a volume ratio of 1: 1 to 1: 5, for example, 1: 1 may be used.

In the second embodiment, the CdTe film 24 is used. However, the CdTe film 24 is not always necessary. The step of exposing the pn junction is omitted and the ZnS film 23 is omitted.
The opening corresponding to the contact hole and the channel / stop formation region may be directly etched, and the acid treatment layer 31 may be formed at that time.

In the second embodiment, in the patterning step of the CdTe film 24, nitric acid (HNO ₃ ), acetic acid (CH ₃ COOH) and hydrofluoric acid (H
F) is used, but since this wet etching step is not always accurate, H ₂
Dry etching using + Ar or CH ₄ + Ar as a reaction gas may be used.

In each of the above embodiments, p
The type HgCdTe layers 11 and 21 are actually grown epitaxially on a CdTe substrate, and the Cd ratio is 0.2, but is appropriately changed according to the wavelength of infrared light to be detected. In the case where the infrared detection device is configured to be hybrid with the silicon signal processing circuit board, the two boards are bonded to each other using the In bump.

[0047]

According to the present invention, a channel stop for electrically isolating photodiodes can be formed by a simple process without an additional heat treatment process. In addition to simplifying the process, the channel stop can be reliably formed with good reproducibility, and a high-resolution infrared solid-state imaging device can be realized.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a basic configuration of the present invention.

FIG. 2 is an explanatory diagram of a manufacturing process according to the first embodiment of the present invention.

FIG. 3 is an explanatory diagram of an operation of an oxygen plasma processing layer.

FIG. 4 is an explanatory diagram of a manufacturing process partway through a second embodiment of the present invention.

FIG. 5 is an explanatory diagram of a manufacturing process after FIG. 4 according to the second embodiment of the present invention.

FIG. 6 is an explanatory diagram of a conventional HgCdTe photodiode array.

[Explanation of symbols]

Reference Signs List 1 p-type HgCdTe layer 2 n-type region 3 protective film 4 processing layer having negative fixed charge 5 p ⁺ -type region 6 coating film 11 p-type HgCdTe layer 12 n-type region 13 ZnS film 14 channel stop formation region 15 oxygen Plasma 16 Oxygen plasma treatment layer 17 SiN film 18 Contact hole 19 p ⁺ -type region 20 Gate electrode 21 p-type HgCdTe layer 22 n-type region 23 ZnS film 24 CdTe film 25 Photoresist 26 Opening corresponding to contact hole 27 Channel stop 28 H ₂ SO ₄ + H ₂ O etching solution 29 contact hole 30 channel stop formation region 31 acid treatment layer 32 SiN film 33 p ⁺ -type region 41 p-type HgCdTe layer 42 n-type region 43 p ⁺ -type region 44 ZnS film 45 n-side electrode 46 n ⁺ -type region 4 Metal grid

Claims (7)

[Claims] A photodiode array is formed by providing a plurality of n-type regions in a p-type HgCdTe layer, and a negative fixing is provided between a coating film between the n-type regions and the p-type HgCdTe layer. An HgCdTe semiconductor device, comprising: a treatment layer having a charge; and a p ⁺ -type region induced just below the treatment layer having a negative fixed charge. 2. After forming a photodiode array composed of a plurality of n-type regions in a p-type HgCdTe layer,
HgCdT wherein a region between the mold regions is surface-treated with ionized oxygen, and at least a region surface-treated with the ionized oxygen is covered with a coating film.
e Method for manufacturing semiconductor device. 3. The method according to claim 2, wherein the surface treatment using the ionized oxygen is an oxygen plasma treatment.
The manufacturing method of the HgCdTe semiconductor device described in the above. 4. After forming a photodiode array composed of a plurality of n-type regions on a p-type HgCdTe layer,
A method of manufacturing a HgCdTe semiconductor device, comprising: after treating a region between mold regions with an acid, covering at least the region treated with the acid with a coating film. 5. The HgCdT according to claim 4, wherein the surface treatment with the acid is a mixture of sulfuric acid and water or a mixture of sulfuric acid and perchloric acid.
e Method for manufacturing semiconductor device. 6. The method according to claim 4, wherein the surface treatment with the acid is performed as a step of patterning a protective film.
Or the method for manufacturing a HgCdTe semiconductor device according to 5. 7. The method for manufacturing a HgCdTe semiconductor device according to claim 2, wherein an SiN film is used as the coating film.