JP2002280596A - Semiconductor device, image sensor, pin diode and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device wherein a photo diode formed on an insulation substrate can be formed thicker than an active layer of an SOI transistor. SOLUTION: The semiconductor device comprises a photoelectric transfer element for converting light into electric charges and a transistor, which are formed on one and the same substrate. The semiconductor device also comprises an intermediate film having a groove- or hole-like slot structure formed on the substrate, and a photoelectric transfer film of the photoelectric transfer element so stacked that the slot of the intermediate film is embedded in the film. Using the slot structure of the intermediate film, the photoelectric transfer film can be formed thick.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device for converting light into electric charges, which includes a photoelectric conversion element such as a photodiode and a transistor, and more particularly to a semiconductor device for improving the photoelectric conversion efficiency of the photoelectric conversion element. Regarding improvement.

[0002]

2. Description of the Related Art MOS sensors and Cs are used as image sensors.
MOS sensors have been proposed. In these devices, a photodiode, which is a photoelectric conversion element, and a MOS transistor or a CMOS transistor constitute one cell, and the cells are arranged in a matrix on a semiconductor substrate to form an imaging device. Elements such as transistors formed on the substrate are separated from each other (element separation) by a field oxide film, a well structure, or the like.

[0003]

However, if the elements are arranged close to each other on a substrate in order to highly integrate a photodiode or a MOS transistor, a leak current is generated between the source or drain of the transistor and the substrate. I do. This becomes a dark current and generates noise, and S /
Decrease N ratio and dynamic range.

When high-energy incident light is incident on a light receiving region of a cell on a substrate, the incident light penetrates deep into the semiconductor substrate to generate electron-hole pairs. When the electric charge in the substrate enters the photoelectric conversion element of another cell, there is a possibility that the electric signal output from the cell and the incident light amount do not correspond exactly.

Accordingly, the applicant has filed Japanese Patent Application No. 2000-348.
At 501, SOI (silico) is used instead of a bulk substrate.
(on insulator) A structure in which a semiconductor element is formed on a substrate having a semiconductor film laminated on an insulating film such as a substrate has been proposed. In other words, a structure in which a photoelectric conversion film and a MOS transistor are integrally formed on a semiconductor film (for example, silicon) on an insulating substrate reduces junction leakage current, and charges generated on the substrate by incidence of high-energy light are reduced. It has been suppressed from entering the photodiodes of other cells.

Here, in order to increase the photoelectric conversion efficiency, the photoelectric conversion film is desirably formed to have a certain thickness so as to absorb all incident light energy as electric charges. Further, the sensitivity characteristic of the photoelectric conversion film with respect to the wavelength of the incident light is related to the film thickness. In order for the photoelectric conversion film to have high sensitivity at a relatively low wavelength in the visible light range,
For example, it is desirable that the thickness be 1 μm or more.

However, in a structure in which the photoelectric conversion film and the source, drain and channel regions of the MOS transistor are formed of the same semiconductor film (active layer),
(SOI) The thickness of the active layer of the transistor is 0.1 μm.
(About 1000 angstroms), which is a large difference from the required thickness of the photoelectric conversion film (for example, 1 μm or more). For this reason, it is difficult to freely set only the thickness of the photoelectric conversion film.

Therefore, an object of the present invention is to provide a semiconductor device which facilitates forming a photoelectric conversion film with a large thickness.

Further, according to the present invention, in a semiconductor device including a photoelectric conversion film formed on an insulating substrate and a MOS transistor connected to the photoelectric conversion film, the photoelectric conversion film is formed to be thicker than an active layer of the MOS transistor. It is an object to provide a semiconductor device which can be easily formed.

The present invention also provides a semiconductor device including a photodiode and a MOS transistor formed on an insulating substrate, wherein the photodiode can be easily formed in a thicker film than an active layer of the MOS transistor. The purpose is to provide.

[0011]

In order to achieve the above object, the present invention provides a semiconductor device in which a photoelectric conversion element for converting light into electric charges and an active element (for example, a transistor) are arranged on the same substrate. , Wherein the photoelectric conversion element includes an intermediate film having a groove or a hole formed on the substrate, and a photoelectric conversion film covering at least a part of the intermediate film.

Further, according to the present invention, there is provided a semiconductor device including a photoelectric conversion element for converting light into electric charges and an active element on the same substrate, wherein the groove or the hole is formed on the substrate. An intermediate film having a structure, and a photoelectric conversion film of the photoelectric conversion element stacked so as to fill the groove of the intermediate film, wherein the photoelectric conversion film is formed by utilizing a groove structure of the intermediate film. Is formed in a thick film.

[0013] By utilizing such a slot, the photoelectric conversion film includes, in addition to the portion deposited on the intermediate film, a portion in which the slot is buried, whereby the photoelectric conversion film is substantially arranged in the incident light direction. It is possible to increase the thickness of the photoelectric conversion film. By increasing the thickness, the efficiency of photoelectric conversion can be increased. In addition, when the film thickness is large, it is possible to improve the sensitivity to light of a lower wavelength (visible light region).

Preferably, the substrate is an insulating substrate,
The active element is a transistor connected to the photoelectric conversion element, and the thickness of the photoelectric conversion film is formed to be larger than the thickness of the active layer of the transistor. The insulating substrate is
A glass substrate or the like may be used instead of the silicon oxide film.

By using such an insulating substrate, it is possible to reduce leakage to the substrate. Further, it is easy to form the active layer of the active element (for example, a transistor) connected to the photoelectric conversion film of the photoelectric conversion element to have a different thickness, and the photoelectric conversion film is formed to be a thick film to improve the photoelectric conversion efficiency. It is possible to increase.

Preferably, the width of the slot of the intermediate film is formed to be approximately twice the deposition height of the photoelectric conversion film. With this configuration, the hole can be entirely buried.

Preferably, the intermediate film is formed simultaneously with the interlayer insulating film of the transistor. With such a configuration, there is an advantage that the number of processes for forming the intermediate film does not need to be increased. Further, by surrounding the photoelectric change region with the insulating substrate and the interlayer insulating film having the slot, it is possible to suppress the incident light energy from entering another cell region.

Preferably, the photoelectric conversion element is a PIN diode, and the photoelectric conversion film is a PIN diode of the diode.
Layer. By using a PIN diode for photoelectric conversion, more efficient photoelectric conversion becomes possible.

An image sensor according to the present invention is an image sensor in which unit cells that generate electric charges according to the amount of light are arranged in a matrix on a substrate, wherein the unit cells include a photoelectric conversion element that converts light into electric charges and this photoelectric conversion element. An active element (for example, a transistor) connected to the conversion element, wherein the photoelectric conversion film of the photoelectric conversion element embeds an intermediate film having a groove-like or hole-like groove structure formed on the substrate. And thereby the film is thickened.

With this configuration, the photoelectric conversion film of the cell can be formed in a thick film, and the photoelectric conversion efficiency can be further improved.

Preferably, the substrate of the image sensor is an insulating substrate, the active element is a transistor connected to the photoelectric conversion element, and the photoelectric conversion element is a PI.
In an N diode, the photoelectric conversion film is an I layer of the diode, and the intermediate film is an insulating film.

Preferably, the shape of the slot is a horizontally long columnar groove having a polygonal cross section, for example, a rectangle, formed on the upper surface of the intermediate film. Or a vertically long corner or columnar hole dug in the direction of the insulating substrate from the upper surface of the intermediate film,
Alternatively, it includes a pyramidal or conical hole. The groove is, for example,
A plurality of them are arranged in parallel with each other, or formed in a grid like a grid pattern. The holes are arranged, for example, in a matrix. Further, the groove may be formed in a concentric shape or a spiral shape, and may be formed by a plurality of concentric polygons (for example, a square).
May be formed similarly to a concentric circle or a spiral.

Further, a PIN diode according to the present invention is a PIN diode in which each semiconductor layer is arranged in a lateral direction of a substrate, wherein the P-type semiconductor layer containing a high concentration of P-type impurities is connected to the P-type semiconductor layer. An I-type semiconductor layer containing an impurity at a low concentration, and an N-type semiconductor layer connected to the I-type semiconductor layer and containing an N-type impurity at a high concentration. The semiconductor layer or the N-type semiconductor layer is formed so as to overlap at least partially.

With this configuration, the PIN diode extending in the lateral direction is formed on the substrate by partially overlapping the region, so that the ratio of the area of the PIN diode to the substrate is relatively reduced. It becomes possible.

Preferably, the I-type semiconductor layer is formed such that a cross section of the I-type semiconductor layer in the longitudinal direction of the substrate has a comb-like shape.

As a result, the thickness of the I-type semiconductor layer can be substantially increased, and when photoelectric conversion is performed with a PIN diode, the I-type semiconductor layer can efficiently convert light having a low wavelength in the visible region. It is possible to do.

Preferably, the I-type semiconductor layer and the P-type semiconductor layer
An intermediate film provided with a through hole is disposed between the P-type semiconductor layer and the N-type semiconductor layer via the through-hole. Make an electrical connection with the layer.

Preferably, the substrate is an insulating substrate, and the I-type semiconductor layer has a photoelectric conversion function.

With this configuration, the I-type semiconductor layer is made substantially thicker, and at the same time, the substrate and the intermediate film (preferably, an insulating film) surround the photoelectric conversion film (I-type semiconductor layer). It is possible to prevent the generated charges from entering the device.

Further, an electronic apparatus of the present invention includes any of the above-described semiconductor device, image sensor, and PIN diode.

[0031]

Embodiments of a semiconductor device according to the present invention will be described below with reference to the drawings.

FIG. 1 shows an example in which the present invention is applied to an image sensor 1 which is a semiconductor device. In the image sensor 1, unit cells including a photoelectric conversion element and a MOS transistor are arranged in a matrix. In the figure, a cross section of a portion corresponding to a unit cell is shown, and an insulating substrate 2 is shown.
Diode 3 as a photoelectric conversion element formed on the substrate
And a MOS transistor 4 for outputting the output of the diode in response to the operation command signal. The PIN diode 3 is a P layer 3 in which P-type impurities are implanted at a high concentration.
a, an I (intrinsic) layer 3c having a low impurity concentration and a high resistivity, and an N layer 3c having an N-type impurity implanted at a high concentration. Although not shown, an amplifier for amplifying the output of the photoelectric conversion element is provided in each unit cell to provide high sensitivity and high sensitivity.
A low noise CMOS configuration is also possible. The insulating substrate 2 includes an insulating film 13a and a semiconductor film 1 on the surface of the substrate 11.
A so-called SOI (semiconductor-on-insulator) substrate in which 3 layers are stacked can be used. For example, substrate 1
1, a silicon oxide film is used as the insulating film 13a, and a single crystal silicon film is used as the semiconductor film 13.
MOS transistor 4 as an active element formed on substrate 2 is also called an SOI transistor.

The semiconductor film 13 can be made of not only single-crystal silicon but also polycrystalline silicon and amorphous silicon, and the substrate can be made of glass and the transistor can have a TFT structure.

The PIN diode 3 connected to the source of the transistor 4 has the I layer 3b formed to be thicker than usual. By forming the I layer 3b for performing photoelectric conversion in a thick film, it is possible to improve the efficiency of photoelectric conversion and obtain required sensitivity characteristics in the visible light region. For this reason, a structure is employed in which a groove 18 formed in the insulating layer 17 as an intermediate film interposed between the I layer 3b and the N layer 3c is buried in the I layer 3b. The thickness of the I layer 3b itself and the slot 1
The thickness of the entire I layer is increased equivalently to the thickness of the I layer 3b corresponding to the depth of 8. For example, the thickness of the I layer itself is 0.5 μm.
m (5000 angstroms) and the depth of the slot are set to about 1 μm in consideration of use in the visible light region. Of course, these can be determined according to required sensitivity characteristics, and the film thickness is not limited to such. When the ratio between the film thickness (deposition height) of the I layer itself and the width of the slot 18 is set to about 1: 2 or less, the slot 18 is buried.

The periphery of the PIN diode 3 is covered with an insulating film 13a and interlayer insulating films 17 and 20 of the substrate. The periphery of the active layer 13 of the MOS transistor 4 is also covered by the insulating film 13a and the interlayer insulating film 17 of the substrate. Therefore, even when charges are generated by the incident light of high energy, the charges are prevented from leaking to the adjacent cells.

The PIN diode 3 configured as described above
Since the P layer 3a, the I layer 3b, and the N layer 3c extend in the lateral direction with respect to the substrate and the I layer 3b and the N layer 3c partially overlap, the P layer 3a, The area of the unit cell can be reduced as compared with a case where the layer 3b and the N layer 3c are arranged side by side. In the embodiment, the I layer 3b and the N layer 3c overlap, but the P layer 3a and the I layer 3b may overlap. Further, the respective regions may have opposite polarities.

Next, a manufacturing process of the above-described semiconductor device will be described with reference to FIGS.

First, as shown in FIG. 2, the surface of the silicon substrate 11 is oxidized to form a silicon oxide film 12 having a thickness of about 2000 Å. On this insulating film, a thin silicon film (semiconductor film) 13 to be an active layer
Is formed to a thickness of about 1000 Å, and SO
An I substrate 2 is obtained. Note that an SOI substrate may be purchased.

The silicon film on the surface of the substrate 2 is thermally oxidized.
Gate oxide film with a thickness of about 100 Å
(Silicon oxide film) 14 is formed. This allows MO
Obtain a gate insulating film of the S transistor. This gate oxidation
Low concentration of boron ions in the silicon layer 13 from above the film 14
(P⁻) To activate the SOI transistor
Form a layer. For example, BF₂ ⁺Dose 10¹²c
m^-2, With an acceleration energy of 20 keV. In addition,
Silicon nitride as a mask material on the gate oxide film 14 of FIG.
Oxide film 15 is formed to a thickness of about 1000 angstroms.
(See FIG. 3). This silicon nitride film 15 is
To leave the transistor area, etc., and expose the others (Fig.
4). This silicon nitride film 15 is used as an oxygen intrusion prevention mass.
The silicon film 13 is oxidized as a step
Except for the oxide film 13a. After that, the nitride film 15 is removed.
I do. On top of this, a high concentration of phosphorus (N⁺) Doped with
The silicon film 16 is deposited at 3500 Å by CVD.
It is formed to a thickness of about a troem. This polysilicon film 1
6 to form a transistor gate 16a and
The N layer 16b of the PIN diode is formed (see FIG. 6).
See). Further, using the gate 16a of the transistor as a mask,
High concentration of phosphorus ions (N ⁺)
To form a source region and a drain region. example
If phosphorus ion P⁺Is 2 × 10^Fifteencm^-2,
The injection is performed at an acceleration energy of 30 keV.

Next, silicon oxide is deposited on the substrate by the CVD method to form an interlayer insulating film 17 (see FIG. 7). This insulating film 17 is patterned to form a slot 18 on the N layer 16b in the PIN diode region. Insulating films 14 and 16 on the drain region of the transistor
Is removed, and a connection hole exposing the drain region (active layer) is opened (see FIG. 8).

Next, the polysilicon film 1 is formed by the CVD method.
9 is formed to fill the trench 18 and the drain region. Next, a photoresist is applied and patterned to serve as a mask, and boron ions are implanted at a low concentration (P ⁻ ) into a portion of the polysilicon film 19 corresponding to the I region of the PIN diode.
The mask is removed, a photoresist is applied, and patterning is performed to use the mask as a mask. Boron ions are highly concentrated (P) in a portion of the polysilicon film 19 corresponding to the P region of the PIN diode.
⁺ ). For example, a BF ₂ ⁺ dose of 3 × 10
^The implantation is performed at ¹⁵ cm ⁻² and an acceleration energy of 40 keV. Further, the mask is removed, a photoresist is applied, and the photoresist is patterned to form a mask.
Phosphorus ions are implanted at a high concentration (N ⁺ ) into a portion connecting the N region 16b and the drain region of the N diode. . For example, a dose of 3 × 10 ¹⁵ c of phosphorus ions P ⁺ is used.
Implantation is performed at m ⁻² and an acceleration energy of 60 keV. Next, the polysilicon film 19 is patterned to form a PIN diode (see FIG. 9).

Further, silicon oxide is deposited on the PIN diode and the transistor by the CVD method to form an interlayer insulating film 20. The interlayer insulating film 20 is patterned, and a contact hole is opened to connect the gate, the source of the transistor, the P layer of the PIN diode, and the wiring. Next, for example, aluminum is deposited by a sputtering method to form the wiring film 21. Patterning is performed so that the wiring film 21 has a required pattern (see FIG. 10).

Next, a PSG film 2 is used as a protective film and a planarizing film.
2 is deposited by a CVD method and reflowed to flatten the surface of the substrate. Further, a silicon nitride film 23 is formed thereon by a CVD method as a protective film, and patterning is performed to open a PIN diode region and form a window (see FIG. 11). Although not particularly mentioned, heat treatment for activation is appropriately performed at the time of impurity implantation. Thus, an image sensor is manufactured.

FIG. 12 shows various examples of formation of the slot 18 formed in the PIN diode region. Slot 18
May be formed in parallel as shown in FIG. Further, the slot 18 may be formed as a large number of isolated holes as shown in FIG. Furthermore, slot 18
May be formed by a plurality of concentric polygons or spirals (not shown) as shown in FIG.

As described above, according to the embodiment of the present invention, the PI in which the photoelectric conversion film is formed as a thick film using the groove 18 is used.
An N diode is obtained. Since it is easy to form a thick film using the depth of the groove 18 (the thickness of the oxide film 17), it is possible to obtain an optical sensor having good sensitivity characteristics in a visible light region having a relatively long wavelength. It becomes possible.

Further, according to the structure of the embodiment, since the periphery of the PIN diode and the transistor is surrounded by the insulating film, it is difficult for the charge generated by light incidence to leak to the adjacent cells.

Further, according to the configuration of the embodiment, it is easy to form the photoelectric conversion film (I layer) of the photosensor in a thicker film than the active layer of the SOI transistor.

The semiconductor film 13 serving as an active layer on which an active element is formed is a single crystal film (for example, single crystal silicon).
In addition, a polycrystalline film (for example, a polysilicon film) or an amorphous film (for example, an amorphous silicon film) may be used.

The substrate may be not only a silicon substrate but also a glass substrate.

[0050]

As described above, according to the semiconductor device and the like of the present invention, it is possible to obtain a semiconductor device in which the thickness of the photoelectric conversion film can be easily increased. In particular,
This is preferable for a semiconductor device using an SOI transistor having a thin active layer.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating an embodiment of a semiconductor device according to the present invention.

FIG. 2 is a process diagram illustrating a process for manufacturing a semiconductor device according to the present invention.

FIG. 3 is a process diagram illustrating a process for manufacturing a semiconductor device according to the present invention.

FIG. 4 is a process diagram illustrating a process for manufacturing a semiconductor device according to the present invention.

FIG. 5 is a process diagram illustrating a process for manufacturing a semiconductor device according to the present invention.

FIG. 6 is a process diagram illustrating a process for manufacturing a semiconductor device according to the present invention.

FIG. 7 is a process diagram illustrating a process of manufacturing a semiconductor device according to the present invention.

FIG. 8 is a process diagram illustrating a process for manufacturing a semiconductor device according to the present invention.

FIG. 9 is a process diagram illustrating a process for manufacturing a semiconductor device according to the present invention.

FIG. 10 is a process diagram illustrating a process for manufacturing a semiconductor device according to the present invention.

FIG. 11 is a process diagram illustrating a process for manufacturing a semiconductor device according to the present invention.

FIG. 12 is an explanatory diagram for explaining various patterns of a slot 18;

[Explanation of symbols]

 Reference Signs List 1 image sensor 2 SOI substrate 3 PIN diode 3a P layer 3b I layer 3c N layer 4 MOS transistor (SOI transistor) 13 active layer

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M118 AA01 AA10 BA02 BA05 CA05 CB06 CB07 EA01 FB13 FC06 FC16 5F049 MA04 MB02 NA05 NB03 PA01 RA02 RA08 SS03 5F110 AA04 AA06 AA21 BB10 CC02 DD02 DD05 DD13 FF02 GG23 GG02 GG02 HJ23 HL03 HL23 HL24 NN03 NN23 NN24 NN25 NN35 NN62 NN66 QQ11 QQ19

Claims (12)

[Claims] 1. A semiconductor device in which a photoelectric conversion element for converting light into electric charges and an active element are arranged on the same substrate, wherein the photoelectric conversion element has a groove or a hole formed on the substrate. An intermediate film, a photoelectric conversion film covering at least a part of the intermediate film,
A semiconductor device, comprising: 2. The semiconductor device according to claim 1, wherein the substrate is an insulating substrate, the active element is a transistor connected to the photoelectric conversion element, and a thickness of the photoelectric conversion film is larger than a thickness of an active layer of the transistor. The semiconductor device according to claim 1, wherein: 3. The semiconductor device according to claim 1, wherein a width of said slot of said intermediate film is formed to be approximately twice a deposition height of said photoelectric conversion film. 4. The semiconductor device according to claim 1, wherein said intermediate film is formed simultaneously with an interlayer insulating film of said transistor. 5. The semiconductor device according to claim 1, wherein the photoelectric conversion element is a PIN diode, and an I layer of the diode functions as the photoelectric conversion film. 6. An image sensor in which unit cells that generate electric charges according to the amount of light are arranged in a matrix on a substrate, wherein the unit cells include a photoelectric conversion element that converts light into electric charges and a photoelectric conversion element. And an active element to be connected, wherein the photoelectric conversion film of the photoelectric conversion element is formed so as to bury an intermediate film having a groove-like or hole-like grooved hole structure formed on the substrate, thereby forming a thick film. An image sensor, which is formed into a film. 7. The substrate is an insulating substrate, the active element is a transistor connected to the photoelectric conversion element, the photoelectric conversion element is a PIN diode, and the photoelectric conversion film is an I layer of the diode. The image sensor according to claim 6, wherein the intermediate film is an insulating film. 8. A semiconductor device in which each semiconductor layer is arranged in a lateral direction of a substrate.
An IN diode, comprising: a P-type semiconductor layer containing a P-type impurity at a high concentration; and an I-type diode connected to the P-type semiconductor layer and containing a P-type impurity at a low concentration.
A type semiconductor layer, an N-type semiconductor layer connected to the I-type semiconductor layer and containing an N-type impurity at a high concentration, wherein the I-type semiconductor layer, the P-type semiconductor layer, or the N-type semiconductor layer. Are formed so as to at least partially overlap with each other. 9. The PIN diode according to claim 8, wherein the I-type semiconductor layer is formed such that a cross section of the I-type semiconductor layer in a vertical direction of the substrate has a comb-like shape. 10. An intermediate film having a through hole provided between the I-type semiconductor layer and the P-type semiconductor layer or the N-type semiconductor layer, wherein the I-type semiconductor layer has a through hole. 10. The PIN diode according to claim 8, wherein the PIN diode is electrically connected to the P-type semiconductor layer or the N-type semiconductor layer via a semiconductor device. 11. The PIN diode according to claim 9, wherein said I-type semiconductor layer has a photoelectric conversion function. 12. An electronic device including the electronic device according to claim 1.