JPH10506492A5 - - Google Patents

Info

Publication number
JPH10506492A5
JPH10506492A5 JP1997506486A JP50648697A JPH10506492A5 JP H10506492 A5 JPH10506492 A5 JP H10506492A5 JP 1997506486 A JP1997506486 A JP 1997506486A JP 50648697 A JP50648697 A JP 50648697A JP H10506492 A5 JPH10506492 A5 JP H10506492A5
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1997506486A
Other languages
English (en)
Japanese (ja)
Other versions
JPH10506492A (ja
Filing date
Publication date
Application filed filed Critical
Priority claimed from PCT/IB1996/000683 external-priority patent/WO1997004401A2/en
Publication of JPH10506492A publication Critical patent/JPH10506492A/ja
Publication of JPH10506492A5 publication Critical patent/JPH10506492A5/ja
Pending legal-status Critical Current

Links

JP9506486A 1995-07-21 1996-07-12 高性能密度を有するマルチメディアプロセッサアーキテクチャ Pending JPH10506492A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
EP95202008 1995-07-21
AT95203031.0 1995-11-08
EP95203031 1995-11-08
AT95202008.9 1995-11-08
PCT/IB1996/000683 WO1997004401A2 (en) 1995-07-21 1996-07-12 Multi-media processor architecture with high performance-density

Publications (2)

Publication Number Publication Date
JPH10506492A JPH10506492A (ja) 1998-06-23
JPH10506492A5 true JPH10506492A5 (enExample) 2004-08-19

Family

ID=26139512

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9506486A Pending JPH10506492A (ja) 1995-07-21 1996-07-12 高性能密度を有するマルチメディアプロセッサアーキテクチャ

Country Status (5)

Country Link
US (1) US5959689A (enExample)
EP (1) EP0789882B1 (enExample)
JP (1) JPH10506492A (enExample)
DE (1) DE69610548T2 (enExample)
WO (1) WO1997004401A2 (enExample)

Families Citing this family (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19748139A1 (de) * 1997-10-31 1999-05-06 Philips Patentverwaltung Anordnung zum Mischen und/oder Bearbeiten von Videosignalen
DE69822591T2 (de) * 1997-11-19 2005-03-24 Imec Vzw System und Verfahren zur Kontextumschaltung über vorbestimmte Unterbrechungspunkte
JP3573614B2 (ja) 1998-03-05 2004-10-06 株式会社日立製作所 画像処理装置及び画像処理システム
GB9804770D0 (en) * 1998-03-07 1998-04-29 Engineering Business Ltd Apparatus for extracting power from moving water
US6646639B1 (en) 1998-07-22 2003-11-11 Nvidia Corporation Modified method and apparatus for improved occlusion culling in graphics systems
US6323755B1 (en) * 1998-08-19 2001-11-27 International Business Machines Corporation Dynamic bus locking in a cross bar switch
US6275890B1 (en) * 1998-08-19 2001-08-14 International Business Machines Corporation Low latency data path in a cross-bar switch providing dynamically prioritized bus arbitration
US6347344B1 (en) * 1998-10-14 2002-02-12 Hitachi, Ltd. Integrated multimedia system with local processor, data transfer switch, processing modules, fixed functional unit, data streamer, interface unit and multiplexer, all integrated on multimedia processor
US6041400A (en) * 1998-10-26 2000-03-21 Sony Corporation Distributed extensible processing architecture for digital signal processing applications
US6744472B1 (en) * 1998-11-09 2004-06-01 Broadcom Corporation Graphics display system with video synchronization feature
US20060174052A1 (en) * 2005-02-02 2006-08-03 Nobukazu Kondo Integrated circuit and information processing device
US6844880B1 (en) 1999-12-06 2005-01-18 Nvidia Corporation System, method and computer program product for an improved programmable vertex processing model with instruction set
DE19962730C2 (de) 1999-12-23 2002-03-21 Harman Becker Automotive Sys Videosignalverarbeitungssystem bzw. Videosignalverarbeitungsverfahren
KR100385233B1 (ko) * 2000-03-14 2003-05-23 삼성전자주식회사 데이터 프로세싱 시스템의 익스포넌트 유닛
US7006101B1 (en) 2001-06-08 2006-02-28 Nvidia Corporation Graphics API with branching capabilities
US7162716B2 (en) 2001-06-08 2007-01-09 Nvidia Corporation Software emulator for optimizing application-programmable vertex processing
US7456838B1 (en) 2001-06-08 2008-11-25 Nvidia Corporation System and method for converting a vertex program to a binary format capable of being executed by a hardware graphics pipeline
US7213148B2 (en) * 2001-06-13 2007-05-01 Corrent Corporation Apparatus and method for a hash processing system using integrated message digest and secure hash architectures
US7266703B2 (en) 2001-06-13 2007-09-04 Itt Manufacturing Enterprises, Inc. Single-pass cryptographic processor and method
US7360076B2 (en) * 2001-06-13 2008-04-15 Itt Manufacturing Enterprises, Inc. Security association data cache and structure
US7249255B2 (en) * 2001-06-13 2007-07-24 Corrent Corporation Apparatus and method for a hash processing system using multiple hash storage areas
WO2003005225A2 (en) * 2001-07-07 2003-01-16 Koninklijke Philips Electronics N.V. Processor cluster
DE10141130C1 (de) * 2001-08-22 2003-04-03 Sci Worx Gmbh Verfahren und Vorrichtung zur Kodierung und Dekodierung von digitalen Bilddatenströmen
WO2003041322A2 (de) 2001-10-31 2003-05-15 Infineon Technologies Ag Hardware-struktur und verfahren für eine sende-empfangs-einrichtung mit konfigurierbaren coprozessoren für mobilfunkanwendungen
KR100960413B1 (ko) * 2001-12-14 2010-05-28 엔엑스피 비 브이 데이터 처리 시스템, 통신 수단 및 데이터 처리 방법
US8284844B2 (en) 2002-04-01 2012-10-09 Broadcom Corporation Video decoding system supporting multiple standards
US7133972B2 (en) * 2002-06-07 2006-11-07 Micron Technology, Inc. Memory hub with internal cache and/or memory access prediction
WO2004008719A2 (en) * 2002-07-12 2004-01-22 Sca Technica, Inc Self-booting software defined radio module
US7117316B2 (en) 2002-08-05 2006-10-03 Micron Technology, Inc. Memory hub and access method having internal row caching
US6820181B2 (en) 2002-08-29 2004-11-16 Micron Technology, Inc. Method and system for controlling memory accesses to memory modules having a memory hub architecture
US7395208B2 (en) * 2002-09-27 2008-07-01 Microsoft Corporation Integrating external voices
US7646817B2 (en) * 2003-03-28 2010-01-12 Microsoft Corporation Accelerating video decoding using a graphics processing unit
US7107415B2 (en) 2003-06-20 2006-09-12 Micron Technology, Inc. Posted write buffers and methods of posting write requests in memory modules
US7406090B2 (en) * 2003-06-30 2008-07-29 Intel Corporation Managing a buffer for media processing
US7353362B2 (en) 2003-07-25 2008-04-01 International Business Machines Corporation Multiprocessor subsystem in SoC with bridge between processor clusters interconnetion and SoC system bus
US7412588B2 (en) 2003-07-25 2008-08-12 International Business Machines Corporation Network processor system on chip with bridge coupling protocol converting multiprocessor macro core local bus to peripheral interfaces coupled system bus
US7075541B2 (en) * 2003-08-18 2006-07-11 Nvidia Corporation Adaptive load balancing in a multi-processor graphics processing system
US7120743B2 (en) 2003-10-20 2006-10-10 Micron Technology, Inc. Arbitration system and method for memory responses in a hub-based memory system
US7330992B2 (en) 2003-12-29 2008-02-12 Micron Technology, Inc. System and method for read synchronization of memory modules
ES2445333T3 (es) * 2004-01-08 2014-03-03 Entropic Communications, Inc. Distribución de vectores candidatos basada en complejidad de movimiento local
EP2207103A1 (en) 2004-04-01 2010-07-14 Panasonic Corporation Integrated circuit for video/audio processing
US8704837B2 (en) 2004-04-16 2014-04-22 Apple Inc. High-level program interface for graphics operations
US8134561B2 (en) 2004-04-16 2012-03-13 Apple Inc. System for optimizing graphics operations
US7162567B2 (en) 2004-05-14 2007-01-09 Micron Technology, Inc. Memory hub and method for memory sequencing
US7519788B2 (en) 2004-06-04 2009-04-14 Micron Technology, Inc. System and method for an asynchronous data buffer having buffer write and read pointers
US7765250B2 (en) 2004-11-15 2010-07-27 Renesas Technology Corp. Data processor with internal memory structure for processing stream data
US8279886B2 (en) 2004-12-30 2012-10-02 Intel Corporation Dataport and methods thereof
EP1894094A1 (en) * 2005-06-03 2008-03-05 Nxp B.V. Data processing system and method for scheduling the use of at least one exclusive resource
TW200734878A (en) * 2006-03-06 2007-09-16 Realtek Semiconductor Corp Data access apparatus with multiple buses and method thereof
US8218091B2 (en) 2006-04-18 2012-07-10 Marvell World Trade Ltd. Shared memory multi video channel display apparatus and methods
US8264610B2 (en) 2006-04-18 2012-09-11 Marvell World Trade Ltd. Shared memory multi video channel display apparatus and methods
US8284322B2 (en) 2006-04-18 2012-10-09 Marvell World Trade Ltd. Shared memory multi video channel display apparatus and methods
US7685409B2 (en) * 2007-02-21 2010-03-23 Qualcomm Incorporated On-demand multi-thread multimedia processor
WO2008139274A1 (en) * 2007-05-10 2008-11-20 Freescale Semiconductor, Inc. Video processing system, integrated circuit, system for displaying video, system for generating video, method for configuring a video processing system, and computer program product
WO2009145608A1 (en) * 2008-05-27 2009-12-03 Eonic B.V. Flexible architecture data processing unit
US20110293022A1 (en) * 2009-02-27 2011-12-01 Thomson Licensing Message passing interface (mpi) framework for increasing execution speedault detection using embedded watermarks
DE102010003521A1 (de) * 2010-03-31 2011-10-06 Robert Bosch Gmbh Modulare Struktur zur Datenverarbeitung
EP2372490A1 (en) * 2010-03-31 2011-10-05 Robert Bosch GmbH Circuit arrangement for a data processing system and method for data processing
US20120117318A1 (en) * 2010-11-05 2012-05-10 Src Computers, Inc. Heterogeneous computing system comprising a switch/network adapter port interface utilizing load-reduced dual in-line memory modules (lr-dimms) incorporating isolation memory buffers

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4811052A (en) * 1985-08-08 1989-03-07 Canon Kabushiki Kaisha Control device for control of multi-function control units in an image processing apparatus
US5113494A (en) * 1987-02-27 1992-05-12 Eastman Kodak Company High speed raster image processor particularly suited for use in an image management system
GB8823239D0 (en) * 1988-10-04 1988-11-09 Gems Of Cambridge Ltd Improved data processing
US5262965A (en) * 1988-10-31 1993-11-16 Bts-Broadcast Television Systems, Inc. System and method for high speed computer graphics image computation using a parallel connected, asynchronous multiprocessor ring coupled to a synchronous special purpose video processing ring
US5140444A (en) * 1989-10-10 1992-08-18 Unisys Corporation Image data processor
US5410649A (en) * 1989-11-17 1995-04-25 Texas Instruments Incorporated Imaging computer system and network
IL97315A (en) * 1990-02-28 1994-10-07 Hughes Aircraft Co Multi-group signal processor
US5588152A (en) * 1990-11-13 1996-12-24 International Business Machines Corporation Advanced parallel processor including advanced support hardware
JPH04293151A (ja) * 1991-03-20 1992-10-16 Fujitsu Ltd 並列データ処理方式

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