DE69610548T2 - Multi-media-prozessorarchitektur mit hoher leistungsdichte - Google Patents

Multi-media-prozessorarchitektur mit hoher leistungsdichte

Info

Publication number
DE69610548T2
DE69610548T2 DE69610548T DE69610548T DE69610548T2 DE 69610548 T2 DE69610548 T2 DE 69610548T2 DE 69610548 T DE69610548 T DE 69610548T DE 69610548 T DE69610548 T DE 69610548T DE 69610548 T2 DE69610548 T2 DE 69610548T2
Authority
DE
Germany
Prior art keywords
processors
processor
task
video
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69610548T
Other languages
German (de)
English (en)
Other versions
DE69610548D1 (de
Inventor
Anthonius De Lange
Hendrik De With
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Entropic Communications LLC
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of DE69610548D1 publication Critical patent/DE69610548D1/de
Application granted granted Critical
Publication of DE69610548T2 publication Critical patent/DE69610548T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Image Processing (AREA)
  • Multi Processors (AREA)
DE69610548T 1995-07-21 1996-07-12 Multi-media-prozessorarchitektur mit hoher leistungsdichte Expired - Lifetime DE69610548T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP95202008 1995-07-21
EP95203031 1995-11-08
PCT/IB1996/000683 WO1997004401A2 (en) 1995-07-21 1996-07-12 Multi-media processor architecture with high performance-density

Publications (2)

Publication Number Publication Date
DE69610548D1 DE69610548D1 (de) 2000-11-09
DE69610548T2 true DE69610548T2 (de) 2001-06-07

Family

ID=26139512

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69610548T Expired - Lifetime DE69610548T2 (de) 1995-07-21 1996-07-12 Multi-media-prozessorarchitektur mit hoher leistungsdichte

Country Status (5)

Country Link
US (1) US5959689A (enExample)
EP (1) EP0789882B1 (enExample)
JP (1) JPH10506492A (enExample)
DE (1) DE69610548T2 (enExample)
WO (1) WO1997004401A2 (enExample)

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US7006101B1 (en) 2001-06-08 2006-02-28 Nvidia Corporation Graphics API with branching capabilities
US7162716B2 (en) 2001-06-08 2007-01-09 Nvidia Corporation Software emulator for optimizing application-programmable vertex processing
US7456838B1 (en) 2001-06-08 2008-11-25 Nvidia Corporation System and method for converting a vertex program to a binary format capable of being executed by a hardware graphics pipeline
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US7360076B2 (en) * 2001-06-13 2008-04-15 Itt Manufacturing Enterprises, Inc. Security association data cache and structure
US7249255B2 (en) * 2001-06-13 2007-07-24 Corrent Corporation Apparatus and method for a hash processing system using multiple hash storage areas
WO2003005225A2 (en) * 2001-07-07 2003-01-16 Koninklijke Philips Electronics N.V. Processor cluster
DE10141130C1 (de) * 2001-08-22 2003-04-03 Sci Worx Gmbh Verfahren und Vorrichtung zur Kodierung und Dekodierung von digitalen Bilddatenströmen
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KR100960413B1 (ko) * 2001-12-14 2010-05-28 엔엑스피 비 브이 데이터 처리 시스템, 통신 수단 및 데이터 처리 방법
US8284844B2 (en) 2002-04-01 2012-10-09 Broadcom Corporation Video decoding system supporting multiple standards
US7133972B2 (en) * 2002-06-07 2006-11-07 Micron Technology, Inc. Memory hub with internal cache and/or memory access prediction
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US7117316B2 (en) 2002-08-05 2006-10-03 Micron Technology, Inc. Memory hub and access method having internal row caching
US6820181B2 (en) 2002-08-29 2004-11-16 Micron Technology, Inc. Method and system for controlling memory accesses to memory modules having a memory hub architecture
US7395208B2 (en) * 2002-09-27 2008-07-01 Microsoft Corporation Integrating external voices
US7646817B2 (en) * 2003-03-28 2010-01-12 Microsoft Corporation Accelerating video decoding using a graphics processing unit
US7107415B2 (en) 2003-06-20 2006-09-12 Micron Technology, Inc. Posted write buffers and methods of posting write requests in memory modules
US7406090B2 (en) * 2003-06-30 2008-07-29 Intel Corporation Managing a buffer for media processing
US7353362B2 (en) 2003-07-25 2008-04-01 International Business Machines Corporation Multiprocessor subsystem in SoC with bridge between processor clusters interconnetion and SoC system bus
US7412588B2 (en) 2003-07-25 2008-08-12 International Business Machines Corporation Network processor system on chip with bridge coupling protocol converting multiprocessor macro core local bus to peripheral interfaces coupled system bus
US7075541B2 (en) * 2003-08-18 2006-07-11 Nvidia Corporation Adaptive load balancing in a multi-processor graphics processing system
US7120743B2 (en) 2003-10-20 2006-10-10 Micron Technology, Inc. Arbitration system and method for memory responses in a hub-based memory system
US7330992B2 (en) 2003-12-29 2008-02-12 Micron Technology, Inc. System and method for read synchronization of memory modules
ES2445333T3 (es) * 2004-01-08 2014-03-03 Entropic Communications, Inc. Distribución de vectores candidatos basada en complejidad de movimiento local
EP2207103A1 (en) 2004-04-01 2010-07-14 Panasonic Corporation Integrated circuit for video/audio processing
US8704837B2 (en) 2004-04-16 2014-04-22 Apple Inc. High-level program interface for graphics operations
US8134561B2 (en) 2004-04-16 2012-03-13 Apple Inc. System for optimizing graphics operations
US7162567B2 (en) 2004-05-14 2007-01-09 Micron Technology, Inc. Memory hub and method for memory sequencing
US7519788B2 (en) 2004-06-04 2009-04-14 Micron Technology, Inc. System and method for an asynchronous data buffer having buffer write and read pointers
US7765250B2 (en) 2004-11-15 2010-07-27 Renesas Technology Corp. Data processor with internal memory structure for processing stream data
US8279886B2 (en) 2004-12-30 2012-10-02 Intel Corporation Dataport and methods thereof
EP1894094A1 (en) * 2005-06-03 2008-03-05 Nxp B.V. Data processing system and method for scheduling the use of at least one exclusive resource
TW200734878A (en) * 2006-03-06 2007-09-16 Realtek Semiconductor Corp Data access apparatus with multiple buses and method thereof
US8218091B2 (en) 2006-04-18 2012-07-10 Marvell World Trade Ltd. Shared memory multi video channel display apparatus and methods
US8264610B2 (en) 2006-04-18 2012-09-11 Marvell World Trade Ltd. Shared memory multi video channel display apparatus and methods
US8284322B2 (en) 2006-04-18 2012-10-09 Marvell World Trade Ltd. Shared memory multi video channel display apparatus and methods
US7685409B2 (en) * 2007-02-21 2010-03-23 Qualcomm Incorporated On-demand multi-thread multimedia processor
WO2008139274A1 (en) * 2007-05-10 2008-11-20 Freescale Semiconductor, Inc. Video processing system, integrated circuit, system for displaying video, system for generating video, method for configuring a video processing system, and computer program product
WO2009145608A1 (en) * 2008-05-27 2009-12-03 Eonic B.V. Flexible architecture data processing unit
US20110293022A1 (en) * 2009-02-27 2011-12-01 Thomson Licensing Message passing interface (mpi) framework for increasing execution speedault detection using embedded watermarks
DE102010003521A1 (de) * 2010-03-31 2011-10-06 Robert Bosch Gmbh Modulare Struktur zur Datenverarbeitung
EP2372490A1 (en) * 2010-03-31 2011-10-05 Robert Bosch GmbH Circuit arrangement for a data processing system and method for data processing
US20120117318A1 (en) * 2010-11-05 2012-05-10 Src Computers, Inc. Heterogeneous computing system comprising a switch/network adapter port interface utilizing load-reduced dual in-line memory modules (lr-dimms) incorporating isolation memory buffers

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JPH04293151A (ja) * 1991-03-20 1992-10-16 Fujitsu Ltd 並列データ処理方式

Also Published As

Publication number Publication date
WO1997004401A3 (en) 1997-03-20
US5959689A (en) 1999-09-28
EP0789882B1 (en) 2000-10-04
DE69610548D1 (de) 2000-11-09
JPH10506492A (ja) 1998-06-23
WO1997004401A2 (en) 1997-02-06
EP0789882A2 (en) 1997-08-20

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Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN

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Owner name: NXP B.V., EINDHOVEN, NL

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Owner name: TRIDENT MICROSYSTEMS (FAR EAST) LTD., GRAND CA, KY

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