JPH1040122A - Computer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten a process time which assures the correctness of data. SOLUTION: A check sum is generated from write data written to a disk drive 3 from source data 12, the same data read out of the disk drive 3 or read data as read source data 12 from the disk drive 3, and the same data read out of the disk drive 3 thereafter. The data length of the data is divided to less than the buffer size of the disk drive 3 and check sum means 23 and 24 compare check sums generated from the same write data or the same read data to assure the correctness of the data.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a computer for connecting a disk device having no parity check function and controlling the disk device. Connected to a computer such as a personal computer via an interface,
A disk device having no function of performing a parity check on a data line in an interface cannot detect a transient data error. For this reason, in an information processing apparatus requiring high reliability, in order to guarantee the normality of the written data and the read data, the same data as the written data is read, compared, and read. Then, the same data as the read data was read out and compared, and these comparisons were performed for all data, thereby detecting transient data abnormalities. In this case, since it takes time to compare all data, the disk performance has deteriorated. It is desired to solve such a problem.

[0002]

2. Description of the Related Art As an information processing apparatus using a conventional disk device, there is, for example, one shown in FIGS. 21 and 22, reference numeral 101 denotes a computer such as a personal computer.
1 includes a disk device 10 via an interface 102.
3 are connected. A parity check function for performing a parity check is not provided between the interface 102 and the disk device 103.

A buffer 104 is provided in a disk device 103.
And the disk 105 are provided, and the data transferred from the computer 101 is temporarily stored in the buffer 104 and then written to the disk 105. Also, the disk 105
Is written to the computer 101 after being read from the disk 105 and temporarily stored in the buffer 104.

The computer 101 has a RAM 106 and a ROM
Alternatively, a program 107 for ensuring the validity of data stored in the RAM, a local bus 108, a disk control unit 109, and a CPU for controlling each of them
110 are provided. FIG. 21 is an explanatory diagram for explaining the guarantee of the validity of the write data. In FIG. 21, the source data 111 in the RAM 106 is the CPU 1
10 according to the program 107,
The data is temporarily stored in the buffer 104 of the disk device 103 through the interface 102 via the local bus 108 and the disk control unit 109 and then written to the disk 105.

After that, the same data written on the disk 105 is read from the disk 105, passed through the interface 102 and the disk control unit 109, passed through the local bus 108 and stored in the ROM 106 as read data 112. Then, the source data 1 of the RAM 106
11 is compared with the read data 112 by the program 107. By this comparison, it is possible to detect a data error of the interface 102 and a write failure of the disk 105.

FIG. 22 is an explanatory diagram for explaining the guarantee of validity of read data. In FIG. 22, data written to the disk 105 of the disk device 103 is read from the disk 105, temporarily stored in the buffer 104, passes through the interface 102, the disk control unit 109, passes through the local bus 108, and is stored in the RAM 1
06 is stored as the source data 111.

Thereafter, the same data temporarily read from the disk 105 and temporarily stored in the buffer 104 passes through the interface 102 and the disk control unit 109, passes through the local bus 108, and is transferred to the RAM 106 via the read data 1.
12 is stored. The source data 111 stored in the RAM 106 and the read data 112 stored in the RAM 106 are stored in the program 10 by the CPU 110.
7 are compared. By this comparison, a data error of the interface 102 and a reading failure of the disk 105 can be detected.

[0008]

However, in such an information processing apparatus using a conventional disk device, since the data is transferred to the memory and all the data are compared, the validity of the data is guaranteed. Therefore, there is a problem that the processing time becomes long. The present invention has been made in view of such conventional problems, and has as its object to provide a computer having a disk control unit that can shorten processing time and guarantee data validity. I do.

[0009]

In order to achieve this object, the present invention is configured as shown in FIG. When a disk device 3 having no parity check function is connected, data is written to the disk device 3, and data is read, checksum generation means 23 and 24 provided in the computer 1 use
A checksum is generated from the write data written to the disk device 3 from the source data 12 and the same data read from the disk device 3 or the read data read from the disk device 3 as the source data 12 and the same data read from the disk device 3 thereafter, The dividing unit 11A divides the data length of the data into the buffer size of the disk device 3 or less, and the comparing unit 14 compares the checksums generated from the same write data or the same read data by the checksum generating units 23 and 24. I do.

When data is read from the disk device 3, a read buffer command to be read from the buffer 5 of the disk device 3 is set by the read buffer command setting means 11B, and data is always read from the buffer 5. The type determining unit 11C determines the type of data to be written to the disk device 3 or the type of data read from the disk device 3, and if the type determined by the type determining unit 11C is a predetermined type, the checksum setting unit 11D
Is set so that checksum generation is not performed.

According to such a computer of the present invention, there is no need to transfer data to the memory and compare all data, and only a single comparison of the checksum is required. Can be shortened. When the buffer read command is used or when the checksum is not performed by the data type discriminating means, the processing time for ensuring the validity of the data can be further reduced.

[0012]

FIG. 2 is a block diagram showing a first embodiment of the present invention. In FIG. 2, reference numeral 1 denotes a computer comprising a personal computer or the like, and a disk device 3 is connected to the computer 1 via an interface 2. The disk device 3 does not have a parity check function for performing a parity check with the interface 2. Computer 1, interface 2, and disk device 3
Constitute an information processing device 4 using the disk device 3. A buffer 5 is provided in the disk device 3, and data transferred from the computer 1 via the interface 2 is temporarily stored in the buffer 5. The data temporarily stored in the buffer 5 is written to the disk 6. The data written on the disk 6 is read from the disk 6 and temporarily stored in the buffer 5.

The computer 4 includes a RAM 7, a RAM 8, a local bus 9, a disk control unit 10, and a CPU 11. The RAM 7 stores source data 12 of write data and read data. The RAM 8 stores a program 13 for guaranteeing write data and read data. The program 13 includes a comparison circuit 1 as comparison means for comparing data generated by a checksum generation unit described later.
4 are provided. The RAM 8 has a comparison circuit 14.
Memory storage area 15 for storing data to be compared by
Is provided. The program 13 is not limited to the RAM 8 and may be provided in a ROM (not shown). The program 13 is executed by the CPU 11.

The disk control unit 10 includes a first register 16 to a sixth register 21, a buffer 22, and checksum generators 23 and 24 as a checksum generator.
Are provided respectively. The first register 16 has C
The PU 11 sets write or read parameters. In this case, no DMA transfer can be designated. The data length is set in the second register 17 by the CPU 11. For example, the minimum data length is 51
2 bytes, up to 128 kilobytes. By setting this data length, data can be divided. In the third register 18, a parameter as to whether or not to perform a checksum is set by the CPU 11. In this case, whether to perform a checksum can be designated depending on the type of data. The fourth register 19 has a CPU
11, a parameter for clearing the checksum is set. In the fifth register 20, a parameter for starting DMA by the CPU 11 is set. The sixth register 21 stores the D
A parameter indicating that the MA has ended is set.
The buffer 22 temporarily stores data when data is transferred between the RAM 7 and the disk control unit 10 by DMA. The checksum generator 23 as a checksum generator generates a checksum from data to be written or data to be read, and temporarily stores the checksum.

Another checksum generator 24 as a checksum generator generates a checksum from the same data as the write data or the same data as the read data, and temporarily stores the checksum. Although two checksum generators 23 and 24 are provided here, one checksum generator may be provided. The checksums generated by the checksum generators 23 and 24 are read out and compared by the comparison circuit 14.
A comparison circuit is provided therein, and checksum generators 23 and 24 are provided.
Alternatively, the checksums generated in the above steps may be compared.
The comparison circuit 14 compares the checksum from the checksum generator 23 with the checksum from the checksum generator 24. In this comparison, the data of the set data length is D.
At the end of the MA, it is held in the memory storage area 15 and then performed. Therefore, the checksum comparison is one time.

FIG. 3 is a diagram showing an example of the configuration of the checksum generators 23 and 24. In FIG. 3, checksum generators 23 and 24 store an adder 26 that adds, for example, 16-bit data input from bus 25, an output of adder 26, and outputs the data stored in adder 26. And a register 27 for outputting.

For example, when data of “1” is input to the adder 26 after both the adder 26 and the register 27 are cleared, the adder 26 performs addition of “0 + 1” and then “1” from the adder 26. Is output to the register 27,
“1” is stored in the register 27 and “1” is output to the adder 26. Next, for example, when data of “3” is input to the adder 26, the adder 26 performs addition of “1 + 3” and outputs the added value “4” to the register 27. The register 27 stores “4” and adds “4” to the adder 2
6 is output. If the added value exceeds 16 bits in the register 27, an overflow occurs, and a 16-bit checksum remains in the register 27.

FIG. 4 is an explanatory diagram for explaining the guarantee of the validity of the write data. In FIG. 4, the source data 12 stored in the RAM 7 is temporarily stored in the buffer 5 of the disk device 3 through the local bus 9 and the disk control unit 10 and the interface 2 via the disk control unit 10, and then stored in the disk 6
Is written to. A checksum generation unit 23 of the disk control unit 10 generates a checksum from the written source data 12, and temporarily stores the checksum. The same data written on the disk 6 is read from the disk 6,
After being temporarily stored in the buffer 5, the checksum is generated by the checksum generator 24 of the disk controller 10 via the interface 2, and is temporarily stored. The read data is deleted by the disk control unit 10 and is not transferred to the RAM 7.

The checksum generated by the checksum generator 23 and the checksum generated by the checksum generator 24 are read and compared according to the program 13. By this comparison, a data error of the interface 2 and a write failure of the disk 6 are detected. RAM7
Since there is no need to transfer data to the computer and the generated checksum needs to be compared only once, the processing time for maintaining the validity of the data can be significantly reduced.

FIG. 5 is a flowchart for explaining the guarantee of the validity of data writing. In FIG. 5, first,
In step S1, the first register 1 of the disk control unit 10
The CPU 11 sets a write parameter to 6. In this case, the presence of DMA transfer is specified. Also, the second
For example, a maximum data length of, for example, 128 kilobytes is set in the register 17 by the CPU 11. Also, CP
A parameter for performing a checksum is set in the third register 18 by U11.

Next, in step S2, a parameter for clearing the checksum is set in the fourth register 19 by the CPU 11, and the checksum generator 23 is cleared.
Next, in step S3, a parameter for starting DMA in the fifth register 20 is set by the CPU 11;
Start the DMA. The data is written to the disk device 3, and the checksum generator 23 generates a checksum from the written data. Next, if the parameter for detecting the end of DMA is set in the sixth register 21 in step S4, the DMA is set in step S5.
At the end, the checksum A generated by the checksum generator 23 is read to read the memory storage area 15 of the RAM 8.
To be kept.

Next, in step S6, the CPU 11 sets a read parameter in the first register 16 of the disk controller 10. At this time, it is designated that there is no DMA transfer. Next, in step S7, the CPU 11 sets a parameter for clearing the checksum in the fourth register 19, and clears the checksum generator 24. Next, at step S8, the CPU 11 registers the fifth register 2
Set a parameter to start DMA at 0
Start. Next, when the DMA end parameter is set in the sixth register 21 by the CPU 11 in step S9, the checksum B generated by the checksum generator 24 is read in step S10, and
It is stored in the memory storage area 15 of the RAM 8.

Next, in step S11, the checksum A read from the checksum generation unit 23 and the checksum B read from the checksum generation unit 24 are compared by the comparison circuit 14 by the CPU 11 according to the program 13. In step S12, checksum A and checksum B
Are the same, it is determined that the write data is normal. If A ≠ B, a data error of the interface 2 and a write failure of the disk 6 are detected in step S13.

As described above, the data transfer to the RAM 7 becomes unnecessary, and only the checksum needs to be compared once, so that the processing time for ensuring the validity of the data can be shortened. FIG. 6 is a block diagram for explaining the guarantee of read data validity. In FIG. 6, data read from the disk 6 of the disk device 3 is temporarily stored in the buffer 5 and then read as source data 12 to the RAM 7 via the local bus 9 via the interface 2 and the disk controller 10. . At this time, the checksum generator 23 provided in the disk controller 10 generates a checksum from the read data. afterwards,
The same data read from the disk 6 is stored in the buffer 5
After that, the data is read out to the disk control unit 10 via the interface 2 and the checksum generation unit 24 generates a checksum. This read data is deleted by the disk control unit 10 and is not transferred to the RAM 7.
The checksums generated by the checksum generators 23 and 24 are read and compared by the CPU 11 according to the program 13. From the comparison result, it is possible to detect a data error of the interface 2 or a reading failure of the disk 6.

A checksum is generated from the data read by the checksum generator 24 of the disk controller 10, and the data is not transferred to the RAM 7. Further, since the checksum needs to be compared only once, the processing time for ensuring the validity of the read data can be reduced. FIG. 7 is a flowchart for explaining the guarantee of the validity of data reading.

The difference between this flowchart and the flowchart of FIG. 5 is that the parameter for writing is set in step S1 in FIG. 5, whereas the parameter for reading is set in step S21 in the flowchart of FIG. . In step S21 of FIG. 7, the CPU 11 sets a read parameter in the first register 16 of the disk control unit 10. Other configurations are the same as those in FIG. Even when this data is read, the checksum generated by the checksum generation unit 23 and the checksum generated by the checksum generation unit 24 need only be compared once by the comparison circuit 14, so that the validity of the data is guaranteed. And the processing time can be shortened.

FIG. 8 is a block diagram showing a second embodiment of the present invention. The present embodiment is characterized in that the data transfer size is, for example, smaller than the buffer size of the disk device. In FIG. 8, the CPU 11 provided in the computer 1 has a function as a dividing unit 11A for dividing and setting the data length of the transfer data to be equal to or less than the buffer size of the disk device 3. When the CPU 11 sets the data length to be equal to or smaller than the buffer size, for example, 1 kilobyte, a parameter indicating that the data length is 1 kilobyte is set in the second register 17 in the disk controller 10. For this reason, when the data is read for comparison of the checksum, the data is read from the buffer 5 without reading from the disk 6 of the disk device 3. Therefore, the processing time for ensuring the validity of the data can be further reduced. In this embodiment, a data error of the interface 2 can be detected, but a write / read failure of the disk 6 cannot be detected. Other configurations are the same as those in FIG.

FIG. 9 is an explanatory diagram for explaining the guarantee of the validity of the write data. In FIG. 9, the source data 12 of the RAM 7 is temporarily stored in the buffer 5 of the disk device 3 and then written to the disk 6.
And a checksum generation unit 24 of the disk control unit 10 generates a checksum. In this case, a data error of the interface 2 can be detected, but a write failure of the disk 6 cannot be detected.
In FIG. 9, an x mark between the buffer 5 and the disk 6 indicates that data is not read from the disk 6. Other configurations are the same as those in FIG.

FIG. 10 is a flowchart for explaining the guarantee of the validity of the write data. In FIG. 10, in step S1, a parameter for writing is set in the first register 16 of the disk controller 10, and a parameter for performing a checksum is set in the third register 18,
In step S2, the parameter for clearing the checksum is set in the fourth register 19, and after clearing the checksum, the parameter for dividing the data length into the second register 17 in step S22 is equal to or smaller than the buffer size, for example, 1 kilobyte. Is set. In the present embodiment, a step S22 for dividing the data length into the buffer size or less is added. Other configurations are the same as those in FIG.

FIG. 11 is an explanatory diagram for explaining the guarantee of the validity of the read data. In FIG. 11, data read from the disk 6 of the disk device 3 is temporarily stored in the buffer 5 and then read and stored as source data 12 in the RAM 7. At the time of the second read for comparison of the checksum, the checksum is generated by the checksum generation unit 24 by reading from the buffer 5 without reading from the disk 6. In this case as well, a reading error from the disk 6 cannot be detected, but a data error in the interface 2 can be detected. FIG.
In 1, the data is not read from the disk 6 as indicated by the mark x between the buffer 5 and the disk 6, so that the processing time for ensuring the validity of the data can be reduced.

FIG. 12 is a flowchart for explaining the guarantee of the validity of the read data. In FIG. 12, in step S22, the data is divided into buffers or less, for example, 1 kilobyte. Other configurations are shown in FIG.
Is the same as FIG. 13 is a block diagram showing a third embodiment of the present invention.

This embodiment is characterized in that a read buffer command is used when reading data. In FIG. 13, the CPU 11 provided in the computer 1
Read buffer command setting means 1 for setting a read buffer command to be read from buffer 5 of disk device 3 when data is read from disk device 3
It has a function as 5B. First of the disk control unit 10
The read buffer command to be always read from the buffer 5 is set in the register 16 by the read buffer command setting means 15B of the CPU 11. Even if the data length is divided below the buffer size, data may be read from the disk 6 depending on the type of the disk 6. Therefore, the data is always read from the buffer 5 using a command to read from the buffer 5. Therefore, as shown in FIGS. 9 and 11, when data is written to the disk 6 and then read, the data is not read from the disk 6 but must be read from the buffer 5 to compare the checksum, as indicated by the mark x. Do. Therefore, the processing time for ensuring the validity of the data can be further reduced. In this embodiment as well, a data error of the interface 2 can be detected, but a write / read failure of the disk 6 cannot be detected.

FIG. 14 is a flowchart for explaining the guarantee of the validity of the write data. In FIG. 14, a buffer read parameter is set in the first register 16 of the disk controller 10 in step S23. Other configurations are the same as those in FIG. When reading data from the disk 6, the read buffer command is always used, so that the processing time for ensuring the validity of the data can be further reduced. FIG. 15 is a flowchart for explaining the guarantee of the validity of the read data.

In FIG. 15, a buffer read parameter is set in the first register 16 of the disk controller 10 in step S23. Other configurations are the same as those in FIG. Also in the case of data reading, the second reading uses the read buffer command to reliably read the data from the buffer 6, so that the processing time for ensuring the validity of the data can be further reduced.

FIG. 16 is a block diagram showing a fourth embodiment of the present invention. This embodiment is characterized in that the type of data is determined and a checksum is performed. In FIG. 16, the CPU 11 provided in the computer 1
It has a function as type determination means 15C for determining the type of data to be written to the disk or data to be read from the disk device 3. When the data is image data, the CPU 11 sets a parameter for not performing a checksum in the third register 18 of the disk controller 10, and when the data is general data, sets a parameter for performing a checksum. It has a function as a checksum setting unit 15D. When the data is image data, the checksum is not compared because there is no practical problem even if the data is slightly damaged. If the data is general data, a checksum is generated and comparison is performed.

Therefore, the processing time for ensuring the validity of data can be further reduced. In this embodiment as well, a data error of the interface 2 can be detected, but a write / read failure of the disk 6 cannot be detected. Other configurations are shown in FIG.
It is similar to 3. FIG. 17 is an explanatory diagram for explaining the guarantee of the validity of the write data.

In FIG. 17, when the source data 12 in the RAM 7 is transferred to the disk device 3, when the DMA is completed, the type of the data is determined. And, on the other hand,
No check is performed for image data. The other configuration is the same as that of FIG. FIG. 18 is a flowchart for explaining the guarantee of the validity of the write data.

In FIG. 18, at step S24, the DMA
Is completed, the data type determining means 15C of the CPU 11
, The checksum is performed if the data is general data, and if the data is image data, the process proceeds to step S12, where the checksum is not performed and the process is properly terminated. Other configurations are the same as those in FIG. In the case of image data, even if it is slightly broken, it does not cause a problem in practical use, so that no check is performed. Therefore, the processing time for ensuring the validity of the data can be further reduced. In this embodiment, a data error of the interface 2 can be detected, but a write failure of the disk 6 cannot be detected.

FIG. 19 is an explanatory diagram for explaining the guarantee of the validity of the read data. In FIG. 19, also in the case of reading, the type of transfer data is determined. For general data, a checksum is performed, and for image data, no checksum is performed. Note that the general data is divided into the buffer size or less, and is read out from the buffer 6 using the read buffer command at the time of the second read.

FIG. 20 is a flowchart for explaining the guarantee of the validity of the read data. In FIG. 20, when the DMA is completed in step S24, the type of data is determined, and if the data is general data, a checksum is performed.
In the case of image data, the checksum is not performed and the process is properly terminated. Other configurations are the same as those in FIG. In the case of image data, a checksum is not performed because a slight break does not pose a practical problem. Therefore, the processing time for ensuring the validity of the data can be further reduced. In this embodiment, a data error of the interface 2 can be detected, but a read failure of the disk 6 cannot be detected.

[Detailed Description of the Invention] As described above, according to the present invention, the transfer of data to the memory and the comparison of all data become defective, and only the checksum needs to be compared once. Processing time for ensuring the validity of data can be reduced. Also,
The processing time can be further reduced when the data length is divided below the buffer size, when the buffer read command is used, or when the checksum is not performed depending on the data type.

[Brief description of the drawings]

FIG. 1 is a principle diagram of the present invention.

FIG. 2 is a block diagram showing a first embodiment of the present invention.

FIG. 3 is a diagram illustrating a configuration example of a checksum generation unit;

FIG. 4 is an explanatory diagram for explaining guarantee of validity of write data;

FIG. 5 is a flowchart for explaining guarantee of validity of write data;

FIG. 6 is an explanatory diagram for explaining guarantee of validity of read data;

FIG. 7 is a flowchart illustrating guarantee of read data validity;

FIG. 8 is a block diagram showing a second embodiment of the present invention.

FIG. 9 is an explanatory diagram for explaining guarantee of validity of write data;

FIG. 10 is a flowchart illustrating guaranteeing the validity of write data;

FIG. 11 is an explanatory diagram for explaining guarantee of validity of read data;

FIG. 12 is a flowchart illustrating guarantee of read data validity;

FIG. 13 is a block diagram showing a third embodiment of the present invention.

FIG. 14 is a flowchart illustrating guaranteeing the validity of write data;

FIG. 15 is a flowchart illustrating guarantee of read data validity;

FIG. 16 is a block diagram showing a fourth embodiment of the present invention.

FIG. 17 is an explanatory diagram for explaining guarantee of validity of write data;

FIG. 18 is a flowchart for explaining the guarantee of validity of write data;

FIG. 19 is an explanatory diagram for explaining guarantee of validity of read data;

FIG. 20 is a flowchart illustrating guarantee of read data validity;

FIG. 21 is an explanatory diagram for explaining the conventional guarantee of the validity of write data;

FIG. 22 is an explanatory diagram for explaining the conventional guarantee of read data validity;

[Explanation of symbols]

1: Computer 2: Interface 3: Disk device 4: Information processing device 5, 22: Buffer 6: Disk 7, 8: RAM 9: Local bus 10: Disk controller 11: CPU 11A: Dividing means 11B: Read buffer command setting Means 11C: Type determination means 11D: Checksum setting means 12: Source data 13: Program 14: Comparison circuit (comparison means) 15: Memory storage area 16: First register 17: Second register 18: Third register 19: Fourth register 20: Fifth register 21: Sixth register 23, 24: Checksum generator (checksum generator) 25: Bus 26: Adder 27: Register

Claims (3)

[Claims] A computer connected to a disk device having no parity check function, writes data to the disk device, and reads the data, wherein the same write data to be written from the source data to the disk device and the same data to be read from the disk device. Checksum generating means for generating a checksum from data or read data as read source data from the disk device and the same data subsequently read from the disk device; dividing a data length of the data into a buffer size of the disk device or less; And a comparing means for comparing checksums generated from the same write data or the same read data by the checksum generating means. 2. The computer according to claim 1, further comprising: a read buffer command setting means for setting a read buffer command to be read from a buffer of said disk device when data is read from said disk device. calculator. 3. A computer according to claim 1, wherein said type discriminating means discriminates a type of data to be written to said disk device or a data read from said disc device, and a result determined by said type discriminating device is a predetermined value. And a checksum setting means for setting so as not to generate and compare the checksum when the type is.