JPH10335767A - Circuit substrate - Google Patents

Circuit substrate

Info

Publication number
JPH10335767A
JPH10335767A JP9141752A JP14175297A JPH10335767A JP H10335767 A JPH10335767 A JP H10335767A JP 9141752 A JP9141752 A JP 9141752A JP 14175297 A JP14175297 A JP 14175297A JP H10335767 A JPH10335767 A JP H10335767A
Authority
JP
Japan
Prior art keywords
conductor
circuit
thickness
sub
circuit conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9141752A
Other languages
Japanese (ja)
Inventor
Tetsuo Hirakawa
哲生 平川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP9141752A priority Critical patent/JPH10335767A/en
Publication of JPH10335767A publication Critical patent/JPH10335767A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structure Of Printed Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a circuit substrate having high reliability which does not need an excessive thickness of the entire circuit substrate than required and does not cause cracks in an insulation base if the thickness of a circuit conductor comprising a copper plate is increased corresponding to a large power. SOLUTION: In a circuit substrate in which a circuit conductor 2 comprising a copper plate is brazed on an insulation base 1 composed of ceramics, the insulation base 1 and the circuit conductor 2 are brazed interposing a sub- conductor 4 composed of a metal having a yield force 25 MPa or less at 20 deg.C and volumetric resistivity 1.7 μΩxcm or less therebetween. Since a thermal stress between the insulation base 1 and the circuit conductor 2 is efficiently absorbed and mitigated by the sub-conductor 4, no cracks occur in the insulation base at the time of brazing and using, and as a current efficiently flows even in the sub-conductor 4, the thickness of the entire circuit substrate can be suppressed.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電気自動車のパワ
ーモジュール等で使用される大電力を取り扱う半導体素
子を搭載するための回路基板に関し、より詳細にはセラ
ミックスから成る絶縁基板に銅板から成る厚い回路導体
をろう付けして成る回路基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board for mounting a high power semiconductor element used in a power module of an electric vehicle or the like, and more particularly, to a thick insulating board made of a copper plate on an insulating board made of ceramics. The present invention relates to a circuit board formed by brazing circuit conductors.

【0002】[0002]

【従来の技術】電気自動車等の大電力を駆動源とする機
器では、その駆動のための電力をコントロールするパワ
ーモジュールにおいて大電力を取り扱う必要がある。
2. Description of the Related Art In a device such as an electric vehicle which uses a large amount of power as a driving source, it is necessary to handle a large amount of power in a power module for controlling the driving power.

【0003】このようなパワーモジュールに使用される
回路基板は、例えば、酸化アルミニウム質焼結体等のセ
ラミックスから成る絶縁基体の表面にタングステン・モ
リブデン等のメタライズ金属層を被着させるとともに、
このメタライズ金属層に銅板から成る回路導体を銀ろう
等のろう材を介して接合した構造をしている。
A circuit board used in such a power module has a metallized metal layer such as tungsten and molybdenum on a surface of an insulating base made of ceramics such as an aluminum oxide sintered body.
A circuit conductor made of a copper plate is joined to this metallized metal layer via a brazing material such as silver brazing.

【0004】このような回路基板は、絶縁基体を構成す
る酸化アルミニウム質焼結体等のセラミックスが電気絶
縁性や耐熱性に優れ、また回路導体を構成する銅板が安
価かつ体積抵抗率が1.7 μΩ・cm(20℃)と低く導電
性に優れており、さらに銀ろう等のろう材が高温での接
合信頼性に優れているのでパワーモジュール用として好
適である。
In such a circuit board, ceramics such as an aluminum oxide sintered body constituting an insulating base are excellent in electrical insulation and heat resistance, and a copper plate constituting a circuit conductor is inexpensive and has a volume resistivity of 1.7 μΩ. -Low in cm (20 ° C) and excellent in conductivity, and furthermore, brazing material such as silver brazing is suitable for power modules because it has excellent bonding reliability at high temperatures.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、この従
来の回路基板では、取り扱う電力が大きなものとなる程
銅板から成る回路導体の厚みを厚いものとする必要があ
り、そのため例えば銅板から成る回路導体の厚みを1m
m以上とすると、セラミックスから成る絶縁基体に被着
させたメタライズ金属層に銅板から成る回路導体をろう
付けする際に絶縁基体と回路導体との熱膨張係数の相違
によって両者の間に大きな熱応力が発生するとともにこ
の熱応力が絶縁基体に大きく印加され、その結果、絶縁
基体にクラックが発生してしまうという欠点を誘発す
る。
However, in this conventional circuit board, it is necessary to increase the thickness of the circuit conductor made of a copper plate as the power to be handled becomes larger. 1m thick
m or more, when a circuit conductor made of a copper plate is brazed to a metallized metal layer adhered to an insulating base made of ceramics, a large thermal stress occurs between the insulating base and the circuit conductor due to a difference in thermal expansion coefficient between the two. When this occurs, this thermal stress is greatly applied to the insulating substrate, and as a result, a defect is induced in that the insulating substrate is cracked.

【0006】また、銅板から成る回路導体の厚みを厚い
ものとする程、回路導体を含む回路基板全体の厚みが大
きくなり、モジュールの薄型化の要求に応えることがで
きなくなってしまうので、回路導体を含む回路基板全体
の厚みを可能な限り抑えなければならないという課題も
有していた。
Further, as the thickness of the circuit conductor formed of a copper plate is increased, the thickness of the entire circuit board including the circuit conductor is increased, and it becomes impossible to meet the demand for a thin module. There is also a problem that the thickness of the entire circuit board including the above must be reduced as much as possible.

【0007】本発明は上記欠点を解決すべく案出された
ものであり、その目的は、回路基板全体の厚みを不要に
厚くすることなく、また大電力に対応して銅板から成る
回路導体の厚みを厚いものとしても絶縁基体にクラック
が発生することがない高信頼性の回路基板を提供するこ
とにある。
SUMMARY OF THE INVENTION The present invention has been devised to solve the above-mentioned drawbacks, and has as its object to reduce the thickness of the circuit conductor made of a copper plate without unnecessarily increasing the thickness of the entire circuit board and corresponding to high power. It is an object of the present invention to provide a highly reliable circuit board that does not cause cracks in an insulating base even if the thickness is large.

【0008】[0008]

【課題を解決するための手段】本発明の回路基板は、セ
ラミックスから成る絶縁基体に銅板から成る回路導体を
ろう付けして成る回路基板において、前記絶縁基体と前
記回路導体とは、20℃における降伏応力が25MPa以下
で、かつ体積抵抗率が1.7 μΩ・cm以下の金属から成
る副導体を挟んでろう付けされていることを特徴とする
ものである。
A circuit board according to the present invention is a circuit board obtained by brazing a circuit conductor made of a copper plate to an insulating base made of ceramic, wherein the insulating base and the circuit conductor are maintained at 20 ° C. It is characterized in that it is brazed with a sub-conductor made of a metal having a yield stress of 25 MPa or less and a volume resistivity of 1.7 μΩ · cm or less.

【0009】また本発明の回路基板は、上記構成におい
て、前記回路導体の厚みが1mm以上であり、前記副導
体の厚みが0.2 乃至1mmであることを特徴とするもの
である。
Further, in the circuit board according to the present invention, the thickness of the circuit conductor is 1 mm or more and the thickness of the sub-conductor is 0.2 to 1 mm.

【0010】本発明の回路基板によれば、セラミックス
から成る絶縁基体と銅板から成る回路導体とが間に20℃
における降伏応力が25MPa以下で、かつ体積抵抗率が
1.7μΩ・cm以下の金属から成る副導体を挟んでろう
付けされていることから、銅板から成る回路導体をセラ
ミックスから成る絶縁基体にろう付けする際あるいは回
路基板をパワーモジュール等において使用する際に絶縁
基体と回路導体との間に両者の熱膨張係数の相違に起因
して熱応力が発生しても、この熱応力は副導体によって
良好に吸収され、その結果、絶縁基体に大きな熱応力が
印加されることはなく、クラックが発生することはな
い。
According to the circuit board of the present invention, the insulating base made of ceramics and the circuit conductor made of copper plate have a temperature of 20 ° C.
Is less than 25MPa and the volume resistivity is
Since it is brazed with a sub-conductor made of a metal of 1.7μΩcm or less, when brazing a circuit conductor made of a copper plate to an insulating base made of ceramics or when using a circuit board in a power module, etc. Even if a thermal stress is generated between the insulating base and the circuit conductor due to a difference in thermal expansion coefficient between the two, the thermal stress is well absorbed by the sub-conductor, and as a result, a large thermal stress is applied to the insulating base. No voltage is applied and no cracks occur.

【0011】また、回路導体に大電力に応じて大電流を
流す際、副導体にも回路導体と同様に良好に電流が流れ
るため、その分銅板から成る回路導体の厚みを薄いもの
とすることができる。
In addition, when a large current is applied to the circuit conductor according to a large power, the current flows to the sub-conductor as well as the circuit conductor. Therefore, the thickness of the circuit conductor made of the weight plate is reduced. Can be.

【0012】[0012]

【発明の実施の形態】次に、本発明の回路基板を添付の
図面に基づいて説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a circuit board according to the present invention will be described with reference to the accompanying drawings.

【0013】図1は本発明の回路基板の実施の形態の一
例を示す断面図であり、1は絶縁基体、2は回路導体で
ある。
FIG. 1 is a sectional view showing an embodiment of a circuit board according to the present invention, wherein 1 is an insulating base, and 2 is a circuit conductor.

【0014】絶縁基体1は、酸化アルミニウム質焼結体
・窒化アルミニウム質焼結体・炭化珪素質焼結体・窒化
珪素質焼結体等のセラミックスから成り、例えば酸化ア
ルミニウム焼結体から成る場合、酸化アルミニウム粉末
・酸化珪素粉末・酸化カルシウム粉末・酸化マグネシウ
ム粉末等から成るセラミックス原料粉末に適当な有機バ
インダ・溶剤を添加混合して泥漿状となすとともにこれ
を従来周知のドクターブレード法を採用してシート状と
なすことによってセラミックグリーンシートを得、しか
る後、このセラミックグリーンシートに適当な打ち抜き
加工や切断加工を施して所定形状とし、約1600℃の温度
で焼成することによって製作される。
The insulating substrate 1 is made of a ceramic such as an aluminum oxide sintered body, an aluminum nitride sintered body, a silicon carbide sintered body, a silicon nitride sintered body. A ceramic powder consisting of aluminum oxide powder, silicon oxide powder, calcium oxide powder, magnesium oxide powder, etc., is mixed with an appropriate organic binder and solvent to form a slurry, which is formed using a well-known doctor blade method. Then, a ceramic green sheet is obtained by forming the sheet into a sheet shape. Thereafter, the ceramic green sheet is subjected to a suitable punching process or cutting process to obtain a predetermined shape, followed by firing at a temperature of about 1600 ° C.

【0015】また絶縁基体1は、その表面にタングステ
ンやモリブデン等の高融点金属粉末焼結体から成るメタ
ライズ金属層3が所定のパターンに被着形成されてお
り、このメタライズ金属層3上に、絶縁基体1との間に
20℃における降伏応力が25MPa以下でかつ体積抵抗率
が1.7 μΩ・cm以下の金属から成る副導体4を挟ん
で、銅板から成る回路導体2が銀ろう等のろう材5を介
してろう付けされている。
On the surface of the insulating substrate 1, a metallized metal layer 3 made of a sintered body of a refractory metal such as tungsten or molybdenum is formed in a predetermined pattern. Between the insulating substrate 1
A circuit conductor 2 made of a copper plate is brazed via a brazing material 5 such as a silver braze with a subconductor 4 made of a metal having a yield stress at 20 ° C. of 25 MPa or less and a volume resistivity of 1.7 μΩ · cm or less interposed therebetween. ing.

【0016】絶縁基体1の表面に被着されたメタライズ
金属層3は、絶縁基体1に回路導体2をろう付けするた
めの下地金属として作用し、例えばタングステンから成
る場合、タングステン粉末に適当な有機バインダ・溶剤
を添加混合して得た金属ペーストを絶縁基体1となるセ
ラミックグリーンシートに従来周知のスクリーン印刷法
によって所定パターンに印刷塗布し、これを絶縁基体1
となるセラミックグリーンシートとともに焼成すること
によって絶縁基体1の表面に被着される。
The metallized metal layer 3 applied to the surface of the insulating base 1 acts as a base metal for brazing the circuit conductor 2 to the insulating base 1. A metal paste obtained by adding and mixing a binder and a solvent is printed and applied in a predetermined pattern on a ceramic green sheet serving as the insulating substrate 1 by a conventionally known screen printing method.
It is adhered to the surface of the insulating base 1 by firing together with the ceramic green sheet to be formed.

【0017】なお、メタライズ金属層3は、その表面に
ニッケル等のろう材との濡れ性に優れる金属をめっき法
により0.1 〜10μm程度の厚みに鍍着させておくと、メ
タライズ金属層3と回路導体2とを銀板または金板から
成る副導体4を挟んで銀ろう等のろう材5を介して容易
かつ強固にろう付けすることができる。従って、メタラ
イズ金属層3はその表面にニッケル等のろう材との濡れ
性に優れる金属をめっき法により0.1 〜10μm程度の厚
みに鍍着させておくことが好ましい。
If the metallized metal layer 3 is plated on the surface thereof with a metal having excellent wettability with a brazing material such as nickel to a thickness of about 0.1 to 10 μm by plating, the metallized metal layer 3 and the circuit The conductor 2 can be easily and firmly brazed through the brazing material 5 such as silver brazing with the sub-conductor 4 made of a silver plate or a gold plate interposed therebetween. Accordingly, the metallized metal layer 3 is preferably plated with a metal having excellent wettability with a brazing material such as nickel on the surface thereof to a thickness of about 0.1 to 10 μm by a plating method.

【0018】メタライズ金属層3に絶縁基体1との間に
副導体4を挟んでろう付けされた回路導体2は、厚みが
1〜2mm程度の銅板から成り、大電流が流れる主導体
として作用し、この回路導体3には例えば半導体素子の
電極が直径0.5 mm程度の大径のボンディングワイヤ多
数本を介して接続される。
The circuit conductor 2 brazed to the metallized metal layer 3 with the sub-conductor 4 interposed between the metallized metal layer 3 and the insulating base 1 is made of a copper plate having a thickness of about 1 to 2 mm and acts as a main conductor through which a large current flows. For example, electrodes of a semiconductor element are connected to the circuit conductor 3 via a large number of large-diameter bonding wires having a diameter of about 0.5 mm.

【0019】回路導体2は、20℃における体積抵抗率が
1.7 μΩ・cmと良導電性の銅板から成り、かつ厚みが
1mm以上と厚いことから回路導体2に大電流を流して
大きな電力に対応することができ、例えば厚みを2mm
程度・幅を25mm程度とすると200 アンペア程度の大電
流まで流すことができる。
The circuit conductor 2 has a volume resistivity at 20 ° C.
Since it is made of a highly conductive copper plate having a thickness of 1.7 μΩ · cm and has a thickness of 1 mm or more, a large current can be applied to the circuit conductor 2 to cope with a large power.
If the width and width are about 25 mm, a large current of about 200 amperes can flow.

【0020】なお、メタライズ金属層3に銅板から成る
回路導体2を、間に副導体4を挟んでろう付けするに
は、メタライズ金属層2上に副導体4と銅板から成る回
路導体2とをそれぞれの間に例えば銀−銅共晶合金から
成る箔状のろう材を挟んで順次載置して、間に挟まれた
ろう材を加熱溶融してろう付けする方法が採用される。
In order to braze the circuit conductor 2 made of a copper plate on the metallized metal layer 3 with the sub-conductor 4 interposed therebetween, the sub-conductor 4 and the circuit conductor 2 made of a copper plate are placed on the metallized metal layer 2. A method is adopted in which, for example, a foil brazing material made of, for example, a silver-copper eutectic alloy is interposed therebetween and the brazing material interposed therebetween is heated and melted for brazing.

【0021】メタライズ金属層3と銅板から成る回路導
体2との間に挟まれた副導体4は、20℃における降伏応
力が25MPa以下でかつ体積抵抗率が1.7 μΩ・cm以
下の金属から成り、メタライズ金属層3に銅板から成る
回路導体2をろう付けする際あるいは回路基板をパワー
モジュール等において使用する際に絶縁基体1と回路導
体2との間に両者の熱膨張係数の相違に起因して発生す
る熱応力を吸収緩和する作用を為すとともに、主導体で
ある回路導体2と共に大電流を流す際の導電路の一部と
して機能する。
The sub-conductor 4 sandwiched between the metallized metal layer 3 and the circuit conductor 2 made of a copper plate is made of a metal having a yield stress at 20 ° C. of 25 MPa or less and a volume resistivity of 1.7 μΩ · cm or less; When the circuit conductor 2 made of a copper plate is brazed to the metallized metal layer 3 or when the circuit board is used in a power module or the like, due to a difference in thermal expansion coefficient between the insulating base 1 and the circuit conductor 2. In addition to acting to absorb and relax the generated thermal stress, it functions as a part of a conductive path when a large current flows together with the circuit conductor 2 as the main conductor.

【0022】副導体4は、その降伏応力が25MPa以下
と小さくて塑性変形しやすいことから、絶縁基体1と回
路導体2との間に熱応力が発生しても、この熱応力は副
導体4が塑性変形することによって良好に吸収される。
その結果、絶縁基体1に大きな熱応力が印加されること
はなく、従って銅板から成る回路導体2を1mm以上の
厚いものとしても絶縁基体1にクラックが発生すること
はない。
Since the sub-conductor 4 has a small yield stress of 25 MPa or less and is easily plastically deformed, even if a thermal stress is generated between the insulating base 1 and the circuit conductor 2, the thermal stress is reduced by the sub-conductor 4. Is well absorbed by plastic deformation.
As a result, no large thermal stress is applied to the insulating base 1, and therefore, no crack is generated in the insulating base 1 even if the circuit conductor 2 made of a copper plate is made thicker than 1 mm.

【0023】この場合、副導体4は、その20℃における
降伏応力が25MPaを超えると、銅板から成る回路導体
2を間に副導体4を挟んで絶縁基体1にろう付けする際
あるいは回路基板をパワーモジュール等において使用す
る際に発生する熱応力を十分に吸収緩和することが困難
となる傾向にある。従って副導体4は、その20℃におけ
る降伏応力が25MPa以下の金属に特定される。
In this case, when the yield stress at 20 ° C. exceeds 25 MPa, the sub-conductor 4 is used for brazing the circuit conductor 2 made of a copper plate to the insulating substrate 1 with the sub-conductor 4 interposed therebetween, or It tends to be difficult to sufficiently absorb and mitigate the thermal stress generated when used in power modules and the like. Therefore, the sub-conductor 4 is specified as a metal having a yield stress at 20 ° C. of 25 MPa or less.

【0024】さらに、副導体4は、その体積抵抗率が1.
7 μΩ・cm以下と小さいことから、主導体としての銅
板から成る回路導体2と共に大電流を良好に流すことが
でき、その分回路導体2の厚みを薄いものとして回路基
板全体の厚みが不要に厚くなるのを防止することができ
る。その結果、銅板から成る回路導体2のみで回路基板
を構成した場合に比べて、絶縁基体1にクラックが発生
することがなく、かつ、より大電力に対応できる高信頼
性の回路基板とすることができる。
Further, the sub-conductor 4 has a volume resistivity of 1.
Since it is as small as 7 μΩ · cm or less, a large current can be satisfactorily passed together with the circuit conductor 2 made of a copper plate as a main conductor, and the thickness of the circuit conductor 2 is made thinner by that amount, so that the thickness of the entire circuit board becomes unnecessary. Thickness can be prevented. As a result, as compared with the case where the circuit board is constituted only by the circuit conductor 2 made of a copper plate, a highly reliable circuit board which does not generate cracks in the insulating base 1 and can cope with higher power. Can be.

【0025】この場合、副導体4は、その体積抵抗率が
1.7 μΩ・cmを超えると副導体4に回路導体2と同様
に電流を良好に流すことが困難となり、その分回路導体
2の厚みを薄くすることができず、回路基板全体の厚み
が副導体4により不要に厚いものとなってしまう。従っ
て副導体4は、その体積抵抗率が1.7 μΩ・cm以下の
金属に特定される。
In this case, the sub-conductor 4 has a volume resistivity of
If it exceeds 1.7 μΩ · cm, it becomes difficult to flow a current through the sub-conductor 4 as well as the circuit conductor 2, and the thickness of the circuit conductor 2 cannot be reduced accordingly, and the thickness of the entire circuit board is 4 results in an unnecessarily thick one. Therefore, the sub-conductor 4 is specified as a metal having a volume resistivity of 1.7 μΩ · cm or less.

【0026】なお、副導体4は、その厚みが0.2 mm未
満では絶縁基体1に銅板から成る回路導体をろう付けす
る際あるいは回路基板をパワーモジュール等において使
用する際に両者の熱膨張係数の相違に起因して発生する
熱応力を十分に吸収緩和することが困難となって、絶縁
基体1にクラックが発生しやすい傾向にある。またその
厚みが1mmを超えると、副導体4が柔らかく変形しや
すい金属であることから、回路導体2に半導体素子を接
続する際等に回路導体2に外力が印加されると回路導体
2がその外力によって変形しやすいものとなり、回路導
体2が変形すると半導体素子と回路導体2とを強固に接
続することが困難となる傾向にある。従って副導体4
は、その厚みを0.2 〜1mmの範囲としておくことが好
ましい。
When the thickness of the sub-conductor 4 is less than 0.2 mm, the difference in thermal expansion coefficient between the two when the circuit conductor made of a copper plate is brazed to the insulating base 1 or when the circuit board is used in a power module or the like. Therefore, it becomes difficult to sufficiently absorb and alleviate the thermal stress generated due to this, and cracks tend to occur in the insulating base 1. If the thickness exceeds 1 mm, the sub-conductor 4 is a soft and easily deformable metal. Therefore, when an external force is applied to the circuit conductor 2 when a semiconductor element is connected to the circuit conductor 2, the circuit conductor 2 becomes When the circuit conductor 2 is deformed, it tends to be difficult to firmly connect the semiconductor element and the circuit conductor 2 when the circuit conductor 2 is deformed. Therefore, the sub-conductor 4
It is preferable that the thickness is set in the range of 0.2 to 1 mm.

【0027】また、副導体4の厚みは、銅板から成る回
路導体2の厚みの3分の1以上の厚みであると絶縁基体
1と銅板から成る回路導体2との接合信頼性が極めて高
いものとなる。さらに2分の1を超える厚みとした場合
にはそれ以上の信頼性の向上に顕著な差は見られないこ
とから、銅板から成る回路導体2の厚みの3分の1〜2
分の1の範囲の厚みとしておくことが好ましい。
If the thickness of the sub-conductor 4 is at least one third of the thickness of the circuit conductor 2 made of a copper plate, the joining reliability between the insulating base 1 and the circuit conductor 2 made of a copper plate is extremely high. Becomes Further, when the thickness exceeds one half, there is no remarkable difference in the improvement of the reliability. Therefore, the thickness of the circuit conductor 2 made of a copper plate is one third to two thirds.
It is preferable to set the thickness in a range of 1 /.

【0028】このような副導体4には、例えば銀(降伏
応力が約23MPa)や金(降伏応力が約15MPa)等の
金属を用いればよく、またその形状としては、板材とし
て用いてもあるいはメッキ層とし用いてもよい。
Such a subconductor 4 may be made of a metal such as silver (having a yield stress of about 23 MPa) or gold (having a yield stress of about 15 MPa), for example. It may be used as a plating layer.

【0029】また、銀板または金板を用いる場合であれ
ば、これらは不純物を含むと固くなって塑性変形しにく
くなる傾向があることから、純銀または純金であること
が好ましい。
In the case where a silver plate or a gold plate is used, it is preferable to use pure silver or pure gold because these materials tend to be hardened and hardly plastically deformed when they contain impurities.

【0030】[0030]

【実施例】幅90mm×長さ170 mm×厚み2mmの純度
96%アルミナ基板から成る絶縁基体1の上面に幅27mm
×長さ82mm×厚み15μmのタングステンから成るメタ
ライズ金属層3を被着させ、このメタライズ金属層3に
厚み3μmのニッケルめっきを施し、これに幅25mm×
長さ80mmで表1に示す厚みの副導体4としての銀板お
よび回路導体2としての銅板を、間に厚み50μmの銀−
銅共晶ろうから成るろう材5を挟んでろう付けした試料
を作製した。そして、それぞれろう付けした後、ならび
に−40〜+125 ℃の温度サイクル試験500 サイクルまで
の各100 サイクル毎に、アルミナ基板に発生するクラッ
クの有無を確認した。その結果を表1に示す。
[Example] Purity of 90mm width x 170mm length x 2mm thickness
27 mm width on the upper surface of the insulating substrate 1 made of 96% alumina substrate
A metallized metal layer 3 made of tungsten having a length of 82 mm and a thickness of 15 μm is applied, and the metallized metal layer 3 is plated with nickel having a thickness of 3 μm, and the metallized metal layer 3 has a width of 25 mm ×
A silver plate as the sub-conductor 4 and a copper plate as the circuit conductor 2 having a length of 80 mm and the thickness shown in Table 1 are interposed between a silver plate having a thickness of 50 μm and
A sample was prepared by brazing a brazing material 5 made of copper eutectic brazing. Then, after brazing, and at every 100 cycles up to 500 cycles of a temperature cycle test at −40 to + 125 ° C., the presence or absence of cracks generated on the alumina substrate was checked. Table 1 shows the results.

【0031】[0031]

【表1】 [Table 1]

【0032】表1から分かるように、絶縁基体1と銅板
から成る回路導体2との間に銀板を用いた副導体4を挟
んだものは、いずれもろう付け後にクラックが発生しな
かった。また、銀板の厚みが0.2 mm以上の試料では、
少なくとも温度サイクル試験300 サイクル迄はクラック
の発生は見られず、高い接合信頼性を示した。一方、従
来の回路基板(試料No. 1)では、ろう付け後にクラッ
クが発生した。
As can be seen from Table 1, cracks did not occur after brazing in any case where the sub-conductor 4 using a silver plate was sandwiched between the insulating base 1 and the circuit conductor 2 formed of a copper plate. In the case of a sample having a silver plate thickness of 0.2 mm or more,
No cracks were observed at least up to 300 cycles in the temperature cycle test, indicating high bonding reliability. On the other hand, in the conventional circuit board (sample No. 1), cracks occurred after brazing.

【0033】これにより、本発明の回路基板によれば、
銅板から成る回路導体をセラミックスから成る絶縁基体
にろう付けする際あるいは回路基板をパワーモジュール
等において使用する際に絶縁基体にクラックが発生する
ことはなく、高信頼性の回路基板であることが確認でき
た。
Thus, according to the circuit board of the present invention,
When the circuit conductor made of copper plate is brazed to the insulating substrate made of ceramics or when the circuit substrate is used in power modules, etc., no cracks occur in the insulating substrate, confirming that the circuit substrate is highly reliable. did it.

【0034】また、銀板に代えて金板を使用した試験で
も、本発明の回路基板によれば、表1に示した結果と同
様の良好な結果が得られた。
Also, in a test using a gold plate instead of a silver plate, the circuit board of the present invention provided good results similar to those shown in Table 1.

【0035】[0035]

【発明の効果】本発明の回路基板によれば、セラミック
スから成る絶縁基体と銅から成る回路導体とを、間に20
℃における降伏応力が25MPa以下で、かつ体積抵抗率
が1.7μΩ・cm以下の金属から成る副導体を挟んでろ
う付けしたことから、絶縁基体と回路導体とをろう付け
する際あるいは回路基板をパワーモジュール等において
使用する際に、両者の熱膨張係数の相違に起因して発生
する熱応力は、副導体が塑性変形することによって良好
に吸収緩和されるため絶縁基体に大きな熱応力が印加さ
れることはなく、従って銅から成る回路導体の厚みを厚
いものとしても絶縁基体にクラックが発生することはな
い。
According to the circuit board of the present invention, the insulating base made of ceramic and the circuit conductor made of copper are interposed between the insulating base and the circuit conductor made of copper.
Since the yield stress at ℃ is 25MPa or less and the volume resistivity is 1.7μΩcm or less, the sub-conductor made of metal is brazed. When used in a module or the like, the thermal stress generated due to the difference in the thermal expansion coefficient between the two is well absorbed and relaxed by plastic deformation of the sub-conductor, so that large thermal stress is applied to the insulating base. Therefore, no crack is generated in the insulating base even if the thickness of the circuit conductor made of copper is increased.

【0036】また、回路導体に大電流を流す際には副導
体にも良好に電流が流れることから、その分銅板から成
る回路導体の厚みを薄いものとすることができ、回路基
板全体の厚みを不要に厚くすることなく大電流を流すこ
とができる。
Further, when a large current flows through the circuit conductor, the current also flows well through the sub-conductor, so that the thickness of the circuit conductor formed of the copper plate can be reduced, and the thickness of the entire circuit board can be reduced. A large current can be passed without making the thickness unnecessarily thick.

【0037】以上のように本発明によれば、回路基板全
体の厚みを不要に厚くすることなく、また大電力に対応
して銅板から成る回路導体の厚みを厚いものとしても絶
縁基体にクラックが発生することがない高信頼性の回路
基板を提供することができた。
As described above, according to the present invention, even if the thickness of the circuit conductor formed of a copper plate is increased without unnecessarily increasing the thickness of the entire circuit board, and even if the thickness of the circuit conductor made of a copper plate is increased in response to high power, cracks are formed on the insulating base. A highly reliable circuit board free from occurrence can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の回路基板の実施の形態の一例を示す断
面図である。
FIG. 1 is a sectional view showing an example of an embodiment of a circuit board of the present invention.

【符号の説明】[Explanation of symbols]

1・・・セラミックスから成る絶縁基体 2・・・銅板から成る回路導体 4・・・副導体 5・・・ろう材 DESCRIPTION OF SYMBOLS 1 ... Insulating base made of ceramics 2 ... Circuit conductor made of copper plate 4 ... Subconductor 5 ... Brazing material

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 セラミックスから成る絶縁基体に銅板か
ら成る回路導体をろう付けして成る回路基板において、
前記絶縁基体と前記回路導体とは、20℃における降伏
応力が25MPa以下で、かつ体積抵抗率が1.7μΩ
・cm以下の金属から成る副導体を挟んでろう付けされ
ていることを特徴とする回路基板。
1. A circuit board formed by brazing a circuit conductor made of a copper plate to an insulating base made of ceramics,
The insulating base and the circuit conductor have a yield stress at 20 ° C. of 25 MPa or less and a volume resistivity of 1.7 μΩ.
-A circuit board characterized by being brazed with a sub-conductor made of a metal having a size of not more than cm.
【請求項2】 前記回路導体の厚みが1mm以上であ
り、前記副導体の厚みが0.2乃至1mmであることを
特徴とする請求項1記載の回路基板。
2. The circuit board according to claim 1, wherein the thickness of the circuit conductor is 1 mm or more, and the thickness of the sub-conductor is 0.2 to 1 mm.
JP9141752A 1997-05-30 1997-05-30 Circuit substrate Pending JPH10335767A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9141752A JPH10335767A (en) 1997-05-30 1997-05-30 Circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9141752A JPH10335767A (en) 1997-05-30 1997-05-30 Circuit substrate

Publications (1)

Publication Number Publication Date
JPH10335767A true JPH10335767A (en) 1998-12-18

Family

ID=15299378

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9141752A Pending JPH10335767A (en) 1997-05-30 1997-05-30 Circuit substrate

Country Status (1)

Country Link
JP (1) JPH10335767A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1758175A1 (en) 2004-05-21 2007-02-28 Neomax Materials Co., Ltd. Electrode wire for solar battery

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1758175A1 (en) 2004-05-21 2007-02-28 Neomax Materials Co., Ltd. Electrode wire for solar battery
US7754973B2 (en) * 2004-05-21 2010-07-13 Neomax Materials Co., Ltd. Electrode wire for solar cell
EP1758175B1 (en) 2004-05-21 2016-05-04 Hitachi Metals, Ltd. Electrode wire for solar battery
EP3012872B1 (en) 2004-05-21 2017-07-12 Hitachi Metals, Ltd. Solar cell

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